| 648fe99e | 20-May-2016 |
Soren Brinkmann <soren.brinkmann@xilinx.com> |
zynqmp: Ignore the revision field of the IDCODE
The revision field may change between silicon revisions without changing
the mapping to a part. This avoids errors like:
ERROR: Incorrect XILINX IDC
zynqmp: Ignore the revision field of the IDCODE
The revision field may change between silicon revisions without changing
the mapping to a part. This avoids errors like:
ERROR: Incorrect XILINX IDCODE 0x14738093, maskid 0x4600093
NOTICE: ATF running on XCZUUNKN/EP108 v3/RTL5.1 at 0xfffe5000
on parts with a newer revision.
Reported-by: Love Kumar <love.kumar@xilinx.com>
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Acked-by: Alistair Francis <alistair.francis@xilinx.com>
Tested-by: Love Kumar <love.kumar@xilinx.com>
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|
| 03b80773 | 20-May-2016 |
Stefan Krsmanovic <stefan.krsmanovic@aggios.com> |
zynqmp: Add bakery_lock to protect APU_PWRCTRL register access
Access to APU_PWRCTRL register is protected during suspend/wakeup pocedure
in order to save valid state. If more than one CPU is access
zynqmp: Add bakery_lock to protect APU_PWRCTRL register access
Access to APU_PWRCTRL register is protected during suspend/wakeup pocedure
in order to save valid state. If more than one CPU is accessing this register
it can be left in corrupted state during read-modify-write process.
Signed-off-by: Stefan Krsmanovic <stefan.krsmanovic@aggios.com>
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
show more ...
|
| 8212f1f0 | 20-May-2016 |
Stefan Krsmanovic <stefan.krsmanovic@aggios.com> |
zynqmp: Put pm_secure_lock in coherent memory region
DEFINE_BAKERY_LOCK() macro is used to put lock in coherent memory region.
ARM Trusted Firmware design guide, chapter 11 states that bakery_lock d
zynqmp: Put pm_secure_lock in coherent memory region
DEFINE_BAKERY_LOCK() macro is used to put lock in coherent memory region.
ARM Trusted Firmware design guide, chapter 11 states that bakery_lock data
structures should be allocated in coherent memory region because it is
accessed by multiple CPUs with mismatched shareability, cacheability and
memory attributes.
Signed-off-by: Stefan Krsmanovic <stefan.krsmanovic@aggios.com>
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
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|
| fc65b87b | 12-May-2016 |
Anes Hadziahmetagic <anes.hadziahmetagic@aggios.com> |
zynqmp: pm: Implement pm_register_notifier PM API function
Signed-off-by: Anes Hadziahmetagic <anes.hadziahmetagic@aggios.com>
Signed-off-by: Filip Drazic <filip.drazic@aggios.com>
Signed-off-by: So
zynqmp: pm: Implement pm_register_notifier PM API function
Signed-off-by: Anes Hadziahmetagic <anes.hadziahmetagic@aggios.com>
Signed-off-by: Filip Drazic <filip.drazic@aggios.com>
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
show more ...
|
| df4c59c5 | 12-May-2016 |
Filip Drazic <filip.drazic@aggios.com> |
zynqmp: pm: Removed double declaration of pm_ipi_send functions
Functions pm_ipi_send and pm_ipi_send_sync are declared in pm_ipi.h
Signed-off-by: Filip Drazic <filip.drazic@aggios.com>
Signed-off-
zynqmp: pm: Removed double declaration of pm_ipi_send functions
Functions pm_ipi_send and pm_ipi_send_sync are declared in pm_ipi.h
Signed-off-by: Filip Drazic <filip.drazic@aggios.com>
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
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|
| 142ec043 | 22-Apr-2016 |
Soren Brinkmann <soren.brinkmann@xilinx.com> |
zynqmp: Reduce mapped memory area
The GIC area is specified larger than it needs to be and can be reduced.
Which allows reducing the structures required for the translation tables
as well.
This resu
zynqmp: Reduce mapped memory area
The GIC area is specified larger than it needs to be and can be reduced.
Which allows reducing the structures required for the translation tables
as well.
This results in a reduction of memory footprint of ca. 4k.
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>
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|
| b96f77c6 | 15-Jun-2015 |
Michal Simek <michal.simek@xilinx.com> |
zynqmp: FSBL->ATF handover
Parse the parameter structure the FSBL populates, to populate the bl32
and bl33 image structures.
Cc: Sarat Chand Savitala <saratcha@xilinx.com>
Cc: petalinux-dev@xilinx.
zynqmp: FSBL->ATF handover
Parse the parameter structure the FSBL populates, to populate the bl32
and bl33 image structures.
Cc: Sarat Chand Savitala <saratcha@xilinx.com>
Cc: petalinux-dev@xilinx.com
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
[ SB
- pass pointers to structs instead of structs
- handle execution state parameter
- populate bl32 SPSR
- add documentation
- query bootmode and consider missing handoff parameters an error when
not in JTAG boot mode
]
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
show more ...
|
| 01555332 | 14-Apr-2016 |
Soren Brinkmann <soren.brinkmann@xilinx.com> |
zynqmp: Revise memory configuration options
Drop the current configuration options for selecting the location of
the ATF and TSP (ZYNQMP_ATF_LOCATION, ZYNQMP_TSP_RAM_LOCATION).
The new configuration
zynqmp: Revise memory configuration options
Drop the current configuration options for selecting the location of
the ATF and TSP (ZYNQMP_ATF_LOCATION, ZYNQMP_TSP_RAM_LOCATION).
The new configuration provides one default setup (ATF in OCM,
BL32 in DRAM). Additionally, the new configuration options
- ZYNQMP_ATF_MEM_BASE
- ZYNQMP_ATF_MEM_SIZE
- ZYNQMP_BL32_MEM_BASE
- ZYNQMP_BL32_MEM_SIZE
can be used to freely configure the memory locations used for ATF and
secure payload.
Also, allow setting the BL33 entry point via PRELOADED_BL33_BASE.
Cc: petalinux-dev@xilinx.com
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Acked-by: Alistair Francis <alistair.francis@xilinx.com>
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|
| 0a48e2bd | 11-Apr-2016 |
Soren Brinkmann <soren.brinkmann@xilinx.com> |
zynqmp: ipi: Consolidate IRQ #defines
The bit mapping in I(E|D|S)R are equal, consolidate the #defines.
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Acked-by: Michal Simek <michal.si
zynqmp: ipi: Consolidate IRQ #defines
The bit mapping in I(E|D|S)R are equal, consolidate the #defines.
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>
show more ...
|