| 77135473 | 14-Sep-2022 |
Joanna Farley <joanna.farley@arm.com> |
Merge changes from topic "xilinx-misc-changes" into integration
* changes:
chore(zynqmp): fix comment style in zynqmp_def.h
chore(versal): add missing dot at the end of sentence
fix(zynqmp): r
Merge changes from topic "xilinx-misc-changes" into integration
* changes:
chore(zynqmp): fix comment style in zynqmp_def.h
chore(versal): add missing dot at the end of sentence
fix(zynqmp): remove additional 0x in %p print
fix(versal): fix Misra-C violations in bl31_setup and pm_svc_main
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| f114fd3b | 14-Sep-2022 |
Michal Simek <michal.simek@amd.com> |
chore(zynqmp): fix comment style in zynqmp_def.h
Add missing space in one line comment to follow common coding style.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Change-Id: Idebf8f34bf48444e
chore(zynqmp): fix comment style in zynqmp_def.h
Add missing space in one line comment to follow common coding style.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Change-Id: Idebf8f34bf48444ee20a68ac3e6fd7f5a41bf8b0
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| 05a6107f | 14-Sep-2022 |
Michal Simek <michal.simek@amd.com> |
fix(zynqmp): remove additional 0x in %p print
%p is already printing value in hex that's why 0x prefix is not needed.
Origin message looks like this
"NOTICE: Can't read DT at 0x0x100000"
and after
fix(zynqmp): remove additional 0x in %p print
%p is already printing value in hex that's why 0x prefix is not needed.
Origin message looks like this
"NOTICE: Can't read DT at 0x0x100000"
and after fixing
"NOTICE: Can't read DT at 0x100000"
Signed-off-by: Michal Simek <michal.simek@amd.com>
Change-Id: If83c485a61441f6105d8cbd797f04060dfce2817
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| ac6c135c | 13-Sep-2022 |
Tanmay Shah <tanmay.shah@amd.com> |
fix(zynqmp): ensure memory write finish with dsb()
GICD reg write must complete before core goes to idle
mode. Achieve this with dsb() barrier instruction in IPI
ISR
Signed-off-by: Tanmay Shah <tan
fix(zynqmp): ensure memory write finish with dsb()
GICD reg write must complete before core goes to idle
mode. Achieve this with dsb() barrier instruction in IPI
ISR
Signed-off-by: Tanmay Shah <tanmay.shah@amd.com>
Change-Id: I5af42ca901567ee5e54a5434ebe3e673a92cb9be
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| 0ba3d7a4 | 04-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
fix(zynqmp): move debug bl31 based address back to OCM
The commit 389594dfa7e6 ("fix(zynqmp): move bl31 with DEBUG=1 back to OCM")
tried to move address to OCM but address was actually out of OCM an
fix(zynqmp): move debug bl31 based address back to OCM
The commit 389594dfa7e6 ("fix(zynqmp): move bl31 with DEBUG=1 back to OCM")
tried to move address to OCM but address was actually out of OCM and likely
it was typo. Correct default address should be 0xfffe5000. If TF-A size is
bigger please select location DDR which should be fine for DEBUG cases.
Reported-by: Vesa Jääskeläinen <vesa.jaaskelainen@vaisala.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Change-Id: I055f3a59cdca527f6029fcc2a19d76be35924d24
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| 4264bd33 | 23-Aug-2022 |
Akshay Belsare <Akshay.Belsare@amd.com> |
fix(zynqmp): fix for incorrect afi write mask value
Currently, the AFIFM6_WRCTRL bus-width configuration is not happening
correctly due to the wrong register write mask value. To fix this issue
upda
fix(zynqmp): fix for incorrect afi write mask value
Currently, the AFIFM6_WRCTRL bus-width configuration is not happening
correctly due to the wrong register write mask value. To fix this issue
updated the mask value handling logic.
Signed-off-by: Nava kishore Manne <nava.kishore.manne@amd.com>
Signed-off-by: Akshay Belsare <Akshay.Belsare@amd.com>
Acked-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Change-Id: I8443c369a84339018310cfb6cd498d21474da3e4
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| 342a65fb | 01-Aug-2022 |
Joanna Farley <joanna.farley@arm.com> |
Merge "feat(zynqmp): protect eFuses from non-secure access" into integration |
| d0b7286e | 29-Apr-2022 |
Vesa Jääskeläinen <vesa.jaaskelainen@vaisala.com> |
feat(zynqmp): protect eFuses from non-secure access
When configuration option ZYNQMP_SECURE_EFUSES is defined then Xilinx
ZynqMP's PS eFuses can only be accesses from secure state.
This enables eFu
feat(zynqmp): protect eFuses from non-secure access
When configuration option ZYNQMP_SECURE_EFUSES is defined then Xilinx
ZynqMP's PS eFuses can only be accesses from secure state.
This enables eFuses to be reserved and protected only for security use
cases for example in OP-TEE.
Change-Id: I866905e35ce488f50f5f6e1b4667b08a9fa2386d
Signed-off-by: Vesa Jääskeläinen <vesa.jaaskelainen@vaisala.com>
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| bfc514f1 | 28-Jul-2022 |
Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com> |
fix(xilinx): miscellaneous fixes for xilinx platforms
This patch gathers miscellaneous minor fixes to the xilinx
platforms like tabs for indentation and misra 10.1 warnings.
Signed-off-by: Michal S
fix(xilinx): miscellaneous fixes for xilinx platforms
This patch gathers miscellaneous minor fixes to the xilinx
platforms like tabs for indentation and misra 10.1 warnings.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Change-Id: I4cdb89ffec7d5abc64e065ed5b5e5d10b30ab9f9
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| bfd7c881 | 04-Jul-2022 |
Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com> |
feat(zynqmp): resolve the misra 10.1 warnings
MISRA Violation: MISRA-C:2012 R.10.1
1) The expression of non-boolean essential type is being interpreted as a
boolean value for the operator.
2) The op
feat(zynqmp): resolve the misra 10.1 warnings
MISRA Violation: MISRA-C:2012 R.10.1
1) The expression of non-boolean essential type is being interpreted as a
boolean value for the operator.
2) The operand to the operator does not have an essentially unsigned type.
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Change-Id: I97bbc056f4fee167742429e144144ba793bf77b3
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| 57ab7497 | 29-Jun-2022 |
Joanna Farley <joanna.farley@arm.com> |
Merge changes from topic "xlnx_zynqmp_misra_fix1" into integration
* changes:
fix(zynqmp): resolve the misra 8.6 warnings
fix(zynqmp): resolve the misra 4.6 warnings |
| 9316149e | 24-Jun-2022 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "fix(zynqmp): move bl31 with DEBUG=1 back to OCM" into integration |
| 40366cb6 | 24-Jun-2022 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes from topic "xlnx_versal_misra_fix" into integration
* changes:
fix(versal): resolve misra 15.6 warnings
fix(zynqmp): resolve misra 8.13 warnings
fix(versal): resolve misra 8.13 w
Merge changes from topic "xlnx_versal_misra_fix" into integration
* changes:
fix(versal): resolve misra 15.6 warnings
fix(zynqmp): resolve misra 8.13 warnings
fix(versal): resolve misra 8.13 warnings
fix(versal): resolve the misra 4.6 warnings
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| 389594df | 15-Jun-2022 |
Michal Simek <michal.simek@xilinx.com> |
fix(zynqmp): move bl31 with DEBUG=1 back to OCM
By default placing bl31 to addrexx 0x1000 is not good. Because this
location is used by U-Boot SPL. That's why move TF-A back to OCM where it
should b
fix(zynqmp): move bl31 with DEBUG=1 back to OCM
By default placing bl31 to addrexx 0x1000 is not good. Because this
location is used by U-Boot SPL. That's why move TF-A back to OCM where it
should be placed. BL31_BASE address exactly matches which requested address
for U-BOOT SPL boot flow.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Change-Id: I608c1b88baffec538c6ae528f057820e34971c4c
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| 86869f99 | 17-May-2022 |
Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com> |
feat(zynqmp): add support for xck24 silicon
Add support for new xck24 device.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilin
feat(zynqmp): add support for xck24 silicon
Add support for new xck24 device.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Change-Id: I913a34d5a48ea665aaa4348f573fc59566dd5a9b
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| 7b1a6a08 | 19-May-2022 |
Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com> |
fix(zynqmp): resolve the misra 8.6 warnings
MISRA Violation: MISRA-C:2012 R.8.6
- Function is declared but never defined.
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Cha
fix(zynqmp): resolve the misra 8.6 warnings
MISRA Violation: MISRA-C:2012 R.8.6
- Function is declared but never defined.
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Change-Id: I0df53ef4b2c91fa8ec3bf3e5491bf37dd7400685
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| ffa91031 | 19-May-2022 |
Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com> |
fix(zynqmp): resolve the misra 4.6 warnings
MISRA Violation: MISRA-C:2012 R.4.6
- Using basic numerical type int rather than a typedef
that includes size and signedness information.
Signed-off-by:
fix(zynqmp): resolve the misra 4.6 warnings
MISRA Violation: MISRA-C:2012 R.4.6
- Using basic numerical type int rather than a typedef
that includes size and signedness information.
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Change-Id: I9fb686e7aa2b85af6dfcb7bb5f87eddf469fb85c
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| 5e529e32 | 03-Jun-2022 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge "fix(plat/zynqmp): fix coverity scan warnings" into integration |
| 8695ffcf | 24-May-2022 |
Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com> |
fix(zynqmp): resolve misra 8.13 warnings
MISRA Violation: MISRA-C:2012 R.8.13
- The pointer variable points to a non-constant type
but does not modify the object it points to. Consider
adding const
fix(zynqmp): resolve misra 8.13 warnings
MISRA Violation: MISRA-C:2012 R.8.13
- The pointer variable points to a non-constant type
but does not modify the object it points to. Consider
adding const qualifier to the points-to type.
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Change-Id: Ifd06c789cfd3babe1f5c0a17aff1ce8e70c87b05
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| 314f9f79 | 06-May-2022 |
Ronak Jain <ronak.jain@xilinx.com> |
feat(plat/xilinx/zynqmp): optimization on pinctrl_functions
Optimizing the pinctrl_functions structure. Remove the pointer to
array of u16 type which consumes a lot of memory (64bits pointer to
arra
feat(plat/xilinx/zynqmp): optimization on pinctrl_functions
Optimizing the pinctrl_functions structure. Remove the pointer to
array of u16 type which consumes a lot of memory (64bits pointer to
array + 16B for END_OF_GROUPS + almost useless 8bits on every entry
which is the same for every group) and add two new members of type
u16 and u8 with the name called group_base and group_size
respectively.
The group_base member contains the base value of pinctrl group whereas
the group_size member contains the total number of groups requested
from the pinctrl function.
Overall, it saves around ~2KB of RAM and ~0.7KB of code memory.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Signed-off-by: Ronak Jain <ronak.jain@xilinx.com>
Change-Id: I79b761b45df350d390fa344d411b340d9b2f13ac
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| 1ac6af11 | 11-May-2022 |
Ronak Jain <ronak.jain@xilinx.com> |
fix(plat/zynqmp): fix coverity scan warnings
- Fix uninitialized variable use
- Fix array overrun issue
Signed-off-by: Tanmay Shah <tanmay.shah@xilinx.com>
Signed-off-by: Ronak Jain <ronak.jain@xil
fix(plat/zynqmp): fix coverity scan warnings
- Fix uninitialized variable use
- Fix array overrun issue
Signed-off-by: Tanmay Shah <tanmay.shah@xilinx.com>
Signed-off-by: Ronak Jain <ronak.jain@xilinx.com>
Change-Id: I604416531122c9208793d66c26b1fa69c95f3165
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| 944e7ea9 | 16-May-2022 |
Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com> |
fix(zynqmp): resolve misra 8.3 warnings
MISRA Violation: MISRA-C:2012 R.8.3
- Declaration uses a different parameter name than the one present in the
definition.
Signed-off-by: Venkatesh Yadav Abba
fix(zynqmp): resolve misra 8.3 warnings
MISRA Violation: MISRA-C:2012 R.8.3
- Declaration uses a different parameter name than the one present in the
definition.
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Change-Id: Id0521afd7383df13870710b7dd2894e788896e5e
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| 610eeac8 | 16-May-2022 |
Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com> |
fix(zynqmp): resolve misra R8.4 warnings
MISRA Violation: MISRA-C:2012 R.8.4
- Function definition does not have a visible prototype.
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xil
fix(zynqmp): resolve misra R8.4 warnings
MISRA Violation: MISRA-C:2012 R.8.4
- Function definition does not have a visible prototype.
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Change-Id: I50a2c1adf2e099217770ac665f135302f990b162
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| 1f0309d4 | 12-May-2022 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge "fix(zynqmp): define and enable ARM_XLAT_TABLES_LIB_V1" into integration |
| c884c9a5 | 06-May-2022 |
Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com> |
fix(zynqmp): define and enable ARM_XLAT_TABLES_LIB_V1
Enable ARM_XLAT_TABLES_LIB_V1 as ZynqMP is using
v1 library of translation tables.
With upstream patch d323af9e3d903d981b42f954844a95a6bfef91ab
fix(zynqmp): define and enable ARM_XLAT_TABLES_LIB_V1
Enable ARM_XLAT_TABLES_LIB_V1 as ZynqMP is using
v1 library of translation tables.
With upstream patch d323af9e3d903d981b42f954844a95a6bfef91ab,
the usage of MAP_REGION_FLAT is referring to definition in file
include/lib/xlat_tables/xlat_tables_v2.h but while preparing
xlat tables in lib/xlat_tables/xlat_tables_common.c it is referring
to include/lib/xlat_tables/xlat_tables.h which is v1 xlat tables.
Also, ZynqMP was using v1 so defined ARM_XLAT_TABLES_LIB_V1 to
use v1 xlat tables everywhere.
This fixes the issue of xlat tables failures as it takes v2
library mmap_region structure in some files and v1 in other
files.
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Change-Id: Ibc0e1c536e19f4edd6a6315bf1b0dfcec33e2fdc
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