fix(zynqmp): check smc_fid 23:16 bits

23:16 bits when they gets to SMC handler should be all zeros but be
inside SIP Service Calls range which is defined as 0x82000000-0x8200ffff
or 0xc2000000-0xc20

fix(zynqmp): check smc_fid 23:16 bits

23:16 bits when they gets to SMC handler should be all zeros but be
inside SIP Service Calls range which is defined as 0x82000000-0x8200ffff
or 0xc2000000-0xc200ffff. That's why make sure that code won't handle
any SMCs in SIP range out of predefined range. Because EM SMC is out of
this range already on this SOC check it after it (EMC SMC will be
handled separately).
Also fix MASK values to check the same range for PM/IPI/EM calls to make
sure that masking covers all required bits including 23:16. Bits 15:12
are used for different class of requests.

Change-Id: If23ac769c91d206e47758aeaa1f14e8b9c3dc7bb
Signed-off-by: Michal Simek <michal.simek@amd.com>

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fix(zynqmp): separate EM from PM SMCs

There is no reason to use else and concatenate EM SMCs with PM SMCs via
if/else pair. Also synchronize comment location.

Change-Id: I147f9d193574c2417c9d92d41a

fix(zynqmp): separate EM from PM SMCs

There is no reason to use else and concatenate EM SMCs with PM SMCs via
if/else pair. Also synchronize comment location.

Change-Id: I147f9d193574c2417c9d92d41a675e35ba282c9f
Signed-off-by: Michal Simek <michal.simek@amd.com>

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Merge changes from topic "xlnx_zynqmp_misra_fix" into integration

* changes:
fix(zynqmp): resolve misra 8.3 warnings
fix(zynqmp): resolve misra R8.4 warnings

fix(zynqmp): resolve misra R8.4 warnings

MISRA Violation: MISRA-C:2012 R.8.4
- Function definition does not have a visible prototype.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xil

fix(zynqmp): resolve misra R8.4 warnings

MISRA Violation: MISRA-C:2012 R.8.4
- Function definition does not have a visible prototype.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Change-Id: I50a2c1adf2e099217770ac665f135302f990b162

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Merge changes from topic "xlnx_zynqmp_misra" into integration

* changes:
fix(zynqmp): resolve misra R14.4 warnings
fix(zynqmp): resolve misra R16.3 warnings
fix(zynqmp): resolve misra R15.7 wa

Merge changes from topic "xlnx_zynqmp_misra" into integration

* changes:
fix(zynqmp): resolve misra R14.4 warnings
fix(zynqmp): resolve misra R16.3 warnings
fix(zynqmp): resolve misra R15.7 warnings
fix(zynqmp): resolve misra R15.6 warnings
fix(zynqmp): resolve misra 7.2 warnings
fix(zynqmp): resolve misra R10.3

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fix(zynqmp): resolve misra 7.2 warnings

MISRA Violation: MISRA-C:2012 R.7.2
- A "u" or "U" suffix shall be applied to all integer constants that are
represented in an unsigned type.

Signed-off-by:

fix(zynqmp): resolve misra 7.2 warnings

MISRA Violation: MISRA-C:2012 R.7.2
- A "u" or "U" suffix shall be applied to all integer constants that are
represented in an unsigned type.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Change-Id: Ieeff81ed42155c03aebca75b2f33f311279b9ed4

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fix(zynqmp): resolve misra R10.3

MISRA Violation: MISRA-C:2012 R.10.3
- The value of an expression shall not be assigned to an object with a
narrower essential type or of a different essential typ

fix(zynqmp): resolve misra R10.3

MISRA Violation: MISRA-C:2012 R.10.3
- The value of an expression shall not be assigned to an object with a
narrower essential type or of a different essential type category.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Change-Id: I5a60c66788d59e45f41ceb81758b42ef2df9f5f7

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Merge "zynqmp: pm: Update PM version and support PM version check" into integration

zynqmp: pm: Update PM version and support PM version check

ATF is not checking PM version. Add version check in such
a way that it is compatible with current and newer version
of PM.

Signed-off-by:

zynqmp: pm: Update PM version and support PM version check

ATF is not checking PM version. Add version check in such
a way that it is compatible with current and newer version
of PM.

Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Change-Id: Ia095d118121e6f75e8d320e87d5e2018068fa079

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Merge changes from topic "zynqmp-new-apis" into integration

* changes:
xilinx: zynqmp: Add support for Error Management
zynqmp:pm: Adds new zynqmp-pm api SMC call for efuse
zynqmp : pm : Adds

Merge changes from topic "zynqmp-new-apis" into integration

* changes:
xilinx: zynqmp: Add support for Error Management
zynqmp:pm: Adds new zynqmp-pm api SMC call for efuse
zynqmp : pm : Adds new zynqmp-pm api SMC call for register access

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xilinx: zynqmp: Add support for Error Management

Adding the EM specific smc handler for the EM-related requests.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Signed-off-b

xilinx: zynqmp: Add support for Error Management

Adding the EM specific smc handler for the EM-related requests.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Change-Id: I98122d49604a01a2f6bd1e509a5896ee68069dd0

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Merge "plat: xilinx: zynqmp: Initialize IPI table from zynqmp_config_setup()" into integration

plat: xilinx: zynqmp: Initialize IPI table from zynqmp_config_setup()

Common ipi_table needs to be initialized before using any
IPI command (i.e send/receive). Move zynqmp ipi config table
initializ

plat: xilinx: zynqmp: Initialize IPI table from zynqmp_config_setup()

Common ipi_table needs to be initialized before using any
IPI command (i.e send/receive). Move zynqmp ipi config table
initialization from sip_svc_setup() to zynqmp_config_setup().

Change-Id: Ic8aaa0728a43936cd4c6e1ed590e01ba8f0fbf5b
Signed-off-by: Tejas Patel <tejas.patel@xilinx.com>
Signed-off-by: Jolly Shah <jolly.shah@xilinx.com>

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Merge pull request #1744 from jollysxilinx/integration

plat: xilinx: code restructure

xilinx: Remove platform specific dependency from IPI function

ipi_mb function uses platform specific ipi configuration table.
These ipi_mb functions can be used for other Xilinx platform.
So, instea

xilinx: Remove platform specific dependency from IPI function

ipi_mb function uses platform specific ipi configuration table.
These ipi_mb functions can be used for other Xilinx platform.
So, instead of using direct data structure, initialize IPI
configuration data by passing platform specific ipi table.
Macros are updated accordingly for this ipi table change.

This change is done so that ipi_mb functions can be moved to
common file without major changes. All common functions now would
be moved to common file in next patch.

Signed-off-by: Tejas Patel <tejas.patel@xilinx.com>
Reviewed-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Jolly Shah <jollys@xilinx.com>

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xilinx: zynqmp: Move zynqmp_ipi.h to include directory

Move zynqmp_ipi.h to platform specific include directory.
Rename it to plat_ipi.h instead of platform name. So, it can
be used to common source

xilinx: zynqmp: Move zynqmp_ipi.h to include directory

Move zynqmp_ipi.h to platform specific include directory.
Rename it to plat_ipi.h instead of platform name. So, it can
be used to common source files which needs platform specific
data.

Signed-off-by: Tejas Patel <tejas.patel@xilinx.com>
Reviewed-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Jolly Shah <jollys@xilinx.com>

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Merge pull request #1726 from antonio-nino-diaz-arm/an/includes

Sanitise includes across codebase

Sanitise includes across codebase

Enforce full include path for includes. Deprecate old paths.

The following folders inside include/lib have been left unchanged:

- include/lib/cpus/${ARCH}
- inclu

Sanitise includes across codebase

Enforce full include path for includes. Deprecate old paths.

The following folders inside include/lib have been left unchanged:

- include/lib/cpus/${ARCH}
- include/lib/el3_runtime/${ARCH}

The reason for this change is that having a global namespace for
includes isn't a good idea. It defeats one of the advantages of having
folders and it introduces problems that are sometimes subtle (because
you may not know the header you are actually including if there are two
of them).

For example, this patch had to be created because two headers were
called the same way: e0ea0928d5b7 ("Fix gpio includes of mt8173 platform
to avoid collision."). More recently, this patch has had similar
problems: 46f9b2c3a282 ("drivers: add tzc380 support").

This problem was introduced in commit 4ecca33988b9 ("Move include and
source files to logical locations"). At that time, there weren't too
many headers so it wasn't a real issue. However, time has shown that
this creates problems.

Platforms that want to preserve the way they include headers may add the
removed paths to PLAT_INCLUDES, but this is discouraged.

Change-Id: I39dc53ed98f9e297a5966e723d1936d6ccf2fc8f
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>

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Merge pull request #1406 from robertovargas-arm/uuid

Make TF UUID RFC 4122 compliant

Make TF UUID RFC 4122 compliant

RFC4122 defines that fields are stored in network order (big endian),
but TF-A stores them in machine order (little endian by default in TF-A).
We cannot change the f

Make TF UUID RFC 4122 compliant

RFC4122 defines that fields are stored in network order (big endian),
but TF-A stores them in machine order (little endian by default in TF-A).
We cannot change the future UUIDs that are already generated, but we can store
all the bytes using arrays and modify fiptool to generate the UUIDs with
the correct byte order.

Change-Id: I97be2d3168d91f4dee7ccfafc533ea55ff33e46f
Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>

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Merge pull request #1255 from masahir0y/int-ll64

Use consistent int-ll64 typedefs for aarch32 and aarch64

Fix pointer type mismatch of handlers

Commit 4c0d03907652 ("Rework type usage in Trusted Firmware") changed
the type usage in struct declarations, but did not touch the definition
side. Fix the typ

Fix pointer type mismatch of handlers

Commit 4c0d03907652 ("Rework type usage in Trusted Firmware") changed
the type usage in struct declarations, but did not touch the definition
side. Fix the type mismatch.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

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Merge pull request #1176 from wjliang/zynqmp-ipi-mb-svc

plat: xilinx: Add ZynqMP IPI mailbox service [v4]

Add Xilinx ZynqMP IPI mailbox service

Add IPI mailbox service to manage Xilinx ZynqMP IPI(Inter Processors
Interrupt) access.

Signed-off-by: Wendy Liang <jliang@xilinx.com>

Merge pull request #925 from dp-arm/dp/spdx

Use SPDX license identifiers