| #
e44fa642 |
| 22-Aug-2025 |
Joanna Farley <joanna.farley@arm.com> |
Merge changes from topic "xlnx_runtime_console" into integration
* changes: fix(versal2): runtime console in debug mode fix(versal-net): runtime console in debug mode fix(versal): runtime cons
Merge changes from topic "xlnx_runtime_console" into integration
* changes: fix(versal2): runtime console in debug mode fix(versal-net): runtime console in debug mode fix(versal): runtime console in debug mode fix(zynqmp): runtime console in debug mode
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| #
25463503 |
| 14-Aug-2025 |
Prasad Kummari <prasad.kummari@amd.com> |
fix(zynqmp): runtime console in debug mode
Whenever DEBUG is set to 1, the Makefile forces CONSOLE_RUNTIME to cadence1, regardless of the user-specified ZYNQMP_CONSOLE value. This causes a build req
fix(zynqmp): runtime console in debug mode
Whenever DEBUG is set to 1, the Makefile forces CONSOLE_RUNTIME to cadence1, regardless of the user-specified ZYNQMP_CONSOLE value. This causes a build requested with ZYNQMP_CONSOLE= cadence1 to register both cadence1 and cadence as boot and runtime consoles. If the hardware is connected only to UART1, this causes TF-A to hang when UART0 is selected as the runtime console, since it waits indefinitely on the transmit FIFO. The fix ensures that, in a DEBUG build, CONSOLE_RUNTIME defaults to the same value as ZYNQMP_CONSOLE.
Change-Id: Ieff6adf4c6c30e07b8c7309c4835dcb32dcf9373 Signed-off-by: Prasad Kummari <prasad.kummari@amd.com>
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| #
adbcd85e |
| 29-May-2025 |
Joanna Farley <joanna.farley@arm.com> |
Merge changes from topic "xlnx_versal_custom_sip" into integration
* changes: feat(versal): add hooks for mmap and early setup refactor(zynqmp): refactor custom sip service
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| #
55f6ea4d |
| 16-Apr-2025 |
Prasad Kummari <prasad.kummari@amd.com> |
refactor(zynqmp): refactor custom sip service
Refactored the custom SIP service code and relocated it to a common directory to support additional platforms and enhance code readability. Renamed ZYNQ
refactor(zynqmp): refactor custom sip service
Refactored the custom SIP service code and relocated it to a common directory to support additional platforms and enhance code readability. Renamed ZYNQMP_SIP_SVC_CUSTOM to a generic SOC_SIP_SVC_CUSTOM for better with other across SoCs
Change-Id: Id114f717d0397e257a831c7d5b67104c2c766d09 Signed-off-by: Prasad Kummari <prasad.kummari@amd.com>
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| #
139a5d05 |
| 18-Apr-2025 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge changes I86959e67,I0b0d1d36,I5b5267f4,I056c8710,I3474aa97 into integration
* changes: chore: fix preprocessor checks refactor: convert arm platforms to use the generic GIC driver refacto
Merge changes I86959e67,I0b0d1d36,I5b5267f4,I056c8710,I3474aa97 into integration
* changes: chore: fix preprocessor checks refactor: convert arm platforms to use the generic GIC driver refactor(gic): promote most of the GIC driver to common code refactor: make arm_gicv2.c and arm_gicv3.c common refactor(fvp): use more arm generic code for gicv3
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| #
35d18d8d |
| 07-Jan-2025 |
Boyan Karatotev <boyan.karatotev@arm.com> |
refactor: make arm_gicv2.c and arm_gicv3.c common
These files were meant to be platform specific, but they are generic enough that a range of platforms find them useful. However, refactoring them is
refactor: make arm_gicv2.c and arm_gicv3.c common
These files were meant to be platform specific, but they are generic enough that a range of platforms find them useful. However, refactoring them is difficult as their use is platform specific. So copy them to a generic place and redirect platforms to them.
The new copies will remain for compatibility for platforms that don't want to or can't take up upcoming refactors and the old copies can be drastically refactored to make them more widely applicable.
Change-Id: I056c8710cdda4d8a81b324d392762c29e02cdae1 Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
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| #
8ee65344 |
| 16-Oct-2024 |
Joanna Farley <joanna.farley@arm.com> |
Merge changes from topic "xlnx_fix_plat_console_changes" into integration
* changes: feat(xilinx): add none console feat(versal2): add dtb & runtime console feat(versal-net): add DTB console t
Merge changes from topic "xlnx_fix_plat_console_changes" into integration
* changes: feat(xilinx): add none console feat(versal2): add dtb & runtime console feat(versal-net): add DTB console to platform.mk feat(versal-net): dedicate console for boot and runtime feat(versal): add DTB console to platform.mk feat(versal): dedicate console for boot and runtime refactor(xilinx): register runtime console directly refactor(xilinx): console registration through console holder structure feat(zynqmp): add DTB console to platform.mk feat(zynqmp): dedicate console for boot and runtime fix(xilinx): dcc to support runtime console scope refactor(xilinx): create generic function for DT console refactor(xilinx): rename setup_runtime_console to generic chore(xilinx): rename console variables chore(xilinx): rename runtime console to DT console
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| #
6d413983 |
| 10-Sep-2024 |
Michal Simek <michal.simek@amd.com> |
feat(xilinx): add none console
None console does not register boot and runtime console. User will not observe any console logs.
Change-Id: I39877c900f399ae7cffc1bb599b30c7a23888fc8 Signed-off-by: M
feat(xilinx): add none console
None console does not register boot and runtime console. User will not observe any console logs.
Change-Id: I39877c900f399ae7cffc1bb599b30c7a23888fc8 Signed-off-by: Michal Simek <michal.simek@amd.com> Signed-off-by: Maheedhar Bollapalli <MaheedharSai.Bollapalli@amd.com>
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| #
09a02ce0 |
| 18-Mar-2024 |
Prasad Kummari <prasad.kummari@amd.com> |
feat(zynqmp): add DTB console to platform.mk
In the platform.mk file, new console types named dtb are to be created a macro, ZYNQMP_CONSOLE_ID_dtb, will be introduced to check DT console. Users will
feat(zynqmp): add DTB console to platform.mk
In the platform.mk file, new console types named dtb are to be created a macro, ZYNQMP_CONSOLE_ID_dtb, will be introduced to check DT console. Users will have the option to select ZYNQMP_CONSOLE to dtb, which will run from the DDR address. The address XILINX_OF_BOARD_DTB_ADDR needs to be provided. This configuration will register the DT console in TF-A. Flags for the ZynqMP platform and other AMD-Xilinx platforms will be updated to utilize common code.
Change-Id: If74da4a80196575335c9d5562e6d8cd12d99561c Signed-off-by: Prasad Kummari <prasad.kummari@amd.com> Signed-off-by: Maheedhar Bollapalli <MaheedharSai.Bollapalli@amd.com>
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| #
4557ab69 |
| 14-Mar-2024 |
Prasad Kummari <prasad.kummari@amd.com> |
feat(zynqmp): dedicate console for boot and runtime
Introduce a build-time parameter (CONSOLE_RUNTIME) to select separate runtime console options. For boot-time console, remove the runtime flag and
feat(zynqmp): dedicate console for boot and runtime
Introduce a build-time parameter (CONSOLE_RUNTIME) to select separate runtime console options. For boot-time console, remove the runtime flag and add a boot/crash flag. Additionally, introduce an RT_CONSOLE_IS macro to check different UART types.
Implement a common function, console_runtime_init(), to initialize the runtime console. Ensure that all platforms have access to this feature.
The current implementation utilizes a single console for boot, crash, and runtime. Make sure that the dedicated console integrates into runtime and crash scenarios.
Change-Id: I32913dede3d87109e54d179e7d99f45c33b9097b Signed-off-by: Prasad Kummari <prasad.kummari@amd.com> Signed-off-by: Maheedhar Bollapalli <MaheedharSai.Bollapalli@amd.com>
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| #
fb02c4b2 |
| 26-Sep-2024 |
Yann Gautier <yann.gautier@st.com> |
Merge "fix(xilinx): fix comment about MEM_BASE/SIZE" into integration
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| #
1e2a5e28 |
| 02-Aug-2024 |
Michal Simek <michal.simek@amd.com> |
fix(xilinx): fix comment about MEM_BASE/SIZE
Comment is not showing correct macro name that's why fix it.
Signed-off-by: Michal Simek <michal.simek@amd.com> Change-Id: I8bc38534309285af8a27ee43782e
fix(xilinx): fix comment about MEM_BASE/SIZE
Comment is not showing correct macro name that's why fix it.
Signed-off-by: Michal Simek <michal.simek@amd.com> Change-Id: I8bc38534309285af8a27ee43782e03e9d0470267
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| #
6b206d1d |
| 28-Aug-2024 |
Olivier Deprez <olivier.deprez@arm.com> |
Merge "fix(zynqmp): handle secure SGI at EL1 for OP-TEE" into integration
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| #
f5b2fa90 |
| 24-Jul-2024 |
Shen Jiamin <shen_jiamin@comp.nus.edu.sg> |
fix(zynqmp): handle secure SGI at EL1 for OP-TEE
OP-TEE requires SGIs to be handled at S-EL1. The Makefile was not properly setting the flag GICV2_G0_FOR_EL3 to 0 when the SPD is OP-TEE.
Change-Id:
fix(zynqmp): handle secure SGI at EL1 for OP-TEE
OP-TEE requires SGIs to be handled at S-EL1. The Makefile was not properly setting the flag GICV2_G0_FOR_EL3 to 0 when the SPD is OP-TEE.
Change-Id: I256afa37ddf4ad4a154c43d51807de670c3689bb Signed-off-by: Shen Jiamin <shen_jiamin@comp.nus.edu.sg>
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| #
251d645f |
| 17-Jul-2024 |
Manish V Badarkhe <manish.badarkhe@arm.com> |
Merge "feat(zynqmp): move zynqmp platform to xlat tables v2" into integration
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| #
fdda980a |
| 20-Mar-2024 |
Prasad Kummari <prasad.kummari@amd.com> |
feat(zynqmp): move zynqmp platform to xlat tables v2
Switch to xlat table v2 version to add support for dynamic mapping which is not supported in xlat table v1. It can be used for run time DT mappin
feat(zynqmp): move zynqmp platform to xlat tables v2
Switch to xlat table v2 version to add support for dynamic mapping which is not supported in xlat table v1. It can be used for run time DT mapping. Also xlat table v1 version is going to be deprecated that's why switch is necessary and removed unused xlat table v1 macro from platform.mk. With ENABLE_LTO enabled, size difference in OCM between xlat table v2 and xlat table v1 release is 82193 - 82058 = 135 bytes.
Change-Id: Ifec2e75fb19670e83dc761fc40a8c4cd5ed9087b Signed-off-by: Michal Simek <michal.simek@amd.com> Signed-off-by: Prasad Kummari <prasad.kummari@amd.com> Signed-off-by: Maheedhar Bollapalli <MaheedharSai.Bollapalli@amd.com>
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| #
403603da |
| 02-Jul-2024 |
Yann Gautier <yann.gautier@st.com> |
Merge "feat(zynqmp): enable ENABLE_LTO flag" into integration
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| #
19d87567 |
| 20-Mar-2024 |
Prasad Kummari <prasad.kummari@amd.com> |
feat(zynqmp): enable ENABLE_LTO flag
Enabling Link Time Optimization in platform.mk for AMD-Xilinx ZynqMP platform optimizes TF-A size. With ENABLE_LTO=0, the release bl31.elf size is 86098. With EN
feat(zynqmp): enable ENABLE_LTO flag
Enabling Link Time Optimization in platform.mk for AMD-Xilinx ZynqMP platform optimizes TF-A size. With ENABLE_LTO=0, the release bl31.elf size is 86098. With ENABLE_LTO=1, the release bl31.elf size reduces to 81866. The size difference in OCM is 4232 bytes, saving up to 4KB.
Signed-off-by: Prasad Kummari <prasad.kummari@amd.com> Change-Id: I6d5001a9ac250e3a87b958e9b665962a917265d6
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| #
1684c8d6 |
| 06-Nov-2023 |
Joanna Farley <joanna.farley@arm.com> |
Merge changes from topic "enable_assertion" into integration
* changes: feat(zynqmp): enable assertion feat(versal-net): enable assertion feat(versal): enable assertion
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| #
2243ba3c |
| 31-Oct-2023 |
Amit Nagal <amit.nagal@amd.com> |
feat(zynqmp): enable assertion
Retain assertions in builds for TF-A run from DDR with ENABLE_ASSERTIONS=1. It helps to catch programming errors (e.g. bad argument provided by platform porting functi
feat(zynqmp): enable assertion
Retain assertions in builds for TF-A run from DDR with ENABLE_ASSERTIONS=1. It helps to catch programming errors (e.g. bad argument provided by platform porting function) code size change is 4k. For debug builds, assertions are enabled by default. The same change is done by Tegra: plat/nvidia/tegra/platform.mk.
Change-Id: I1790862616faddf68b4d533750722dad27cae269 Signed-off-by: Amit Nagal <amit.nagal@amd.com>
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| #
f8363a8e |
| 17-Oct-2023 |
Joanna Farley <joanna.farley@arm.com> |
Merge changes from topic "xlnx_dtb_console" into integration
* changes: feat(versal-net): retrieval of console information from dtb feat(versal): retrieval of console information from dtb refa
Merge changes from topic "xlnx_dtb_console" into integration
* changes: feat(versal-net): retrieval of console information from dtb feat(versal): retrieval of console information from dtb refactor(xilinx): create generic function for clock retrieval feat(zynqmp): retrieval of console information from dtb
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| #
39234622 |
| 19-Sep-2023 |
Prasad Kummari <prasad.kummari@amd.com> |
feat(zynqmp): retrieval of console information from dtb
Introduces functionality to retrieve console information from the device tree (DTB) and use it in TF-A code.
With fdt_get_stdout_node_offset(
feat(zynqmp): retrieval of console information from dtb
Introduces functionality to retrieve console information from the device tree (DTB) and use it in TF-A code.
With fdt_get_stdout_node_offset() function, which reads the 'secure-chosen' first,'chosen' and 'stdout-path' properties from the DTB, providing a convenient and standardized way to access serial console information.
Implemented a comparison mechanism between early console information and the data populated from the DTB. In case of a mismatch, the commit takes care of unregistering the build-time console configuration and registering the DTB-based console.
Reorganizes the console configuration setup in BL31 by moving it to a dedicated function called setup_console() in the plat_console.c file. This change improves code readability by isolating console-related settings, making it easier to manage and extend the console configuration in the future.
Signed-off-by: Prasad Kummari <prasad.kummari@amd.com> Change-Id: I857042fc0fb8f070bbc11f6b47aa57a72fbe5392
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| #
b06b509e |
| 09-Oct-2023 |
Joanna Farley <joanna.farley@arm.com> |
Merge changes from topic "refactor_prepare_dtb" into integration
* changes: refactor(zynqmp): use common code for prepare_dtb refactor(xilinx): remove multiple return paths in prepare_dtb
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| #
10f8a397 |
| 27-Sep-2023 |
Amit Nagal <amit.nagal@amd.com> |
refactor(zynqmp): use common code for prepare_dtb
use common code definition and remove zynqmp local definition for prepare_dtb in dtb flows.
Change-Id: I362b90b96852e9afccc8a2e23d3b7f709280fba7 Si
refactor(zynqmp): use common code for prepare_dtb
use common code definition and remove zynqmp local definition for prepare_dtb in dtb flows.
Change-Id: I362b90b96852e9afccc8a2e23d3b7f709280fba7 Signed-off-by: Amit Nagal <amit.nagal@amd.com>
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| #
16f19ed1 |
| 07-Aug-2023 |
Manish V Badarkhe <manish.badarkhe@arm.com> |
Merge changes from topic "xlnx_zynmp_tsp" into integration
* changes: chore(zynqmp): remove unused configuration from TSP fix(zynqmp): resolve runtime error in TSP
|