chore(zynqmp): print entry address to Secure and NS world

The base address for BL32 and BL33 is read from the FSBL to TF-A
handoff params.
Print the base address for BL32 and BL33 as entry to the se

chore(zynqmp): print entry address to Secure and NS world

The base address for BL32 and BL33 is read from the FSBL to TF-A
handoff params.
Print the base address for BL32 and BL33 as entry to the secure and
non-secure world respectively in the release build.

Change-Id: Icc976fccb56b565f78001d87b02180ced6437a43
Signed-off-by: Akshay Belsare <akshay.belsare@amd.com>

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Merge "fix(zynqmp): conditional reservation of memory in DTB" into integration

fix(zynqmp): conditional reservation of memory in DTB

When the TF-A is placed in DDR memory range, the DDR memory range is
getting explicitly reserved in the default device tree by TF-A.
This create

fix(zynqmp): conditional reservation of memory in DTB

When the TF-A is placed in DDR memory range, the DDR memory range is
getting explicitly reserved in the default device tree by TF-A.
This creates an error condition in the use case where Device tree is
not present or it is present at a different location.

To fix this, a new build time parameter, XILINX_OF_BOARD_DTB_ADDR, is
introduced. The TF-A will reserve the DDR memory only when a valid
DTB address is provided to XILINX_OF_BOARD_DTB_ADDR during build.

Now the user has options, either manually reserve the desired
DDR address range for TF-A in device tree or let TF-A access and modify
the device tree, to reserve the DDR address range, in runtime using
the build parameter.

Change-Id: I846fa373ba9f7c984eda3a55ccaaa622082cad81
Signed-off-by: Akshay Belsare <akshay.belsare@amd.com>

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Merge "feat(zynqmp): add hooks for mmap and early setup" into integration

feat(zynqmp): add hooks for mmap and early setup

Add early setup hooks (via custom_early_setup()) and provide a way
to cover custom memory mapping which includes extending memory map
via custom_mmap

feat(zynqmp): add hooks for mmap and early setup

Add early setup hooks (via custom_early_setup()) and provide a way
to cover custom memory mapping which includes extending memory map
via custom_mmap_add().

This likely also require to align MAX_XLAT_TABLE, MAX_XLAT_TABLES
macros. It can be done for example by defining these macros in
custom_pkg.mk
MAX_MMAP_REGIONS := XY
$(eval $(call add_define,MAX_MMAP_REGIONS))
MAX_XLAT_TABLES := XZ
$(eval $(call add_define,MAX_XLAT_TABLES))

custom_early_setup() can be used for early low level operations
related to setting up the system to correct state.

Signed-off-by: Amit Nagal <amit.nagal@amd.com>
Change-Id: I61df6f9ba5af0bc97c430974fb10a2edde44f23d

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Merge "fix(zynqmp): panic w/o handoff structure in !JTAG" into integration

fix(zynqmp): panic w/o handoff structure in !JTAG

In case that FSBL (or SPL) doesn't provide valid handoff structure don't
fallback to default image location. In non JTAG boot mode all the time
stru

fix(zynqmp): panic w/o handoff structure in !JTAG

In case that FSBL (or SPL) doesn't provide valid handoff structure don't
fallback to default image location. In non JTAG boot mode all the time
structure should be passed. If it is not it can be opportunity to inject
any code to default locations and start it. That's why panic in all
these cases.

Change-Id: Ib3e11e2ae9ffec7406002cce4997b12b97bdc396
Signed-off-by: Michal Simek <michal.simek@amd.com>

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Merge "fix(zynqmp): fix bl31_zynqmp_setup.c coding style" into integration

fix(zynqmp): fix bl31_zynqmp_setup.c coding style

Fix trivial coding style violations.

Change-Id: I6bbabd58da641a3b823a3b43adc7921b923ecdcb
Signed-off-by: Michal Simek <michal.simek@amd.com>

Merge "fix(zynqmp): fix DT reserved allocated size" into integration

fix(zynqmp): fix DT reserved allocated size

BL31_LIMIT is not size but reserved node reg property contains base
address and size that's why BL31_LIMIT - BL31_BASE + 1 is correct size
of reseved spac

fix(zynqmp): fix DT reserved allocated size

BL31_LIMIT is not size but reserved node reg property contains base
address and size that's why BL31_LIMIT - BL31_BASE + 1 is correct size
of reseved space for BL31.
Also update warning message to cover that it is for BL31.

Change-Id: I53f53d2170eb873f758f9ba250d54f57f0b562b4
Signed-off-by: Michal Simek <michal.simek@amd.com>

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Merge changes from topic "xilinx-misc-changes" into integration

* changes:
chore(zynqmp): fix comment style in zynqmp_def.h
chore(versal): add missing dot at the end of sentence
fix(zynqmp): r

Merge changes from topic "xilinx-misc-changes" into integration

* changes:
chore(zynqmp): fix comment style in zynqmp_def.h
chore(versal): add missing dot at the end of sentence
fix(zynqmp): remove additional 0x in %p print
fix(versal): fix Misra-C violations in bl31_setup and pm_svc_main

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fix(zynqmp): remove additional 0x in %p print

%p is already printing value in hex that's why 0x prefix is not needed.
Origin message looks like this
"NOTICE: Can't read DT at 0x0x100000"
and after

fix(zynqmp): remove additional 0x in %p print

%p is already printing value in hex that's why 0x prefix is not needed.
Origin message looks like this
"NOTICE: Can't read DT at 0x0x100000"
and after fixing
"NOTICE: Can't read DT at 0x100000"

Signed-off-by: Michal Simek <michal.simek@amd.com>
Change-Id: If83c485a61441f6105d8cbd797f04060dfce2817

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Merge changes from topic "xlnx_zynqmp_misra_fix1" into integration

* changes:
fix(zynqmp): resolve the misra 8.6 warnings
fix(zynqmp): resolve the misra 4.6 warnings

fix(zynqmp): resolve the misra 4.6 warnings

MISRA Violation: MISRA-C:2012 R.4.6
- Using basic numerical type int rather than a typedef
that includes size and signedness information.

Signed-off-by:

fix(zynqmp): resolve the misra 4.6 warnings

MISRA Violation: MISRA-C:2012 R.4.6
- Using basic numerical type int rather than a typedef
that includes size and signedness information.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Change-Id: I9fb686e7aa2b85af6dfcb7bb5f87eddf469fb85c

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Merge changes from topic "xlnx_zynqmp_misra_fix" into integration

* changes:
fix(zynqmp): resolve misra 8.3 warnings
fix(zynqmp): resolve misra R8.4 warnings

fix(zynqmp): resolve misra 8.3 warnings

MISRA Violation: MISRA-C:2012 R.8.3
- Declaration uses a different parameter name than the one present in the
definition.

Signed-off-by: Venkatesh Yadav Abba

fix(zynqmp): resolve misra 8.3 warnings

MISRA Violation: MISRA-C:2012 R.8.3
- Declaration uses a different parameter name than the one present in the
definition.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Change-Id: Id0521afd7383df13870710b7dd2894e788896e5e

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Merge changes from topic "xlnx_zynqmp_misra" into integration

* changes:
fix(zynqmp): resolve misra R14.4 warnings
fix(zynqmp): resolve misra R16.3 warnings
fix(zynqmp): resolve misra R15.7 wa

Merge changes from topic "xlnx_zynqmp_misra" into integration

* changes:
fix(zynqmp): resolve misra R14.4 warnings
fix(zynqmp): resolve misra R16.3 warnings
fix(zynqmp): resolve misra R15.7 warnings
fix(zynqmp): resolve misra R15.6 warnings
fix(zynqmp): resolve misra 7.2 warnings
fix(zynqmp): resolve misra R10.3

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fix(zynqmp): resolve misra R14.4 warnings

MISRA Violation: MISRA-C:2012 R.14.4
The controlling expression of an if statement and the controlling
expression of an iteration-statement shall have essen

fix(zynqmp): resolve misra R14.4 warnings

MISRA Violation: MISRA-C:2012 R.14.4
The controlling expression of an if statement and the controlling
expression of an iteration-statement shall have essentially Boolean type.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Change-Id: I8f3f6f956d1d58ca201fb5895f12bcaabf2afd3b

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fix(zynqmp): resolve misra R15.7 warnings

MISRA Violation: MISRA-C:2012 R.15.7
- All if . . else if constructs shall be terminated
with an else statement.

Signed-off-by: Venkatesh Yadav Abbarapu <v

fix(zynqmp): resolve misra R15.7 warnings

MISRA Violation: MISRA-C:2012 R.15.7
- All if . . else if constructs shall be terminated
with an else statement.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Change-Id: If921ca7c30b2feea6535791aa15f4de7101c3134

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Merge changes from topic "uart1_console" into integration

* changes:
feat(versal): add UART1 as console
feat(zynqmp): add uart1 as console

feat(zynqmp): add uart1 as console

Currently only UART0 is handled as console device, fix the
code to support UART1 as console also.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xili

feat(zynqmp): add uart1 as console

Currently only UART0 is handled as console device, fix the
code to support UART1 as console also.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Change-Id: I08f69b65b78b967ceb7159f4a467aa5982b1f791

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Merge "feat(plat/zynqmp): extend DT description by TF-A" into integration

Merge "refactor(plat/zynqmp): optimize the code to save some space" into integration

refactor(plat/zynqmp): optimize the code to save some space

As there is constraint with the space for the release builds,
remove some of the legacy code.

Signed-off-by: Venkatesh Yadav Abbarapu <ve

refactor(plat/zynqmp): optimize the code to save some space

As there is constraint with the space for the release builds,
remove some of the legacy code.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Change-Id: I5b8b16f34ed8e480f16ab1aeac80b85cdb391852

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