History log of /rk3399_ARM-atf/plat/xilinx/versal/plat_psci.c (Results 26 – 50 of 63)
Revision Date Author Comments
# 778e2452 12-Aug-2024 Joanna Farley <joanna.farley@arm.com>

Merge changes from topic "xlnx_tfa_passthrough_plm_ipi_cmd" into integration

* changes:
docs(xilinx): update SMC documentation in TF-A
feat(xilinx): add feature check function for TF-A specific

Merge changes from topic "xlnx_tfa_passthrough_plm_ipi_cmd" into integration

* changes:
docs(xilinx): update SMC documentation in TF-A
feat(xilinx): add feature check function for TF-A specific APIs
feat(xilinx): update SiP SVC version number
feat(xilinx): update TF-A to passthrough all PLM commands
fix(xilinx): fix logic to read ipi response

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# 03fa6f42 24-Jun-2024 Jay Buddhabhatti <jay.buddhabhatti@amd.com>

fix(xilinx): fix logic to read ipi response

Currently, PLM IPI command supports total 8 32-bit payloads. But existing
logic to read IPI response in TF-A is trying to read 9 32-bit payloads
(ret stat

fix(xilinx): fix logic to read ipi response

Currently, PLM IPI command supports total 8 32-bit payloads. But existing
logic to read IPI response in TF-A is trying to read 9 32-bit payloads
(ret status + 8 ret payloads) in case of IPI_CRC_CHECK enabled which is
incorrect.

So, fix logic to read only 8 32-bit payloads (ret status + 6 ret payloads + CRC)
in case when IPI_CRC_CHECK is enabled and read 7 32-bit payloads
(ret status + 5 ret payloads + CRC) in case when IPI_CRC_CHECK is disabled.

Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
Change-Id: I0abca2f787cc7a66fdd5522e6bd15a9771029071

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# f1464cea 09-May-2024 Joanna Farley <joanna.farley@arm.com>

Merge changes I0e7650c0,I33acead9 into integration

* changes:
fix(xilinx): follow MISRA-C standards for condition check
fix(zynqmp): resolve null pointer dereferencing


# 655e62aa 08-May-2024 Ronak Jain <ronak.jain@amd.com>

fix(xilinx): follow MISRA-C standards for condition check

As per the MISRA-C standards, there should be proc == NULL not just
!proc.

Fix the same.

Change-Id: I0e7650c09b045882a0235869d7ef9fca27f96

fix(xilinx): follow MISRA-C standards for condition check

As per the MISRA-C standards, there should be proc == NULL not just
!proc.

Fix the same.

Change-Id: I0e7650c09b045882a0235869d7ef9fca27f96d9a
Signed-off-by: Ronak Jain <ronak.jain@amd.com>

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# b109b006 02-May-2024 Joanna Farley <joanna.farley@arm.com>

Merge "fix(xilinx): check proc variable before use" into integration


# 652c1ab1 19-Apr-2024 Michal Simek <michal.simek@amd.com>

fix(xilinx): check proc variable before use

Check return value from pm_get_proc() to make sure that CPU is valid.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Change-Id: If51b5d42ce87f31fd732

fix(xilinx): check proc variable before use

Check return value from pm_get_proc() to make sure that CPU is valid.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Change-Id: If51b5d42ce87f31fd732ab58ae8fcd0e2db0a2a8

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# 1064bc6c 22-Jan-2024 Joanna Farley <joanna.farley@arm.com>

Merge changes from topic "idling-during-subsystem-restart" into integration

* changes:
fix(xilinx): add console_flush() before shutdown
fix(xilinx): fix sending sgi to linux
feat(xilinx): add

Merge changes from topic "idling-during-subsystem-restart" into integration

* changes:
fix(xilinx): add console_flush() before shutdown
fix(xilinx): fix sending sgi to linux
feat(xilinx): add new state to identify cpu power down
feat(xilinx): request cpu power down from reset
feat(xilinx): power down all cores on receiving cpu pwrdwn req
feat(xilinx): add handler for power down req sgi irq
feat(xilinx): add wrapper to handle cpu power down req
fix(versal-net): use arm common GIC handlers
fix(xilinx): rename macros to align with ARM

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# 59497016 12-Sep-2023 Jay Buddhabhatti <jay.buddhabhatti@amd.com>

feat(xilinx): add new state to identify cpu power down

Currently there is only 1 state for CPU idle which is used while CPU
power down from Linux CPU idle feature. But CPU power down when firmware
s

feat(xilinx): add new state to identify cpu power down

Currently there is only 1 state for CPU idle which is used while CPU
power down from Linux CPU idle feature. But CPU power down when firmware
send CPU power down request needs new state in self suspend to
distinguish in firmware for CPU power down from power down request or CPU
power down from Linux CPU idle. So add new state PM_STATE_CPU_OFF to
indicate CPU power down from power down request from firmware.

PM_STATE_CPU_OFF state is supported from self-suspend version 3. So
added feature check which sends new state in case of new firmware and
old state i.e. PM_STATE_CPU_IDLE in case of old firmware.

Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
Change-Id: I4118e1b813e5f76fca7b7e9ca1cc598715203fb0

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# 88ee0816 19-Jun-2023 Jay Buddhabhatti <jay.buddhabhatti@amd.com>

feat(xilinx): request cpu power down from reset

Send subsystem restart notification to firmware when TF-A receives
system reset PSCI call. On receiving subsystem restart call, firmware
will send CPU

feat(xilinx): request cpu power down from reset

Send subsystem restart notification to firmware when TF-A receives
system reset PSCI call. On receiving subsystem restart call, firmware
will send CPU idle callback to TF-A for powering down all cores. Wait
for CPU idle callback from firmware and raise power down request to
all cores after it receives CPU idle callback to power down core.

Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
Change-Id: I50f417ae228017f38b648740dc90b2e8f1872620

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# e7644eb6 04-Jul-2023 Manish Pandey <manish.pandey2@arm.com>

Merge "chore(xilinx): reorder include files as per TF-A guidelines" into integration


# 01a326ab 22-Jun-2023 Prasad Kummari <prasad.kummari@amd.com>

chore(xilinx): reorder include files as per TF-A guidelines

This commit reorders the include files in accordance with the
guidelines provided by Trusted Firmware-A (TF-A).
The include files are rear

chore(xilinx): reorder include files as per TF-A guidelines

This commit reorders the include files in accordance with the
guidelines provided by Trusted Firmware-A (TF-A).
The include files are rearranged to ensure a consistent and
organized structure in the codebase, facilitating better
readability and maintainability.

https: //trustedfirmware-a.readthedocs.io/en/latest/process/coding-style.html#headers-and-inclusion
https://git.trustedfirmware.org/ci/tf-a-ci-scripts.git/tree/script/static-checks/

For example, to run header check:
/tf-a-ci-scripts/script/static-checks/check-include-order.py --tree ${PWD} > Includefileorder.txt

Signed-off-by: Prasad Kummari <prasad.kummari@amd.com>
Change-Id: Ia5802722e69859596b94f31ec40755adbf7d865b

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# f1b7a99a 23-Jun-2023 Joanna Farley <joanna.farley@arm.com>

Merge "chore(xilinx): follow kernel doc format for functional documentation" into integration


# de7ed953 09-Jun-2023 Prasad Kummari <prasad.kummari@amd.com>

chore(xilinx): follow kernel doc format for functional documentation

For TF-A, there is no format specified for functional documentation.
For AMD-Xilinx platforms, following kernel-doc format for th

chore(xilinx): follow kernel doc format for functional documentation

For TF-A, there is no format specified for functional documentation.
For AMD-Xilinx platforms, following kernel-doc format for the functional
documentation to make sure AMD-xilinx documentation is align with
actual code.

For example use kernel-doc from linux to call:
<linux>/scripts/kernel-doc -man -v 1 >/dev/null file...

Signed-off-by: Prasad Kummari <prasad.kummari@amd.com>
Change-Id: Idcc9def408b6c8da35b36f67ef82fc00890e998c

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# d84171b4 20-Apr-2023 Joanna Farley <joanna.farley@arm.com>

Merge "style(xilinx): replace ARM by Arm in copyrights" into integration


# 619bc13e 14-Apr-2023 Michal Simek <michal.simek@amd.com>

style(xilinx): replace ARM by Arm in copyrights

The commit 6bb49c876c75 ("style(hooks): adds Arm copyright style fix")
is enforcing proper case for ARM. That's why fix it in plat/xilinx to
make sure

style(xilinx): replace ARM by Arm in copyrights

The commit 6bb49c876c75 ("style(hooks): adds Arm copyright style fix")
is enforcing proper case for ARM. That's why fix it in plat/xilinx to
make sure that pre-commit.copyright won't be touching platform specific
files.

Change-Id: I49c66e18d46ed871a6aa128c9b2a403d0cf83416
Signed-off-by: Michal Simek <michal.simek@amd.com>

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# 24616541 01-Aug-2022 Joanna Farley <joanna.farley@arm.com>

Merge changes from topic "xlnx_misra" into integration

* changes:
fix(versal): resolve misra 10.1 warnings
fix(versal): resolve the misra 4.6 warnings


# f7c48d9e 31-Jul-2022 Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>

fix(versal): resolve the misra 4.6 warnings

MISRA Violation: MISRA-C:2012 R.4.6
- Using basic numerical type int rather than a typedef
that includes size and signedness information.

Signed-off-by:

fix(versal): resolve the misra 4.6 warnings

MISRA Violation: MISRA-C:2012 R.4.6
- Using basic numerical type int rather than a typedef
that includes size and signedness information.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Change-Id: Ieff90b5311a3bde8a2cb302ca81c23eeee6d235a

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# 40366cb6 24-Jun-2022 Manish Pandey <manish.pandey2@arm.com>

Merge changes from topic "xlnx_versal_misra_fix" into integration

* changes:
fix(versal): resolve misra 15.6 warnings
fix(zynqmp): resolve misra 8.13 warnings
fix(versal): resolve misra 8.13 w

Merge changes from topic "xlnx_versal_misra_fix" into integration

* changes:
fix(versal): resolve misra 15.6 warnings
fix(zynqmp): resolve misra 8.13 warnings
fix(versal): resolve misra 8.13 warnings
fix(versal): resolve the misra 4.6 warnings

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# 912b7a6f 24-May-2022 Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>

fix(versal): resolve the misra 4.6 warnings

MISRA Violation: MISRA-C:2012 R.4.6
- Using basic numerical type int rather than a typedef
that includes size and signedness information.

Signed-off-by:

fix(versal): resolve the misra 4.6 warnings

MISRA Violation: MISRA-C:2012 R.4.6
- Using basic numerical type int rather than a typedef
that includes size and signedness information.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Change-Id: I4eccce7e238f283348a5013e2e45c91435b4ae4e

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# 29ad12a7 01-Dec-2021 Manish Pandey <manish.pandey2@arm.com>

Merge changes Ia0d13c3c,I8cf821a4,I1e6a598b,I9c6dd8db,Iaf6db75e, ... into integration

* changes:
fix(plat/xilinx/versal): resolve misra R10.6
fix(plat/xilinx/versal): resolve misra R14.4
fix(p

Merge changes Ia0d13c3c,I8cf821a4,I1e6a598b,I9c6dd8db,Iaf6db75e, ... into integration

* changes:
fix(plat/xilinx/versal): resolve misra R10.6
fix(plat/xilinx/versal): resolve misra R14.4
fix(plat/xilinx/versal): resolve misra R17.7
fix(plat/xilinx/versal): resolve misra R10.3
fix(plat/xilinx/versal): resolve misra R7.2
fix(plat/xilinx/versal): resolve misra R15.7
fix(plat/xilinx/versal): resolve misra R15.6
fix(plat/xilinx/versal): resolve misra R10.1 in pm services
fix(plat/xilinx/versal): resolve misra R20.7 in pm services
fix(plat/xilinx/versal): resolve misra R10.3 in pm services
fix(plat/xilinx/versal): resolve misra R10.6 in pm services
fix(plat/xilinx/versal): resolve misra R16.3 in pm services
fix(plat/xilinx/versal): resolve misra R15.6 in pm services

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# a62c40d4 20-Aug-2021 Abhyuday Godhasara <abhyuday.godhasara@xilinx.com>

fix(plat/xilinx/versal): resolve misra R14.4

MISRA Violation: MISRA-C:2012 R.14.4
- The controlling expression of an if statement and the controlling
expression of an iteration-statement shall hav

fix(plat/xilinx/versal): resolve misra R14.4

MISRA Violation: MISRA-C:2012 R.14.4
- The controlling expression of an if statement and the controlling
expression of an iteration-statement shall have essentially Boolean type.

Signed-off-by: Abhyuday Godhasara <abhyuday.godhasara@xilinx.com>
Change-Id: I8cf821a42015858200cc0c514600012c8f61061f

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# 526a1fd1 20-Aug-2021 Abhyuday Godhasara <abhyuday.godhasara@xilinx.com>

fix(plat/xilinx/versal): resolve misra R17.7

MISRA Violation: MISRA-C:2012 R.17.7
- The value returned by a function having non-void return type shall be
used ((void) missing for discarded return

fix(plat/xilinx/versal): resolve misra R17.7

MISRA Violation: MISRA-C:2012 R.17.7
- The value returned by a function having non-void return type shall be
used ((void) missing for discarded return value.).

Signed-off-by: Abhyuday Godhasara <abhyuday.godhasara@xilinx.com>
Change-Id: I1e6a598b9fe6c571a3e5010ee832ef860dfe491d

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# b2bb3efb 13-Aug-2021 Abhyuday Godhasara <abhyuday.godhasara@xilinx.com>

fix(plat/xilinx/versal): resolve misra R10.3

MISRA Violation: MISRA-C:2012 R.10.3
- The value of an expression shall not be assigned to an object with a
narrower essential type or of a different e

fix(plat/xilinx/versal): resolve misra R10.3

MISRA Violation: MISRA-C:2012 R.10.3
- The value of an expression shall not be assigned to an object with a
narrower essential type or of a different essential type category

Signed-off-by: Abhyuday Godhasara <abhyuday.godhasara@xilinx.com>
Change-Id: I9c6dd8dba40db8067b46947ceff295732648612a

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# 0623dcea 11-Aug-2021 Abhyuday Godhasara <abhyuday.godhasara@xilinx.com>

fix(plat/xilinx/versal): resolve misra R7.2

MISRA Violation: MISRA-C:2012 R.7.2
- A "u" or "U" suffix shall be applied to all integer constants that are
represented in an unsigned type

Signed-off

fix(plat/xilinx/versal): resolve misra R7.2

MISRA Violation: MISRA-C:2012 R.7.2
- A "u" or "U" suffix shall be applied to all integer constants that are
represented in an unsigned type

Signed-off-by: Abhyuday Godhasara <abhyuday.godhasara@xilinx.com>
Change-Id: Iaf6db75e42913ddceccb803426287d0c47d7f31d

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# b9fa2d9f 09-Aug-2021 Abhyuday Godhasara <abhyuday.godhasara@xilinx.com>

fix(plat/xilinx/versal): resolve misra R15.6

MISRA Violation: MISRA-C:2012 R.15.6
- The body of an iteration-statement or a selection-statement shall be
a compound statement

Signed-off-by: Abhyud

fix(plat/xilinx/versal): resolve misra R15.6

MISRA Violation: MISRA-C:2012 R.15.6
- The body of an iteration-statement or a selection-statement shall be
a compound statement

Signed-off-by: Abhyuday Godhasara <abhyuday.godhasara@xilinx.com>
Change-Id: If1ccaa2f254ac85a329295de501e2b5558e8ff43

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