fix(xilinx): miscellaneous fixes for xilinx platforms

This patch gathers miscellaneous minor fixes to the xilinx
platforms like tabs for indentation and misra 10.1 warnings.

Signed-off-by: Michal S

fix(xilinx): miscellaneous fixes for xilinx platforms

This patch gathers miscellaneous minor fixes to the xilinx
platforms like tabs for indentation and misra 10.1 warnings.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Change-Id: I4cdb89ffec7d5abc64e065ed5b5e5d10b30ab9f9

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fix(versal): remove clock related macros

TF-A doesn't configure clock on Versal. Setup is done by previous
bootloader (called PLM) that's why there is no need to have macro listed in
headers. Also p

fix(versal): remove clock related macros

TF-A doesn't configure clock on Versal. Setup is done by previous
bootloader (called PLM) that's why there is no need to have macro listed in
headers. Also previous phase can disable access to these registers that's
why better to remove them.

Change-Id: I53ba344ad932c532b0babdce9d2b26e4c2c1b846
Signed-off-by: Michal Simek <michal.simek@amd.com>

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feat(versal): resolve the misra 10.1 warnings

MISRA Violation: MISRA-C:2012 R.10.1
-The operand to the operator does not have an essentially unsigned type.

Signed-off-by: Venkatesh Yadav Abbarapu <

feat(versal): resolve the misra 10.1 warnings

MISRA Violation: MISRA-C:2012 R.10.1
-The operand to the operator does not have an essentially unsigned type.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Change-Id: I9cde2f1ebceaad8a41c69489ef1d2e6f21f04ed1

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fix(versal): resolve the misra 4.6 warnings

MISRA Violation: MISRA-C:2012 R.4.6
- Using basic numerical type int rather than a typedef
that includes size and signedness information.

Signed-off-by:

fix(versal): resolve the misra 4.6 warnings

MISRA Violation: MISRA-C:2012 R.4.6
- Using basic numerical type int rather than a typedef
that includes size and signedness information.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Change-Id: I4eccce7e238f283348a5013e2e45c91435b4ae4e

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feat(xilinx): add SPP/EMU platform support for versal

This patch adds SPP/EMU platform support for Xilinx Versal and
also updating the documentation.

Signed-off-by: Venkatesh Yadav Abbarapu <venkat

feat(xilinx): add SPP/EMU platform support for versal

This patch adds SPP/EMU platform support for Xilinx Versal and
also updating the documentation.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Change-Id: Ibdadec4d00cd33ea32332299e7a00de31dc9d60b

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fix(plat/xilinx/versal): resolve misra R10.3

MISRA Violation: MISRA-C:2012 R.10.3
- The value of an expression shall not be assigned to an object with a
narrower essential type or of a different e

fix(plat/xilinx/versal): resolve misra R10.3

MISRA Violation: MISRA-C:2012 R.10.3
- The value of an expression shall not be assigned to an object with a
narrower essential type or of a different essential type category

Signed-off-by: Abhyuday Godhasara <abhyuday.godhasara@xilinx.com>
Change-Id: I9c6dd8dba40db8067b46947ceff295732648612a

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fix(plat/xilinx/versal): resolve misra R7.2

MISRA Violation: MISRA-C:2012 R.7.2
- A "u" or "U" suffix shall be applied to all integer constants that are
represented in an unsigned type

Signed-off

fix(plat/xilinx/versal): resolve misra R7.2

MISRA Violation: MISRA-C:2012 R.7.2
- A "u" or "U" suffix shall be applied to all integer constants that are
represented in an unsigned type

Signed-off-by: Abhyuday Godhasara <abhyuday.godhasara@xilinx.com>
Change-Id: Iaf6db75e42913ddceccb803426287d0c47d7f31d

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fix(plat/xilinx/versal): resolve misra R10.3 in pm services

MISRA Violation: MISRA-C:2012 R.10.3
- The value of an expression shall not be assigned to an object with a
narrower essential type or o

fix(plat/xilinx/versal): resolve misra R10.3 in pm services

MISRA Violation: MISRA-C:2012 R.10.3
- The value of an expression shall not be assigned to an object with a
narrower essential type or of a different essential type category

Signed-off-by: Abhyuday Godhasara <abhyuday.godhasara@xilinx.com>
Change-Id: I73c056ff4df2f14e04c92a49ac5c97e578e82107

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fix(plat/xilinx/versal/include): correct IPI buffer offset

Use proper offset for IPI data based on offset for IPI0
channel.

Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Signed-off-by: Abhyuday

fix(plat/xilinx/versal/include): correct IPI buffer offset

Use proper offset for IPI data based on offset for IPI0
channel.

Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Signed-off-by: Abhyuday Godhasara <abhyuday.godhasara@xilinx.com>
Change-Id: I3070517944dd353c3733aa595df0da030127751a

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plat: xilinx: Error management support

Add support for the trapping the IPI in TF-A.
Register handler for the irq no 62 which is the IPI interrupt.

Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.d

plat: xilinx: Error management support

Add support for the trapping the IPI in TF-A.
Register handler for the irq no 62 which is the IPI interrupt.

Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com>
Change-Id: I9c04fdae7be3dda6a34a9b196274c0b5fdf39223
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>

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plat: xilinx: versal: Add the IPI CRC checksum macro support

Add support for CRC checksum for IPI data when the macro
IPI_CRC_CHECK is enabled.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.ab

plat: xilinx: versal: Add the IPI CRC checksum macro support

Add support for CRC checksum for IPI data when the macro
IPI_CRC_CHECK is enabled.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Change-Id: I3c25c715885759076055c6505471339b5d6edcd5

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plat:xilinx:versal: Add JTAG DCC support

As per the new multi-console framework, updating the JTAG DCC support.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Acked-by: Mic

plat:xilinx:versal: Add JTAG DCC support

As per the new multi-console framework, updating the JTAG DCC support.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Change-Id: I77994ce387caf0d695986df3d01d414a920978d0

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plat: xilinx: versal: Mark IPI calls secure/non-secure

BIT24 of IPI command header is used to determine if caller is
secure or non-secure.

Mark BIT24 of IPI command header as non-secure if SMC call

plat: xilinx: versal: Mark IPI calls secure/non-secure

BIT24 of IPI command header is used to determine if caller is
secure or non-secure.

Mark BIT24 of IPI command header as non-secure if SMC caller
is non-secure.

Signed-off-by: Tejas Patel <tejas.patel@xilinx.com>
Signed-off-by: Abhyuday Godhasara <abhyuday.godhasara@xilinx.com>
Change-Id: Iec25af8f4b202093f58e858ee47cd9cd46890267

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