feat(stm32mp21): add PWR registers file

Use the new file stm32mp21_pwr.h for STM32MP21 PWR peripheral registers
definition. Update platform code for backup domain write protection
disabling.

Change

feat(stm32mp21): add PWR registers file

Use the new file stm32mp21_pwr.h for STM32MP21 PWR peripheral registers
definition. Update platform code for backup domain write protection
disabling.

Change-Id: Iedfa764529bcd5119be8e94da7f7b84699e86086
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>

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feat(st): introduce SoC family compilation switch

add STM32MP1X and STM3MP2X compilation switch to replace
#if STM32MP21 || STM32MP23 || STM32MP25 for MP2 SoCs and
#if STM32MP13 || STM32MP15 for MP1

feat(st): introduce SoC family compilation switch

add STM32MP1X and STM3MP2X compilation switch to replace
#if STM32MP21 || STM32MP23 || STM32MP25 for MP2 SoCs and
#if STM32MP13 || STM32MP15 for MP1 SoCs.

This will avoid to forget to modify all these files when a new SoC is
introduced.

Change-Id: Ib984b22a19e08af5bc1b62fe2032f10240ec9122
Signed-off-by: Maxime Méré <maxime.mere@foss.st.com>

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docs(stm32mp2): introduce new STM32MP23 family

STM32MP23 is a derivative from STM32MP25. It comes in 3 different lines:
- STM32MP235: Dual Cortex-A35 + Cortex-M33 - 2x Ethernet - 2x CAN FD

docs(stm32mp2): introduce new STM32MP23 family

STM32MP23 is a derivative from STM32MP25. It comes in 3 different lines:
- STM32MP235: Dual Cortex-A35 + Cortex-M33 - 2x Ethernet - 2x CAN FD
H264 - 3D GPU - AI / NN - LVDS / DSI
- STM32MP233: Dual Cortex-A35 + Cortex-M33 - 2x Ethernet - 2x CAN FD
- STM32MP231: Single Cortex-A35 + Cortex-M33 - 1x Ethernet

Change-Id: Iaf3dd7e0c1eda055063361af3c98855b1272d4c6
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>

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docs(stm32mp2): introduce new STM32MP21 family

STM32MP21 is a derivative from STM32MP25. It comes in 3 different lines:
- STM32MP215: Single Cortex-A35 + Cortex-M33 - 2x Ethernet - 2x CAN FD

docs(stm32mp2): introduce new STM32MP21 family

STM32MP21 is a derivative from STM32MP25. It comes in 3 different lines:
- STM32MP215: Single Cortex-A35 + Cortex-M33 - 2x Ethernet - 2x CAN FD
CSI - LTDC
- STM32MP213: Single Cortex-A35 + Cortex-M33 - 2x Ethernet - 2x CAN FD
- STM32MP211: Single Cortex-A35 + Cortex-M33 - 1x Ethernet

Change-Id: Ie3db430bedd86c3b444bec647792be24b20a0cba
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>

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fix(stm32mp2): correct typo in definition header

Fix a typo about the platform in a comment (STM32MP2 instead
of STM32MP1).

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Change-I

fix(stm32mp2): correct typo in definition header

Fix a typo about the platform in a comment (STM32MP2 instead
of STM32MP1).

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Change-Id: I6a58b659d97d7143e277dea57d4eede7729092bc

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feat(auth): extend REGISTER_CRYPTO_LIB calls

Extend REGISTER_CRYPTO_LIB calls with NULL to allow for
the addition of the cryto_mod_finish() function.

Signed-off-by: Lauren Wehrmeister <lauren.wehrm

feat(auth): extend REGISTER_CRYPTO_LIB calls

Extend REGISTER_CRYPTO_LIB calls with NULL to allow for
the addition of the cryto_mod_finish() function.

Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com>
Change-Id: If41ed1be50e1d98b42b266c7905269f142bb67c7

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feat(auth): introducing auth.mk

Introducing authentication specific makefile auth.mk to include common
auth source files.

Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com>
Change-Id: I

feat(auth): introducing auth.mk

Introducing authentication specific makefile auth.mk to include common
auth source files.

Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com>
Change-Id: Ifb07c48861fe415d82cb7390c3a5f6e60ba699d9

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feat(st): adapt .stm32 file creation for clang

The LLVM/clang linker (ld.lld) does not genrate the same map file as
GCC. Adapt the commands to retrieve the load address and entry point
from this new

feat(st): adapt .stm32 file creation for clang

The LLVM/clang linker (ld.lld) does not genrate the same map file as
GCC. Adapt the commands to retrieve the load address and entry point
from this new file.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I54d18f01a96f14f2dc6d5844dc1e8085220706ae

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feat(st): adapt stm32 linker scripts for clang

With Clang, the address inside a section does not seem relative to its
start address. Use ABSOLUTE keyword for those addresses.
For stm32 binary contai

feat(st): adapt stm32 linker scripts for clang

With Clang, the address inside a section does not seem relative to its
start address. Use ABSOLUTE keyword for those addresses.
For stm32 binary containing BL2 and its DT, we can use that as PIE is
not used (either disabled or used with BL2_IN_XIP_MEM).
This is still working with GCC.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I4e06c8a72c41370695db27fb6c52414487dfae47

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feat(st): update stm32 linker scripts

Remove an extra dot for the .data section.
Use FILL(0) instead of *(.data*). There is nothing there matching this
expression and was just use to have a filler.

feat(st): update stm32 linker scripts

Remove an extra dot for the .data section.
Use FILL(0) instead of *(.data*). There is nothing there matching this
expression and was just use to have a filler. Use explicit FILL(0)
instead.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: Ib5fc7dcdfe2b34b6892602512b8ae4115d45f307

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fix(st): mark INCBIN-generated sections as SHF_ALLOC

This is the same as rk3399 patch[1], add "a" option for sections
added to create stm32 file (containing BL2 and its DTB) in order to
properly lin

fix(st): mark INCBIN-generated sections as SHF_ALLOC

This is the same as rk3399 patch[1], add "a" option for sections
added to create stm32 file (containing BL2 and its DTB) in order to
properly link with clang.
This is still working with GCC.

[1]: 279cad8ed3 fix(rk3399): mark INCBIN-generated sections as SHF_ALLOC

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: Id5db55580c9c156aa6bf616c7c09a9307bca85f9

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feat(st): remove unsupported option for clang

Clang supports -Wformat-signedness starting from version 19. As it is
not yet very deployed, enable the warning only for GCC.

Signed-off-by: Yann Gauti

feat(st): remove unsupported option for clang

Clang supports -Wformat-signedness starting from version 19. As it is
not yet very deployed, enable the warning only for GCC.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: Ib941a04a64b62402a5d47c561530912c62f29838

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feat(stm32mp2): use USART1 for debug console on ultra-fly boards

This commit configures the debug console to use USART1 for
ultra-fly boards, ensuring the early console works as expected
on these bo

feat(stm32mp2): use USART1 for debug console on ultra-fly boards

This commit configures the debug console to use USART1 for
ultra-fly boards, ensuring the early console works as expected
on these boards.

These changes are specific to the ultra-fly boards and do not
affect any other boards.

Change-Id: I17f2c50779426dc31a8e85d6903141c331882c86
Signed-off-by: Boerge Struempfel <boerge.struempfel@gmail.com>

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Merge changes I5aabe415,Ief6fb4fc into integration

* changes:
feat(stm32mp15-fdts): add SP_MIN versions of DT files
feat(st): use dedicated version of DT for SP_MIN

feat(stm32mp2): disable PIE by default on STM32MP2 platform

Allow to disable ENABLE_PIE on STM32MP2. BL31 is loaded at the beginning
of SYSRAM whatever the options set. Set ENABLE_PIE to 0 by defaul

feat(stm32mp2): disable PIE by default on STM32MP2 platform

Allow to disable ENABLE_PIE on STM32MP2. BL31 is loaded at the beginning
of SYSRAM whatever the options set. Set ENABLE_PIE to 0 by default.
This should allow us to reduce BL31 and BL2 size.

Change-Id: Ie8c83c9205e81301eb1fdcf24b94216172586630
Signed-off-by: Maxime Méré <maxime.mere@foss.st.com>

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refactor(stm32mp2): remove useless STM32MP_SEC_SYSRAM_SIZE

The macro STM32MP_SEC_SYSRAM_SIZE only redefine STM32MP_SYSRAM_SIZE.
Directly use the latter one and remove the STM32MP_SEC_SYSRAM_SIZE.

S

refactor(stm32mp2): remove useless STM32MP_SEC_SYSRAM_SIZE

The macro STM32MP_SEC_SYSRAM_SIZE only redefine STM32MP_SYSRAM_SIZE.
Directly use the latter one and remove the STM32MP_SEC_SYSRAM_SIZE.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I9cca19fda7294be3f31ec74293ce122037541d12

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feat(st): use dedicated version of DT for SP_MIN

If an STM32MP15 board is compiled for SP_MIN, and a specific DT file
ending with "-sp_min.dts" exist, then this file will be used to generate
BL2 and

feat(st): use dedicated version of DT for SP_MIN

If an STM32MP15 board is compiled for SP_MIN, and a specific DT file
ending with "-sp_min.dts" exist, then this file will be used to generate
BL2 and BL32 DT.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: Ief6fb4fcf302d07f958a0e2764b149759127f21f

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chore(docs): drop the "wfi" from `pwr_domain_pwr_down_wfi`

To allow for generic handling of a wakeup, this hook is no longer
expected to call wfi itself. Update the name everywhere to reflect this
e

chore(docs): drop the "wfi" from `pwr_domain_pwr_down_wfi`

To allow for generic handling of a wakeup, this hook is no longer
expected to call wfi itself. Update the name everywhere to reflect this
expectation so that future platform implementers don't get misled.

Change-Id: Ic33f0b6da74592ad6778fd802c2f0b85223af614
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>

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fix(stm32mp2): correct early/crash console init

The previous code used 64-bit registers as the target and source for
load and store operations on 32-bit hardware registers. In certain
cases (e.g., w

fix(stm32mp2): correct early/crash console init

The previous code used 64-bit registers as the target and source for
load and store operations on 32-bit hardware registers. In certain
cases (e.g., when using USART1 as the debug console), this could result
in deadlocks where the A35 gets stuck in a permanent loop due to test
conditions that are never fulfilled.

To resolve this issue, 32-bit registers are now used for these
operations.

Change-Id: Id2c03a1df26738fe815079da042cc2dd989f4f8e
Signed-off-by: Boerge Struempfel <boerge.struempfel@gmail.com>

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build: remove Windows compatibility layer

For a couple of releases now we have officially withdrawn support for
building TF-A on Windows using the native environment, relying instead
on POSIX emulat

build: remove Windows compatibility layer

For a couple of releases now we have officially withdrawn support for
building TF-A on Windows using the native environment, relying instead
on POSIX emulation layers like MSYS2, Mingw64, Cygwin or WSL.

This change removes the remainder of the OS compatibility layer
entirely, and migrates the build system over to explicitly relying on a
POSIX environment.

Change-Id: I8fb60d998162422e958009afd17eab826e3bc39b
Signed-off-by: Chris Kay <chris.kay@arm.com>

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Merge "feat(stm32mp2): add FWU support" into integration

feat(stm32mp2): add a runtime service for STGEN configuration

Other component such as OP-TEE may have the responsibility for
STGEN configuration but updating Arm CNTFRQ can only be done from
EL3. Th

feat(stm32mp2): add a runtime service for STGEN configuration

Other component such as OP-TEE may have the responsibility for
STGEN configuration but updating Arm CNTFRQ can only be done from
EL3. Therefore, implement a SiP SMC handler for this purpose and
a runtime service to catch SIP SMCs.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Signed-off-by: Maxime Méré <maxime.mere@foss.st.com>
Change-Id: I7854e1ae6328f149798b43d52bb1ecdf71a5aa69

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feat(stm32mp2): add common SMC runtime services

Implement the common SMC runtime services for stm32mp2 platforms.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Signed-off-by: Max

feat(stm32mp2): add common SMC runtime services

Implement the common SMC runtime services for stm32mp2 platforms.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Signed-off-by: Maxime Méré <maxime.mere@foss.st.com>
Change-Id: I214e4b2bfba439572c079bbc9ffb62bc87793ce9

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feat(stm32mp1): rework SVC services

Having two generations of STM32MPX using the same SMCCC protocol,
rework the SVC services setup to put in common what can be put
in common and implement platform-

feat(stm32mp1): rework SVC services

Having two generations of STM32MPX using the same SMCCC protocol,
rework the SVC services setup to put in common what can be put
in common and implement platform-specific handlers.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Signed-off-by: Maxime Méré <maxime.mere@foss.st.com>
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I000573e50d55dc70163c2657c12cc84085416f6b

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feat(stm32mp2): add FWU support

Add stm32_get_bkpr_fwu_info_addr() function.
Call stm32_fwu_set_boot_idx() in bl2_plat_handle_post_image_load().

Signed-off-by: Yann Gautier <yann.gautier@foss.st.co

feat(stm32mp2): add FWU support

Add stm32_get_bkpr_fwu_info_addr() function.
Call stm32_fwu_set_boot_idx() in bl2_plat_handle_post_image_load().

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: Ieb57dffa4ce784d1ed61b401dc17376fe745c111

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