| #
be1d3a1a |
| 19-May-2022 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge changes from topic "gpt-crc" into integration
* changes:
feat(partition): verify crc while loading gpt header
build(hikey): platform changes for verifying gpt header crc
build(agilex): p
Merge changes from topic "gpt-crc" into integration
* changes:
feat(partition): verify crc while loading gpt header
build(hikey): platform changes for verifying gpt header crc
build(agilex): platform changes for verifying gpt header crc
build(stratix10): platform changes for verifying gpt header crc
build(stm32mp1): platform changes for verifying gpt header crc
show more ...
|
| #
7da7f1f0 |
| 18-May-2022 |
Rohit Ner <rohitner@google.com> |
build(stm32mp1): platform changes for verifying gpt header crc
This change makes the necessary additions to makefile of
platforms using partition driver.
Signed-off-by: Rohit Ner <rohitner@google.c
build(stm32mp1): platform changes for verifying gpt header crc
This change makes the necessary additions to makefile of
platforms using partition driver.
Signed-off-by: Rohit Ner <rohitner@google.com>
Change-Id: I66f6daaa0deac984b0aa5f2a182385410189ba8a
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|
| #
115748b2 |
| 22-Apr-2022 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "fix(stm32mp1): correct dtc version check" into integration
|
| #
429f10e3 |
| 22-Apr-2022 |
Yann Gautier <yann.gautier@foss.st.com> |
fix(stm32mp1): correct dtc version check
Depending on the shell used, the grep command can fail, leading to
a wrong dtc version detection. Correct that by adding quotes.
Signed-off-by: Yann Gautier
fix(stm32mp1): correct dtc version check
Depending on the shell used, the grep command can fail, leading to
a wrong dtc version detection. Correct that by adding quotes.
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: I329ec929559c94bf1bf99b127662c9d978e067cf
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|
| #
1bbe2135 |
| 05-Apr-2022 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "fix(st): remove extra chars from dtc version" into integration
|
| #
03d20776 |
| 28-Mar-2022 |
Yann Gautier <yann.gautier@st.com> |
fix(st): remove extra chars from dtc version
In some implementations of dtc tool (e.g. with yocto), there can be a 'v'
at the beginning of the version, and a '+' at the end. Just keep numbers
then,
fix(st): remove extra chars from dtc version
In some implementations of dtc tool (e.g. with yocto), there can be a 'v'
at the beginning of the version, and a '+' at the end. Just keep numbers
then, with a grep -o.
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I180e97ab75ba3e5ceacb4b1961a1f22788b428a3
show more ...
|
| #
2ff6a49e |
| 22-Mar-2022 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes from topic "stm32mp13" into integration
* changes:
feat(stm32mp1): select platform compilation either by flag or DT
feat(stm32mp1-fdts): add support for STM32MP13 DK board
feat(s
Merge changes from topic "stm32mp13" into integration
* changes:
feat(stm32mp1): select platform compilation either by flag or DT
feat(stm32mp1-fdts): add support for STM32MP13 DK board
feat(stm32mp1-fdts): add DDR support for STM32MP13
feat(stm32mp1-fdts): add st-io_policies node for STM32MP13
feat(stm32mp1): updates for STM32MP13 device tree compilation
feat(stm32mp1-fdts): add DT files for STM32MP13
feat(dt-bindings): add TZC400 bindings for STM32MP13
feat(stm32mp1): add "Boot mode" management for STM32MP13
feat(stm32mp1): manage HSLV on STM32MP13
feat(stm32mp1): add sdmmc compatible in platform define
feat(st-sdmmc2): allow compatible to be defined in platform code
feat(stm32mp1): update IO compensation on STM32MP13
feat(stm32mp1): call pmic_voltages_init() in platform init
feat(st-pmic): add pmic_voltages_init() function
feat(stm32mp1): update CFG0 OTP for STM32MP13
feat(stm32mp1): usb descriptor update for STM32MP13
feat(st-clock): add clock driver for STM32MP13
feat(dt-bindings): add bindings for STM32MP13
feat(stm32mp1): get CPU info from SYSCFG on STM32MP13
feat(stm32mp1): use only one filter for TZC400 on STM32MP13
feat(stm32mp1): add a second fixed regulator
feat(stm32mp1): adaptations for STM32MP13 image header
feat(stm32mp1): update boot API for header v2.0
feat(stm32mp1): update IP addresses for STM32MP13
feat(stm32mp1): add part numbers for STM32MP13
feat(stm32mp1): chip rev. Z is 0x1001 on STM32MP13
feat(stm32mp1): update BACKUP_BOOT_MODE for STM32MP13
feat(stm32mp1): stm32mp_is_single_core() for STM32MP13
feat(stm32mp1): remove unsupported features on STM32MP13
feat(stm32mp1): update memory mapping for STM32MP13
feat(stm32mp1): introduce new flag for STM32MP13
feat(st): update stm32image tool for header v2
show more ...
|
| #
99a5d8d0 |
| 01-Apr-2021 |
Yann Gautier <yann.gautier@st.com> |
feat(stm32mp1): select platform compilation either by flag or DT
To choose either STM32MP13 or STM32MP15, one of the two flags can be
set to 1 in the make command line. Or the platform selection can
feat(stm32mp1): select platform compilation either by flag or DT
To choose either STM32MP13 or STM32MP15, one of the two flags can be
set to 1 in the make command line. Or the platform selection can be
done with device tree name, if it begins with stm32mp13 or stm32mp15.
Change-Id: I72f42665c105b71a84b4952ef3fcd6c06ae4598c
Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com>
Signed-off-by: Yann Gautier <yann.gautier@st.com>
show more ...
|
| #
d38eaf99 |
| 25-Feb-2020 |
Yann Gautier <yann.gautier@st.com> |
feat(stm32mp1): updates for STM32MP13 device tree compilation
Add stm32mp13_bl2.dtsi files.
Update compilation variables for STM32MP13.
Change-Id: Ia3aa3abfe09c04c1a57541e565c212aa094e285c
Signed-o
feat(stm32mp1): updates for STM32MP13 device tree compilation
Add stm32mp13_bl2.dtsi files.
Update compilation variables for STM32MP13.
Change-Id: Ia3aa3abfe09c04c1a57541e565c212aa094e285c
Signed-off-by: Yann Gautier <yann.gautier@st.com>
show more ...
|
| #
9be88e75 |
| 11-Mar-2020 |
Gabriel Fernandez <gabriel.fernandez@st.com> |
feat(st-clock): add clock driver for STM32MP13
Add new clock driver for STM32MP13. Split the include file to manage
either STM32MP13 or STM32MP15.
Change-Id: Ia568cd12b1d5538809204f0fd2224d51e5d1e9
feat(st-clock): add clock driver for STM32MP13
Add new clock driver for STM32MP13. Split the include file to manage
either STM32MP13 or STM32MP15.
Change-Id: Ia568cd12b1d5538809204f0fd2224d51e5d1e985
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
show more ...
|
| #
111a384c |
| 12-Feb-2020 |
Yann Gautier <yann.gautier@st.com> |
feat(stm32mp1): remove unsupported features on STM32MP13
* GPIO: On STM32MP13, there are no banks GPIOJ, GPIOK and GPIOZ.
* STM32MP13 is a single Cortex-A7 CPU: remove reset from MPU1
and reset fr
feat(stm32mp1): remove unsupported features on STM32MP13
* GPIO: On STM32MP13, there are no banks GPIOJ, GPIOK and GPIOZ.
* STM32MP13 is a single Cortex-A7 CPU: remove reset from MPU1
and reset from MCU traces
* There is no MCU on STM32MP13. Put MCU security management
under STM32MP15 flag.
* The authentication feature is not supported yet on STM32MP13,
put the code under SPM32MP15 flag.
* On STM32MP13, the monotonic counter is managed in ROM code, keep
the monotonic counter update just for STM32MP15.
* SYSCFG: put registers not present on STM32MP13 under STM32MP15
flag, as the code that manages them.
* PMIC: use ldo3 during DDR configuration only for STM32MP15
* Reset UART pins on USB boot is no more required.
Change-Id: Iceba59484a9bb02828fe7e99f3ecafe69c837bc7
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
show more ...
|
| #
bdec516e |
| 18-Dec-2020 |
Sebastien Pasdeloup <sebastien.pasdeloup-ext@st.com> |
feat(stm32mp1): introduce new flag for STM32MP13
STM32MP13 is a variant of STM32MP1, with a single Cortex-A7, and no
Cortex-M4.
There is only one DDR port.
SP_min is not supported, only OP-TEE can b
feat(stm32mp1): introduce new flag for STM32MP13
STM32MP13 is a variant of STM32MP1, with a single Cortex-A7, and no
Cortex-M4.
There is only one DDR port.
SP_min is not supported, only OP-TEE can be used as monitor.
STM32MP13 uses the header v2.0 format for stm32image generation
for BL2.
Change-Id: Ie5b0e3230c5e064fe96f3561fc5b3208914dea53
Signed-off-by: Yann Gautier <yann.gautier@st.com>
show more ...
|
| #
2d8886ac |
| 18-Nov-2019 |
Nicolas Le Bayon <nicolas.le.bayon@st.com> |
feat(st): update stm32image tool for header v2
The stm32image tool is updated to manage new header v2.0 for BL2
images.
Add new structure for the header v2.0 management.
Adapt to keep compatibility
feat(st): update stm32image tool for header v2
The stm32image tool is updated to manage new header v2.0 for BL2
images.
Add new structure for the header v2.0 management.
Adapt to keep compatibility with v1.0.
Add the header version major and minor in the command line
when executing the tool, as well as binary type (0x10 for BL2).
Change-Id: I70c187e8e7e95b57ab7cfad63df314307a78f1d6
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
show more ...
|
| #
815abebc |
| 18-Mar-2022 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge changes from topic "spectre_bhb" into integration
* changes:
fix(security): apply SMCCC_ARCH_WORKAROUND_3 to A73/A75/A72/A57
fix(security): workaround for CVE-2022-23960 for Cortex-A57, Co
Merge changes from topic "spectre_bhb" into integration
* changes:
fix(security): apply SMCCC_ARCH_WORKAROUND_3 to A73/A75/A72/A57
fix(security): workaround for CVE-2022-23960 for Cortex-A57, Cortex-A72
fix(fvp): disable reclaiming init code by default
show more ...
|
| #
9b2510b6 |
| 24-Feb-2022 |
Bipin Ravi <bipin.ravi@arm.com> |
fix(security): apply SMCCC_ARCH_WORKAROUND_3 to A73/A75/A72/A57
This patch applies CVE-2022-23960 workarounds for Cortex-A75,
Cortex-A73, Cortex-A72 & Cortex-A57. This patch also implements
the new
fix(security): apply SMCCC_ARCH_WORKAROUND_3 to A73/A75/A72/A57
This patch applies CVE-2022-23960 workarounds for Cortex-A75,
Cortex-A73, Cortex-A72 & Cortex-A57. This patch also implements
the new SMCCC_ARCH_WORKAROUND_3 and enables necessary discovery
hooks for Coxtex-A72, Cortex-A57, Cortex-A73 and Cortex-A75 to
enable discovery of this SMC via SMC_FEATURES. SMCCC_ARCH_WORKAROUND_3
is implemented for A57/A72 because some revisions are affected by both
CVE-2022-23960 and CVE-2017-5715 and this allows callers to replace
SMCCC_ARCH_WORKAROUND_1 calls with SMCCC_ARCH_WORKAROUND_3. For details
of SMCCC_ARCH_WORKAROUND_3, please refer SMCCCv1.4 specification.
Signed-off-by: Bipin Ravi <bipin.ravi@arm.com>
Signed-off-by: John Powell <john.powell@arm.com>
Change-Id: Ifa6d9c7baa6764924638efe3c70468f98d60ed7c
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|
| #
8dec6481 |
| 06-Mar-2022 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge changes from topic "st-uart-baudrate" into integration
* changes:
refactor(st): configure UART baudrate
docs(stm32mp1): document some compilation flags
feat(st-uart): manage oversampling
Merge changes from topic "st-uart-baudrate" into integration
* changes:
refactor(st): configure UART baudrate
docs(stm32mp1): document some compilation flags
feat(st-uart): manage oversampling by 8
fix(st-uart): correctly fill BRR register
show more ...
|
| #
99887cb9 |
| 02-Mar-2022 |
Yann Gautier <yann.gautier@foss.st.com> |
refactor(st): configure UART baudrate
Add the possibility to configure console UART baudrate, it can be passed
as a command line parameter with STM32MP_UART_BAUDRATE. The default value
remains 11520
refactor(st): configure UART baudrate
Add the possibility to configure console UART baudrate, it can be passed
as a command line parameter with STM32MP_UART_BAUDRATE. The default value
remains 115200.
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: I000df70c10b2b4dac1449556596f9820c36cf243
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|
| #
8d9c1b3c |
| 16-Feb-2022 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge changes from topic "st-format-signedness" into integration
* changes:
feat(stm32mp1): enable format-signedness warning
fix(stm32mp1): correct types in messages
fix(st-pmic): correct verb
Merge changes from topic "st-format-signedness" into integration
* changes:
feat(stm32mp1): enable format-signedness warning
fix(stm32mp1): correct types in messages
fix(st-pmic): correct verbose message
fix(st-sdmmc2): correct cmd_idx type in messages
fix(st-fmc): fix type in message
fix(mtd): correct types in messages
fix(usb): correct type in message
fix(tzc400): correct message with filter
fix(psci): correct parent_node type in messages
fix(libc): correct some messages
fix(fconf): correct image_id type in messages
fix(bl2): correct messages with image_id
show more ...
|
| #
22bbb34a |
| 15-Feb-2022 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge "refactor(stm32mp1): move PIE flag to SP_min" into integration
|
| #
cff26c19 |
| 14-Feb-2022 |
Yann Gautier <yann.gautier@st.com> |
feat(stm32mp1): enable format-signedness warning
Add the flag -Wformat-signedness to TF_CFLAGS for STM32MP1.
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I6af18778902b0a4dae1c08735d
feat(stm32mp1): enable format-signedness warning
Add the flag -Wformat-signedness to TF_CFLAGS for STM32MP1.
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I6af18778902b0a4dae1c08735d2d070ef3d137ce
show more ...
|
| #
56e8952f |
| 09-Feb-2022 |
Yann Gautier <yann.gautier@st.com> |
refactor(stm32mp1): move PIE flag to SP_min
The PIE compilation is used only for BL32, move the ENABLE_PIE to
sp_min-stm32mp1.mk file. Override PIE flags, as sp_min.mk file is
included after the fla
refactor(stm32mp1): move PIE flag to SP_min
The PIE compilation is used only for BL32, move the ENABLE_PIE to
sp_min-stm32mp1.mk file. Override PIE flags, as sp_min.mk file is
included after the flags are set in Makefile.
The BL2_IN_XIP_MEM was added for a feature not yet upstreamed.
It is then removed from platform.mk file.
Change-Id: If055e51e0f160f99cd4e4cf68ca718d4d693119c
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Nicolas Toromanoff <nicolas.toromanoff@foss.st.com>
show more ...
|
| #
bfc231c1 |
| 04-Feb-2022 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge "feat(st): add early console in BL2" into integration
|
| #
c768b2b2 |
| 18-Oct-2021 |
Yann Gautier <yann.gautier@st.com> |
feat(st): add early console in BL2
Add an early UART console to ease debug before UART is fully configured.
This is done under flag STM32MP_EARLY_CONSOLE in the first STM32MP1
platform function call
feat(st): add early console in BL2
Add an early UART console to ease debug before UART is fully configured.
This is done under flag STM32MP_EARLY_CONSOLE in the first STM32MP1
platform function called (bl2_el3_early_platform_setup()). It uses the
parameters defined for crash console: STM32MP_DEBUG_USART* macros.
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: Id6be62368723a0499e97bbf56fb52c166fcbdfad
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|
| #
20eb9d5b |
| 02-Feb-2022 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "fix(stm32mp1): remove interrupt_provider warning for dtc" into integration
|
| #
884a6506 |
| 31-Jan-2022 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge changes from topic "st-nvmem" into integration
* changes:
feat(stm32mp1): manage monotonic counter
feat(stm32mp1): new way to access platform OTP
feat(stm32mp1-fdts): update NVMEM nodes
Merge changes from topic "st-nvmem" into integration
* changes:
feat(stm32mp1): manage monotonic counter
feat(stm32mp1): new way to access platform OTP
feat(stm32mp1-fdts): update NVMEM nodes
refactor(st-drivers): improve BSEC driver
feat(stm32mp1-fdts): add nvmem_layout node and OTP definitions
feat(stm32mp1): add NVMEM layout compatibility definition
show more ...
|