Merge "fix(st): manage UART clock and reset only in BL2" into integration

fix(st): manage UART clock and reset only in BL2

As the UART is already initialized, no need to check for UART clock
or reset in next BL. An issue can appear if the next BL device tree
(e.g HW_CONFI

fix(st): manage UART clock and reset only in BL2

As the UART is already initialized, no need to check for UART clock
or reset in next BL. An issue can appear if the next BL device tree
(e.g HW_CONFIG) doesn't use the same clocks or resets (like SCMI ones).

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I044ef2386abe2d3dba5a53c3685440d64ca50a4f

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Merge changes from topic "clock_framework" into integration

* changes:
feat(st): use newly introduced clock framework
feat(clk): add a minimal clock framework

feat(st): use newly introduced clock framework

Replace calls to stm32mp_clk_enable() / stm32mp_clk_disable() /
stm32mp_clk_get_rate() with clk_enable() / clk_disable() /
clk_get_rate().

Change-Id:

feat(st): use newly introduced clock framework

Replace calls to stm32mp_clk_enable() / stm32mp_clk_disable() /
stm32mp_clk_get_rate() with clk_enable() / clk_disable() /
clk_get_rate().

Change-Id: I15d2ce57b9499211fa522a1b53eeee9cf584c111
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>

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Merge changes from topic "st_uart_update" into integration

* changes:
feat(st): protect UART during platform init
feat(stm32mp1): update console management for SP_min
refactor(stm32mp1): impro

Merge changes from topic "st_uart_update" into integration

* changes:
feat(st): protect UART during platform init
feat(stm32mp1): update console management for SP_min
refactor(stm32mp1): improve console management in BL2
feat(plat/st): add a function to configure console
feat(stm32mp1): add stm32_get_boot_interface function
refactor(stm32mp1): move stm32_save_boot_interface()
fix(stm32mp1): deconfigure UART RX pins
feat(stm32_gpio): add a function to reset a pin
refactor(stm32mp1): sort compilation flags
feat(stm32mp1): add sign-compare warning

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feat(st): protect UART during platform init

Protect the UART instance used for serial boot
with UART used for console.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Change-Id: Ieee1557b

feat(st): protect UART during platform init

Protect the UART instance used for serial boot
with UART used for console.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Change-Id: Ieee1557b34e7baa81594c3fbf0513191737027bf

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feat(stm32mp1): update console management for SP_min

Use stm32mp_uart_console_setup() in SP_min setup.
Adapt the function stm32mp_uart_console_setup() for BL32 (no reset, add
CONSOLE_FLAG_RUNTIME un

feat(stm32mp1): update console management for SP_min

Use stm32mp_uart_console_setup() in SP_min setup.
Adapt the function stm32mp_uart_console_setup() for BL32 (no reset, add
CONSOLE_FLAG_RUNTIME under DEBUG.

Change-Id: Ib2d35c8d285dafb680aa218872ad679cbf43d0ed
Signed-off-by: Yann Gautier <yann.gautier@st.com>

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feat(plat/st): add a function to configure console

To ease console configuration, a dedicated function is created:
stm32mp_uart_console_setup(). The code will also be common for the
different BLs.

feat(plat/st): add a function to configure console

To ease console configuration, a dedicated function is created:
stm32mp_uart_console_setup(). The code will also be common for the
different BLs.

Change-Id: Idf3cad756f125ca2313cf30b1311637a9df8f27f
Signed-off-by: Yann Gautier <yann.gautier@st.com>

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Merge "fix(plat/st): only check header major when booting" into integration

fix(plat/st): only check header major when booting

An STM32 image with the awaited header major version shouldn't be forbid
to boot. If the minor differs, then it means only non-mandatory options
ha

fix(plat/st): only check header major when booting

An STM32 image with the awaited header major version shouldn't be forbid
to boot. If the minor differs, then it means only non-mandatory options
have been added in the reserved fields, and the header remains backward
compatible.

Change-Id: Iff16b67f95c728e2f1d128bd1760a4be497c5ca3
Signed-off-by: Yann Gautier <yann.gautier@st.com>

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Merge changes from topic "st_fip_fconf" into integration

* changes:
feat(plat/st): use FIP to load images
refactor(plat/st): updates for OP-TEE
feat(lib/optee): introduce optee_header_is_valid

Merge changes from topic "st_fip_fconf" into integration

* changes:
feat(plat/st): use FIP to load images
refactor(plat/st): updates for OP-TEE
feat(lib/optee): introduce optee_header_is_valid()

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feat(plat/st): use FIP to load images

BL2 still uses the STM32 header binary format to be loaded from ROM code.
BL32 and BL33 and their respective device tree files are now put together
in a FIP fil

feat(plat/st): use FIP to load images

BL2 still uses the STM32 header binary format to be loaded from ROM code.
BL32 and BL33 and their respective device tree files are now put together
in a FIP file.
One DTB is created for each BL. To reduce their sizes, 2 new dtsi file are
in charge of removing useless nodes for a given BL. This is done because
BL2 and BL32 share the same device tree files base.

The previous way of booting is still available, the compilation flag
STM32MP_USE_STM32IMAGE has to be set to 1 in the make command. Some files
are duplicated and their names modified with _stm32_ to avoid too much
switches in the code.

Change-Id: I1ffada0af58486d4cf6044511b51e56b52269817
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>

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Merge changes from topic "st_fip_fconf" into integration

* changes:
feat(io_mtd): offset management for FIP usage
feat(nand): count bad blocks before a given offset
feat(plat/st): add helper t

Merge changes from topic "st_fip_fconf" into integration

* changes:
feat(io_mtd): offset management for FIP usage
feat(nand): count bad blocks before a given offset
feat(plat/st): add helper to save boot interface
fix(plat/st): improve DDR get size function
refactor(plat/st): map DDR secure at boot
refactor(plat/st): rework TZC400 configuration

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feat(plat/st): add helper to save boot interface

Some parameters from BootROM boot context can be required after boot.
To save space in SYSRAM, this context can be overwritten during images
load seq

feat(plat/st): add helper to save boot interface

Some parameters from BootROM boot context can be required after boot.
To save space in SYSRAM, this context can be overwritten during images
load sequence. The needed information (here the boot interface) is
then saved in a local variable.

Change-Id: I5e1ad4630ccf78480f415a0a83939005ae67729e
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>

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refactor(plat/st): map DDR secure at boot

In BL2, the DDR can be mapped as secured in MMU, as no other SW
has access to it during its execution.
The TZC400 configuration is also updated to reflect t

refactor(plat/st): map DDR secure at boot

In BL2, the DDR can be mapped as secured in MMU, as no other SW
has access to it during its execution.
The TZC400 configuration is also updated to reflect this. When using
OP-TEE, the TZC400 is reconfigured at the end of BL2, to match OP-TEE
mapping. Else, SP_min will be in charge to reconfigure TZC400 to set
DDR non-secure.

Change-Id: Ic5ec614b218f733796feeab1cdc425d28cc7c103
Signed-off-by: Yann Gautier <yann.gautier@st.com>

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Merge changes from topic "soc_id" into integration

* changes:
refactor(plat/nvidia): use SOC_ID defines
refactor(plat/mediatek): use SOC_ID defines
refactor(plat/arm): use SOC_ID defines
fea

Merge changes from topic "soc_id" into integration

* changes:
refactor(plat/nvidia): use SOC_ID defines
refactor(plat/mediatek): use SOC_ID defines
refactor(plat/arm): use SOC_ID defines
feat(plat/st): implement platform functions for SMCCC_ARCH_SOC_ID
refactor(plat/st): export functions to get SoC information
feat(smccc): add bit definition for SMCCC_ARCH_SOC_ID

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feat(plat/st): implement platform functions for SMCCC_ARCH_SOC_ID

The JEDEC information for STMicroelectronics is:
JEDEC_ST_MFID U(0x20)
JEDEC_ST_BKID U(0x0)
And rely on platform functions to get ch

feat(plat/st): implement platform functions for SMCCC_ARCH_SOC_ID

The JEDEC information for STMicroelectronics is:
JEDEC_ST_MFID U(0x20)
JEDEC_ST_BKID U(0x0)
And rely on platform functions to get chip IP and revision.

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: I4fa4ac8bb5583b1871b768decc9fe08e8966ff54

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Merge changes from topic "stm32mp1_plat_updates" into integration

* changes:
docs: update STM32MP1 with versions details
stm32mp1: get peripheral base address from a define
stm32mp1: add finis

Merge changes from topic "stm32mp1_plat_updates" into integration

* changes:
docs: update STM32MP1 with versions details
stm32mp1: get peripheral base address from a define
stm32mp1: add finished good variant in board identifier

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stm32mp1: get peripheral base address from a define

Retrieve peripheral base address from a define instead of
parsing the device tree. The goal is to improve execution time.

Signed-off-by: Pascal P

stm32mp1: get peripheral base address from a define

Retrieve peripheral base address from a define instead of
parsing the device tree. The goal is to improve execution time.

Signed-off-by: Pascal Paillet <p.paillet@st.com>
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I2588c53ad3d4abcc3d7fe156458434a7940dd72b

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Merge "plat/st: move GPIO bank helper function to platform source files" into integration

plat/st: move GPIO bank helper function to platform source files

Relation between GPIO banks and their base address and offset address
if platform dependent. This change moves helper functions
stm32

plat/st: move GPIO bank helper function to platform source files

Relation between GPIO banks and their base address and offset address
if platform dependent. This change moves helper functions
stm32_get_gpio_bank_base() and stm32_get_gpio_bank_offset() from
plat/st/common to plat/st/stm32mp1/.

Change-Id: Id3d03e585746aa5509c6fab7d88183a92d561e3f
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>

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Merge changes from topic "ddr_map" into integration

* changes:
stm32mp1: use stm32mp_get_ddr_ns_size() function
stm32mp1: set XN attribute for some areas in BL2
stm32mp1: dynamically map DDR l

Merge changes from topic "ddr_map" into integration

* changes:
stm32mp1: use stm32mp_get_ddr_ns_size() function
stm32mp1: set XN attribute for some areas in BL2
stm32mp1: dynamically map DDR later and non-cacheable during its test
stm32mp1: add a function to get non-secure DDR size

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stm32mp1: dynamically map DDR later and non-cacheable during its test

A speculative accesses to DDR could be done whereas it was not reachable
and could lead to bus stall.
To correct this the dynami

stm32mp1: dynamically map DDR later and non-cacheable during its test

A speculative accesses to DDR could be done whereas it was not reachable
and could lead to bus stall.
To correct this the dynamic mapping in MMU is used.
A first mapping is done for DDR tests with MT_NON_CACHEABLE attribute,
once DDR access is setup. It is then unmapped and a new mapping DDR is done
with cacheable attribute (through MT_MEMORY) to speed-up BL33 (or OP-TEE)
load.

The disabling of cache during DDR tests is also removed, as now useless.
A call to new functions stm32mp_{,un}map_ddr_non_cacheable() is done
instead.

PLAT_XLAT_TABLES_DYNAMIC is activated globally as used in BL2 and BL32.

BL33 max size is also updated to take into account the secure and shared
memory areas. Those are used in OP-TEE case.

Change-Id: I22c48b4a48255ee264991c34ecbb15bfe87e67c3
Signed-off-by: Yann Gautier <yann.gautier@st.com>

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Merge changes from topic "yg/stm32mp1_wdg_updates" into integration

* changes:
mmc: stm32_sdmmc2: correctly manage block size
mmc: stm32_sdmmc2: manage max-frequency property from DT
stm32mp1:

Merge changes from topic "yg/stm32mp1_wdg_updates" into integration

* changes:
mmc: stm32_sdmmc2: correctly manage block size
mmc: stm32_sdmmc2: manage max-frequency property from DT
stm32mp1: move check_header() to common code
stm32mp1: keep console during runtime
stm32mp1: sp_min: initialize MMU and cache earlier
stm32mp1: add support for LpDDR3
stm32mp1: use a common function to check spinlock is available
clk: stm32mp: enable RTCAPB clock for dual-core chips
stm32mp1: check if the SoC is single core
stm32mp1: print information about board
stm32mp1: print information about SoC
stm32mp1: add watchdog support

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stm32mp1: move check_header() to common code

This function can be used on several stm32mp devices, it is then moved in
plat/st/common/stm32mp_common.c.

Change-Id: I862debe39604410f71a9ddc2871302636

stm32mp1: move check_header() to common code

This function can be used on several stm32mp devices, it is then moved in
plat/st/common/stm32mp_common.c.

Change-Id: I862debe39604410f71a9ddc28713026362e9ecda
Signed-off-by: Yann Gautier <yann.gautier@st.com>

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