| #
b3add9cb |
| 14-Feb-2020 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Merge changes from topic "uniphier" into integration
* changes: uniphier: make I/O register region configurable uniphier: make PSCI related base address configurable uniphier: make counter con
Merge changes from topic "uniphier" into integration
* changes: uniphier: make I/O register region configurable uniphier: make PSCI related base address configurable uniphier: make counter control base address configurable uniphier: make UART base address configurable uniphier: make pinmon base address configurable uniphier: make NAND controller base address configurable uniphier: make eMMC controller base address configurable
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| #
ce620fa9 |
| 13-Feb-2020 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Merge changes from topic "uniphier" into integration
* changes: uniphier: extend boot device detection for future SoCs uniphier: change block_addressing flag to bool uniphier: change the retur
Merge changes from topic "uniphier" into integration
* changes: uniphier: extend boot device detection for future SoCs uniphier: change block_addressing flag to bool uniphier: change the return value type of .is_usb_boot() to bool
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| #
eba319be |
| 03-Feb-2020 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
uniphier: make I/O register region configurable
The I/O register region will be changed in the next SoC. Make it configurable.
Change-Id: Iec0cbd1ef2d0703ebc7c3d3082edd73791bbfec9 Signed-off-by: Ma
uniphier: make I/O register region configurable
The I/O register region will be changed in the next SoC. Make it configurable.
Change-Id: Iec0cbd1ef2d0703ebc7c3d3082edd73791bbfec9 Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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| #
2cb26005 |
| 03-Feb-2020 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
uniphier: extend boot device detection for future SoCs
The next SoC will have: - No boot swap - SD boot - No USB boot
Add new fields to handle this.
Change-Id: I772395f2c5dfc612e575b0cbd0657
uniphier: extend boot device detection for future SoCs
The next SoC will have: - No boot swap - SD boot - No USB boot
Add new fields to handle this.
Change-Id: I772395f2c5dfc612e575b0cbd0657a5fa9611c25 Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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| #
eea5b880 |
| 03-Feb-2020 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
uniphier: make PSCI related base address configurable
The register base address will be changed in the next SoC. Make it configurable.
Change-Id: Ibe07bd9db128b0f7e629916cb6ae21ba7984eca9 Signed-of
uniphier: make PSCI related base address configurable
The register base address will be changed in the next SoC. Make it configurable.
Change-Id: Ibe07bd9db128b0f7e629916cb6ae21ba7984eca9 Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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| #
4511322f |
| 03-Feb-2020 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
uniphier: make UART base address configurable
The next SoC supports the same UART, but the register base will be changed. Make it configurable.
Change-Id: Ida5c9151b2f3554afd15555b22838437eef443f7
uniphier: make UART base address configurable
The next SoC supports the same UART, but the register base will be changed. Make it configurable.
Change-Id: Ida5c9151b2f3554afd15555b22838437eef443f7 Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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| #
bda9cd70 |
| 03-Feb-2020 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
uniphier: make NAND controller base address configurable
The next SoC does not support the NAND controller, but make the base address configurable for consistency and future proof.
Change-Id: I776e
uniphier: make NAND controller base address configurable
The next SoC does not support the NAND controller, but make the base address configurable for consistency and future proof.
Change-Id: I776e43ff2b0408577919b0b72849c3e1e5ce0758 Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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| #
070dcbf5 |
| 03-Feb-2020 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
uniphier: make eMMC controller base address configurable
The next SoC supports the same eMMC controller, but the register base will be changed. Make it configurable.
Change-Id: I00cb5531bc3d8d49357
uniphier: make eMMC controller base address configurable
The next SoC supports the same eMMC controller, but the register base will be changed. Make it configurable.
Change-Id: I00cb5531bc3d8d49357ad5e922cdd3d785355edf Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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| #
0281e60c |
| 27-Jan-2020 |
Soby Mathew <soby.mathew@arm.com> |
Merge changes from topic "pie" into integration
* changes: uniphier: make all BL images completely position-independent uniphier: make uniphier_mmap_setup() work with PIE uniphier: pass SCP ba
Merge changes from topic "pie" into integration
* changes: uniphier: make all BL images completely position-independent uniphier: make uniphier_mmap_setup() work with PIE uniphier: pass SCP base address as a function parameter uniphier: set buffer offset and length for io_block dynamically uniphier: use more mmap_add_dynamic_region() for loading images bl_common: add BL_END macro uniphier: turn on ENABLE_PIE TSP: add PIE support BL2_AT_EL3: add PIE support BL31: discard .dynsym .dynstr .hash sections to make ENABLE_PIE work PIE: pass PIE options only to BL31 Build: support per-BL LDFLAGS
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| #
7af21317 |
| 17-Jan-2020 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
uniphier: make all BL images completely position-independent
This platform supports multiple SoCs. The next SoC will still keep quite similar architecture, but the memory base will be changed.
The
uniphier: make all BL images completely position-independent
This platform supports multiple SoCs. The next SoC will still keep quite similar architecture, but the memory base will be changed.
The ENABLE_PIE improves the maintainability and usability. You can reuse a single set of BL images for other SoC/board without re-compiling TF-A at all. This will also keep the code cleaner because it avoids #ifdef around various base addresses.
By defining ENABLE_PIE, BL2_AT_EL3, BL31, and BL32 (TSP) are really position-independent now. You can load them anywhere irrespective of their link address.
Change-Id: I8d5e3124ee30012f5b3bfa278b0baff8efd2fff7 Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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| #
c64873ab |
| 17-Jan-2020 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
uniphier: make uniphier_mmap_setup() work with PIE
BL2_BASE, BL31_BASE, and BL32_BASE are defined in platform_def.h, that is, determined at link-time.
On the other hand, BL2_END, BL31_END, and BL32
uniphier: make uniphier_mmap_setup() work with PIE
BL2_BASE, BL31_BASE, and BL32_BASE are defined in platform_def.h, that is, determined at link-time.
On the other hand, BL2_END, BL31_END, and BL32_END are derived from the symbols produced by the linker scripts. So, they are fixed-up at run-time if ENABLE_PIE is enabled.
To make it work in a position-indepenent manner, use BL_CODE_BASE and BL_END, both of which are relocatable.
Change-Id: Ic179a7c60eb64c5f3024b178690b3ac7cbd7521b Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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| #
577b2441 |
| 17-Jan-2020 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
uniphier: pass SCP base address as a function parameter
Currently, UNIPHIER_SCP_BASE is hard-coded in uniphier_scp_start(), which is not handy for PIE.
Towards the goal of making this really positi
uniphier: pass SCP base address as a function parameter
Currently, UNIPHIER_SCP_BASE is hard-coded in uniphier_scp_start(), which is not handy for PIE.
Towards the goal of making this really position-independent, pass in image_info->image_base.
Change-Id: I88e020a1919c607b1d5ce70b116201d95773bb63 Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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| #
b79b3177 |
| 17-Jan-2020 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
uniphier: set buffer offset and length for io_block dynamically
Currently, the .buffer field in io_block_dev_spec is statically set, which is not handy for PIE.
Towards the goal of making this real
uniphier: set buffer offset and length for io_block dynamically
Currently, the .buffer field in io_block_dev_spec is statically set, which is not handy for PIE.
Towards the goal of making this really position-independent, set the buffer length and length in the uniphier_io_block_setup() function.
Change-Id: I22b20d7b58d6ffd38f64f967a2820fca4bd7dade Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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| #
b5dd85f2 |
| 17-Jan-2020 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
uniphier: use more mmap_add_dynamic_region() for loading images
Currently, uniphier_bl2_mmap hard-codes the memory region needed for loading other images.
Towards the goal of making this really pos
uniphier: use more mmap_add_dynamic_region() for loading images
Currently, uniphier_bl2_mmap hard-codes the memory region needed for loading other images.
Towards the goal of making this really position-independent, call mmap_add_dynamic_region() before that region gets accessed.
Change-Id: Ieb505b91ccf2483e5f1a280accda564b33f19f11 Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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| #
9d068f66 |
| 08-Nov-2018 |
Antonio Niño Díaz <antonio.ninodiaz@arm.com> |
Merge pull request #1673 from antonio-nino-diaz-arm/an/headers
Standardise header guards across codebase
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| #
c3cf06f1 |
| 08-Nov-2018 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
Standardise header guards across codebase
All identifiers, regardless of use, that start with two underscores are reserved. This means they can't be used in header guards.
The style that this proje
Standardise header guards across codebase
All identifiers, regardless of use, that start with two underscores are reserved. This means they can't be used in header guards.
The style that this project is now to use the full name of the file in capital letters followed by 'H'. For example, for a file called "uart_example.h", the header guard is UART_EXAMPLE_H.
The exceptions are files that are imported from other projects:
- CryptoCell driver - dt-bindings folders - zlib headers
Change-Id: I50561bf6c88b491ec440d0c8385c74650f3c106e Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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| #
6f2ad3a9 |
| 01-Nov-2018 |
Antonio Niño Díaz <antonio.ninodiaz@arm.com> |
Merge pull request #1656 from masahir0y/uniphier
uniphier: clean-up and improve SCP handling code
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| #
8be7850f |
| 04-Oct-2018 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
uniphier: terminate boot if SCP_BL2 image is missing in SCP boot mode
Skipping SCP_BL2 image is just a temporary workaround. If on-chip SCP needs to work, BL2 should load the SCP_BL2 image.
Signed-
uniphier: terminate boot if SCP_BL2 image is missing in SCP boot mode
Skipping SCP_BL2 image is just a temporary workaround. If on-chip SCP needs to work, BL2 should load the SCP_BL2 image.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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6d4f6aea |
| 22-Aug-2018 |
Dimitris Papastamos <dimitris.papastamos@arm.com> |
Merge pull request #1528 from antonio-nino-diaz-arm/an/libc
libc: Cleanup library
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| #
93c78ed2 |
| 16-Aug-2018 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
libc: Fix all includes in codebase
The codebase was using non-standard headers. It is needed to replace them by the correct ones so that we can use the new libc headers.
Change-Id: I530f71d9510cb03
libc: Fix all includes in codebase
The codebase was using non-standard headers. It is needed to replace them by the correct ones so that we can use the new libc headers.
Change-Id: I530f71d9510cb036e69fe79823c8230afe890b9d Acked-by: Sumit Garg <sumit.garg@linaro.org> Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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| #
9fd2f13b |
| 06-Feb-2018 |
davidcunado-arm <david.cunado@arm.com> |
Merge pull request #1224 from masahir0y/gzip
Support GZIP-compressed images for faster loading and verification
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| #
8951b058 |
| 26-Jan-2018 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
uniphier: support GZIP-compressed images
Allow to handle GZIP-compressed images by giving FIP_GZIP=1 from the command line.
- Images are GZIP-compressed, then packed into FIP. If Trusted Board B
uniphier: support GZIP-compressed images
Allow to handle GZIP-compressed images by giving FIP_GZIP=1 from the command line.
- Images are GZIP-compressed, then packed into FIP. If Trusted Board Boot is enabled, certificates are generated based on the compressed images.
- GZIP decompressor is linked into BL2 to decompress images at run-time.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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| #
0ac60c08 |
| 01-Feb-2018 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
uniphier: add a helper to get image_info
In the next commit, I will have more usecases to get struct image_info from image ID. It is better to make a helper function at a different layer. I do not
uniphier: add a helper to get image_info
In the next commit, I will have more usecases to get struct image_info from image ID. It is better to make a helper function at a different layer. I do not need the current uniphier_image_descs_fixup() since the code is small enough to be squashed into the caller side.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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| #
f478253d |
| 25-Jan-2018 |
davidcunado-arm <david.cunado@arm.com> |
Merge pull request #1232 from masahir0y/uniphier
uniphier: migrate to BL2-AT-EL3
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| #
247fc043 |
| 19-Dec-2017 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
uniphier: switch to BL2-AT-EL3 and remove BL1 support
UniPhier platform implements non-TF boot ROM. Prior to the BL2-AT-EL3 support, BL1 (worked as a pseudo ROM) was needed just for ensuring BL2 is
uniphier: switch to BL2-AT-EL3 and remove BL1 support
UniPhier platform implements non-TF boot ROM. Prior to the BL2-AT-EL3 support, BL1 (worked as a pseudo ROM) was needed just for ensuring BL2 is entered at EL1-S. Now, this platform is able to avoid this waste.
Enable the BL2_AT_EL3 option, and remove BL1.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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