| 4d5d98c7 | 28-Sep-2016 |
Caesar Wang <wxt@rock-chips.com> |
rockchip: fixes the clock select and divide register for rk3399
As the new RK3399TRM v1.1, there are some wrong set for CRU_CLKSEL_CON register.
As the CRU_CLKSEL_CON96~107 high 16-bit isn't write
rockchip: fixes the clock select and divide register for rk3399
As the new RK3399TRM v1.1, there are some wrong set for CRU_CLKSEL_CON register.
As the CRU_CLKSEL_CON96~107 high 16-bit isn't write mask and the CRU_CLKSEL_CON offset is 0x100,not 0x80.
Change-Id: Ie127e9de74b87100af9a0150aad43e89e4972529
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| d9738fbc | 14-Sep-2016 |
davidcunado-arm <david.cunado@arm.com> |
Merge pull request #700 from rockchip-linux/fixes-typo-and-warnings
rockchip: Fixes typo and warnings |
| 0587788a | 13-Sep-2016 |
Caesar Wang <wxt@rock-chips.com> |
rockchip: fixes the gic panic for rk3399 resume
We make sure the resuming of gic need to be enabled. Otherwise, The resume will hit the below panic. ... [ 24.230541] CPU0: update max cpu_capacity
rockchip: fixes the gic panic for rk3399 resume
We make sure the resuming of gic need to be enabled. Otherwise, The resume will hit the below panic. ... [ 24.230541] CPU0: update max cpu_capacity 451 [ 24.236029] CPU5: update max cpu_capacity 1024 [ 24.236046] CPU4: shutdown [ 24.243205] psci: CPU4 killed. [ 24.258730] CPU5: shutdown [ 24.261472] psci: CPU5 killed. [ 24.270417] GIC: unable to set SRE (disabled at EL2), panic ahead [ 24.270417] cat[7801]: undefined instruction: pc=ffffffc0004e65d0 [ 24.270417] Code: b0003940 91274400 97f871af d2801e00 (d5184600) [ 24.270417] Internal error: Oops - undefined instruction: 0 [#1] PREEMPT
Change-Id: Ie9542c8d5768ba0accfa073453da8bfe06d4f921
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| 7e1bedb6 | 09-Sep-2016 |
Caesar Wang <wxt@rock-chips.com> |
rockchip: fixes some typo
As the checkpatch reports the warning or error.
plat/rockchip/common/plat_pm.c:96: ERROR: do not set execute permissions for source files plat/rockchip/rk3399/drivers/pmu/
rockchip: fixes some typo
As the checkpatch reports the warning or error.
plat/rockchip/common/plat_pm.c:96: ERROR: do not set execute permissions for source files plat/rockchip/rk3399/drivers/pmu/pmu.c:294: ERROR: do not set execute permissions for source files
plat/rockchip/common/plat_pm.c:286: WARNING: line over 80 characters plat/rockchip/common/plat_pm.c:287: WARNING: line over 80 characters
Change-Id: Ib347da21c56551c31df3f90f03777b13c75d5c26
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| a8656400 | 09-Sep-2016 |
Caesar Wang <wxt@rock-chips.com> |
rockchip: SIP call use 32 bit return value for rk3399
for compatible 32bit and 64bit, we use 0x82xxxxxx as function ID, we modify SIP call function return value to 32 bit.
Change-Id: Ib99b03a9ea423
rockchip: SIP call use 32 bit return value for rk3399
for compatible 32bit and 64bit, we use 0x82xxxxxx as function ID, we modify SIP call function return value to 32 bit.
Change-Id: Ib99b03a9ea423853aaa296dcc634ee82c622a552
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| 2bff35bb | 09-Sep-2016 |
Caesar Wang <wxt@rock-chips.com> |
rockchip: set gpio2 ~ gpio4 to input and pull none mode
For save power cosumption, if gpio power supply shut down, we need to set gpio2 ~ gpio4 to input and HiZ status when suspend, and recovery the
rockchip: set gpio2 ~ gpio4 to input and pull none mode
For save power cosumption, if gpio power supply shut down, we need to set gpio2 ~ gpio4 to input and HiZ status when suspend, and recovery they status when rusume. we do it base on apio pass from loader.
Change-Id: I59fd2395e5e37e63425472a39f519822c9197e4c
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| e550c631 | 09-Sep-2016 |
Caesar Wang <wxt@rock-chips.com> |
rockchip: support disable/enable specific gpio when suspend/resume
some specific board need to disable/enable specific gpio when suspend/resume, so we add this function, bootloader can pass the spec
rockchip: support disable/enable specific gpio when suspend/resume
some specific board need to disable/enable specific gpio when suspend/resume, so we add this function, bootloader can pass the specific gpio, and we can handle these gpios in bl31 suspend/resuem function.
Change-Id: I373b03ef9202ee4a05a2b9caacdfa01b47ee2177
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| 536c2492 | 09-Sep-2016 |
Caesar Wang <wxt@rock-chips.com> |
rockchip/rk3399: improve gpio driver and support get pull mode function
We may need gpio pull mode later, so add this function. Besides fix a set pull mode bug, and save gpio clock gate, when operat
rockchip/rk3399: improve gpio driver and support get pull mode function
We may need gpio pull mode later, so add this function. Besides fix a set pull mode bug, and save gpio clock gate, when operate the gpio, we will enable gpio clock, when finish gpio operate, restore gpio clock gate status.
Change-Id: Ia1d602804f571a17f5ddc499908663b968b02974
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| 63ebf051 | 02-Sep-2016 |
Tony Xie <tony.xie@rock-chips.com> |
rockchip: fix the scu idle for rk3399
As rk3399 reported the d8/octane scores drop 10% with cpu idle. The root cause is thc cpu cluster enter the slow mode. We don't need switch the clock to 24MHz i
rockchip: fix the scu idle for rk3399
As rk3399 reported the d8/octane scores drop 10% with cpu idle. The root cause is thc cpu cluster enter the slow mode. We don't need switch the clock to 24MHz if cpu cluster enter the retention mode. In order to improve performance, it just needs for cluster enter powering off mode.
Also, we shouldn't do anything for hlvl if the system is off.
Change-Id: I2a02962a01343abd0cba47ed63192c1cdf88b119
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| 27c67f4e | 26-Aug-2016 |
davidcunado-arm <david.cunado@arm.com> |
Merge pull request #691 from rockchip-linux/fixes-suspend/resume-bugs
Fixes suspend/resume bugs |
| c2229abd | 25-Aug-2016 |
davidcunado-arm <david.cunado@arm.com> |
Merge pull request #684 from rockchip-linux/add-sdram-for-rk3399
rockchip: add dram driver for rk3399 |
| bdb2763d | 18-Aug-2016 |
Caesar Wang <wxt@rock-chips.com> |
rockchip: handle some interrupt before enter power mode for rk3399
For the PMU design, we don't expect to get the interrupts before enter the power mode. Since that will cause the confusion for the
rockchip: handle some interrupt before enter power mode for rk3399
For the PMU design, we don't expect to get the interrupts before enter the power mode. Since that will cause the confusion for the state machine in the power mode.
Change-Id: Id8dee79ae617a66271b5caf92caf35f520f45099
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| b3464232 | 23-Aug-2016 |
Caesar Wang <wxt@rock-chips.com> |
rockchip: remove the unused code for rk3399
Change-Id: I986d64df9dc62354d50ccea0468b90f090a44160 Signed-off-by: Caesar Wang <wxt@rock-chips.com> |
| 9d5aee2b | 24-Aug-2016 |
Caesar Wang <wxt@rock-chips.com> |
rockchip: on rk3399 enable Schmitt trigger on 32 kHz clock
If we don't enable the Schmitt trigger on the 32 kHz clock then systems won't always resume from suspend properly. Presumably anything els
rockchip: on rk3399 enable Schmitt trigger on 32 kHz clock
If we don't enable the Schmitt trigger on the 32 kHz clock then systems won't always resume from suspend properly. Presumably anything else in the system that relies on the 32 kHz clock also will have problems without the Schmitt trigger enabled.
Enable it always since having the 32 kHz clock on GPIO0_A0 isn't exactly an optional feature, so all boards using rk3399 will need this.
Change-Id: Idc18c6cd1adc5be5f60efd9cb805d83d5cd40129
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| 863edcea | 25-Aug-2016 |
Caesar Wang <wxt@rock-chips.com> |
rockchip: enable or disable auto power down base on frequency
add auto_pd_dis_freq parameter, we can pass a frequency from kernel to disable or enable ddr auto power down function.
Change-Id: Ie309
rockchip: enable or disable auto power down base on frequency
add auto_pd_dis_freq parameter, we can pass a frequency from kernel to disable or enable ddr auto power down function.
Change-Id: Ie30914701336c59047c380381c6b75dd76a89562
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| fe877779 | 25-Aug-2016 |
Caesar Wang <wxt@rock-chips.com> |
rockchip: rk3399: add dram driver
add dram driver, and kernel can through sip function talk to bl31 to do ddr frequency scaling. and ddr auto powerdown.
Change-Id: I0d0f2869aed95e336c6e23ba96a93109
rockchip: rk3399: add dram driver
add dram driver, and kernel can through sip function talk to bl31 to do ddr frequency scaling. and ddr auto powerdown.
Change-Id: I0d0f2869aed95e336c6e23ba96a9310985c84840
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| 0786d688 | 24-Aug-2016 |
Caesar Wang <wxt@rock-chips.com> |
rockchip: on rk3399 init the PMU counts at boot; set 24M/32k properly
In a previous change we mistakenly thought that PMU_24M_EN_CFG directly controlled whether the PMU counts ran off the 32k vs. 24
rockchip: on rk3399 init the PMU counts at boot; set 24M/32k properly
In a previous change we mistakenly thought that PMU_24M_EN_CFG directly controlled whether the PMU counts ran off the 32k vs. 24M clock. Apparently that's not true. Real logic is now documented in code.
Also in the previous change we mistaknely though that PMU_24M_EN_CFG was normally supposed to be 1 and we should "restore" it at resume time. This is a terrible idea and made the system totally unreliable after resume. Apparently PMU_24M_EN_CFG should always be 0 with all the current code and settings.
Let's fix the above two problems. While we're changing all of this, let's also:
1. Init at boot time. Many of these counts are used when the system is running normally. We want the behavior at boot to match the behavior after suspend/resume.
2. Init CPU counts to be 1 us. Although old code was trying to set this to 1 ms (1000x slower) at suspend/resume time, we've been testing the kernel with 1 us for a long time now. That's because the kernel (at boot time) set these values to 24. Let's keep at 24 until we know that's wrong.
3. Init GPU counts to be 1 us. Old code wasn't touching the GPU, but as documented in comments it makes sense to init here. Do it.
4. Document the crap out of this code, since the SoC's behavior is confusing and poorly documented in the TRM.
5. Increase some stabilization times to 30 ms (from 3 ms). It's unclear that a full 30 ms is needed, but let's be safe for now.
This also inits the counts for the GPU.
(Thanks to Doug's patch that come from https://crosreview.com/372381)
Change-Id: Id1bc159a5a99916aeab043895e5c4585c4adab22
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| 937108a0 | 18-Aug-2016 |
danh-arm <dan.handley@arm.com> |
Merge pull request #678 from soby-mathew/sm/PSCI_AArch32
Introduce AArch32 support for PSCI library |
| 78f7017c | 08-Aug-2016 |
Caesar Wang <wxt@rock-chips.com> |
rockchip: fix the reset-hold release for rk3399 resume
The pmusgrf reset-hold bits needs to be released, since the pmusgrf reset-hold bits needs to be held.
Change-Id: Ia1eccc8fba18294f26b4cc07d47b
rockchip: fix the reset-hold release for rk3399 resume
The pmusgrf reset-hold bits needs to be released, since the pmusgrf reset-hold bits needs to be held.
Change-Id: Ia1eccc8fba18294f26b4cc07d47bc5e513dd9a1f
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| 545bff0e | 09-Aug-2016 |
Caesar Wang <wxt@rock-chips.com> |
rockchip: fix the power up/dowm cnt for rk3399
Sometimes this will cause the long delay for suspend/resume. Since the 24M OCS will be turned off in power mode. Also, remove the ERROR_DEPRECATED conf
rockchip: fix the power up/dowm cnt for rk3399
Sometimes this will cause the long delay for suspend/resume. Since the 24M OCS will be turned off in power mode. Also, remove the ERROR_DEPRECATED config define.
Change-Id: I78f21c35912c2250972e551695cdacc7bc4c020a
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| 5d3b1067 | 10-Aug-2016 |
Caesar Wang <wxt@rock-chips.com> |
rockchip: update to handle PWMs for rk3399
This patch updates some things for rk3399, as following:
1) Add the new file to handle the pwm. (e.g. the pwm regulator) Make sure that good deal with the
rockchip: update to handle PWMs for rk3399
This patch updates some things for rk3399, as following:
1) Add the new file to handle the pwm. (e.g. the pwm regulator) Make sure that good deal with the pwm related things. Also, remove some pwm setting for pmu.c.
2) Set the plls slow mode and bypass in suspend, and restore them.
Change-Id: I112806700bf433c87763aac23d22fa7e6a7f5264
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| b1271091 | 08-Aug-2016 |
Soby Mathew <soby.mathew@arm.com> |
Migrate platform makefile to new console driver location
This patch migrates the upstream platform makefiles to include the console drivers from the new location in ARM Trusted Firmware code base.
Migrate platform makefile to new console driver location
This patch migrates the upstream platform makefiles to include the console drivers from the new location in ARM Trusted Firmware code base.
Change-Id: I866d6c4951e475de1f836ce8a8c1d5e6da9577e3
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| e6517abd | 21-Jul-2016 |
Caesar Wang <wxt@rock-chips.com> |
rockchip: fixes typo and some bugs for suspend/resume tests
1. Remove the AP_PWROFF in ATF, should configure it in kernel. 2. Save and restore the PWMs pin/regs for suspend/resume. 3. The pmusgrf re
rockchip: fixes typo and some bugs for suspend/resume tests
1. Remove the AP_PWROFF in ATF, should configure it in kernel. 2. Save and restore the PWMs pin/regs for suspend/resume. 3. The pmusgrf reset-hold bits needs to be released. since the pmusgrf reset-hold bits needs to be held. 4. Configure the PMU power up/down cycles about delay 3ms. 5. With the MMIO register block as one big mapping. 6. Fix the build error with psci_entrypoint since PSCI lib updated.
Fixes the commit 9ec78bd ("rockchip: support the suspend/resume for rk3399").
Change-Id: I112806700bf433c87763aac23d22fa7e6a7f5264
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| 3dd9835f | 25-Jul-2016 |
danh-arm <dan.handley@arm.com> |
Merge pull request #667 from soby-mathew/sm/PSCI_lib
Introduce PSCI library |
| bb2162f1 | 03-May-2016 |
Soby Mathew <soby.mathew@arm.com> |
Include `plat_psci_common.c` from the new location
The `plat_psci_common.c` was moved to the new location `plat/common` and a stub file was retained at previous location for compatibility. This patc
Include `plat_psci_common.c` from the new location
The `plat_psci_common.c` was moved to the new location `plat/common` and a stub file was retained at previous location for compatibility. This patch modifies the platform makefiles to include the file from the new location.
Change-Id: Iabddeeb824e9a5d72d176d7c644735966c8c0699
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