Merge "plat/rockchip: enable power domains of rk3399 before reset" into integration

plat/rockchip: enable power domains of rk3399 before reset

This patch fixes hangs that happen after soft resetting of rk3399.

Signed-off-by: Piotr Szczepanik <piter75@gmail.com>
Change-Id: If41b12b

plat/rockchip: enable power domains of rk3399 before reset

This patch fixes hangs that happen after soft resetting of rk3399.

Signed-off-by: Piotr Szczepanik <piter75@gmail.com>
Change-Id: If41b12ba1dfcb2ba937361b58eafd50bf5c483d4

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Merge changes I0d17ba6c,I540741d2,I9e6475ad,Ifd769320,I12c04a85, ... into integration

* changes:
plat/mediatek/mt81*: Use new bl31_params_parse() helper
plat/rockchip: Use new bl31_params_parse_

Merge changes I0d17ba6c,I540741d2,I9e6475ad,Ifd769320,I12c04a85, ... into integration

* changes:
plat/mediatek/mt81*: Use new bl31_params_parse() helper
plat/rockchip: Use new bl31_params_parse_helper()
Add helper to parse BL31 parameters (both versions)
Factor out cross-BL API into export headers suitable for 3rd party code
Use explicit-width data types in AAPCS parameter structs
plat/rockchip: Switch to use new common BL aux parameter library
Introduce lightweight BL platform parameter library

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plat/rockchip: Switch to use new common BL aux parameter library

This patch changes all Rockchip platforms to use the new common BL aux
parameter helpers. Since the parameter space is now cleanly sp

plat/rockchip: Switch to use new common BL aux parameter library

This patch changes all Rockchip platforms to use the new common BL aux
parameter helpers. Since the parameter space is now cleanly split in
generic and vendor-specific parameters and the COREBOOT_TABLE
parameter is now generic, the parameter type number for that parameter
has to change. Since it only affects coreboot which always builds TF as
a submodule and includes its headers directly to get these constants,
this should not cause any issues. In general, after this point, we
should avoid changing already assigned parameter type numbers whenever
possible.

Change-Id: Ic99ddd1e91ff5e5fe212fa30c793a0b8394c9dad
Signed-off-by: Julius Werner <jwerner@chromium.org>

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Merge pull request #1673 from antonio-nino-diaz-arm/an/headers

Standardise header guards across codebase

Standardise header guards across codebase

All identifiers, regardless of use, that start with two underscores are
reserved. This means they can't be used in header guards.

The style that this proje

Standardise header guards across codebase

All identifiers, regardless of use, that start with two underscores are
reserved. This means they can't be used in header guards.

The style that this project is now to use the full name of the file in
capital letters followed by 'H'. For example, for a file called
"uart_example.h", the header guard is UART_EXAMPLE_H.

The exceptions are files that are imported from other projects:

- CryptoCell driver
- dt-bindings folders
- zlib headers

Change-Id: I50561bf6c88b491ec440d0c8385c74650f3c106e
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>

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Merge pull request #1236 from dbasehore/gic-save-restore

RK3399 GIC save/restore

rockchip/rk3399: Change PD_CTR_LOOP to 10000

This brings ATF into line with the kernel on the timeout for power
domains turning on. We could actually timeout (when we shouldn't) on
resume when turni

rockchip/rk3399: Change PD_CTR_LOOP to 10000

This brings ATF into line with the kernel on the timeout for power
domains turning on. We could actually timeout (when we shouldn't) on
resume when turning power domains on. The guaranteed maximum delay is
now 10ms.

Signed-off-by: Derek Basehore <dbasehore@chromium.org>

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Merge pull request #925 from dp-arm/dp/spdx

Use SPDX license identifiers

Use SPDX license identifiers

To make software license auditing simpler, use SPDX[0] license
identifiers instead of duplicating the license text in every file.

NOTE: Files that have been imported by

Use SPDX license identifiers

To make software license auditing simpler, use SPDX[0] license
identifiers instead of duplicating the license text in every file.

NOTE: Files that have been imported by FreeBSD have not been modified.

[0]: https://spdx.org/

Change-Id: I80a00e1f641b8cc075ca5a95b10607ed9ed8761a
Signed-off-by: dp-arm <dimitris.papastamos@arm.com>

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Merge pull request #835 from rockchip-linux/rk3399-atf-cleanup-20170210

RK3399 ARM TF clean up 20170210

rockchip: Clean up header and referenced files

So far, there are more and more features are supported on the RK3399,
meanwhile, these features are increasingly being defined and intertwined.
It's ti

rockchip: Clean up header and referenced files

So far, there are more and more features are supported on the RK3399,
meanwhile, these features are increasingly being defined and intertwined.
It's time to clean up and make them clearer.

Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>

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Merge pull request #745 from rockchip-linux/support-rk3399-dram

Support rk3399 dram

rockchip: close the PD center logic during suspend

The RK3399 supports close the center logic enter power mode,
so we can close PD_CENTER to save more power during suspend.
Therefore, we need to sup

rockchip: close the PD center logic during suspend

The RK3399 supports close the center logic enter power mode,
so we can close PD_CENTER to save more power during suspend.
Therefore, we need to support save/restore the DDR PHY and
controller registers during suspend/resume.

Also, need CL (http://crosreview.com/397399) to check disabling
center logic.

Change-Id: I288defd8e9caa3846d9fa663a33e4d51df1aaa5d
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Signed-off-by: Derek Basehore <dbasehore@chromium.org>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>

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rockchip: move pmu registers into another header for rk3399

This moves the PMU register definitions into another file for use in
later patches.

Change-Id: I8b5f1e7938b63ada6a743cf9661c3e474e96e4e4

rockchip: move pmu registers into another header for rk3399

This moves the PMU register definitions into another file for use in
later patches.

Change-Id: I8b5f1e7938b63ada6a743cf9661c3e474e96e4e4
Signed-off-by: Derek Basehore <dbasehore@chromium.org>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>

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Merge pull request #698 from rockchip-linux/set-APIO-for-rk3399

Set apio for rk3399

rockchip: set gpio2 ~ gpio4 to input and pull none mode

For save power cosumption, if gpio power supply shut down, we need to
set gpio2 ~ gpio4 to input and HiZ status when suspend, and recovery
the

rockchip: set gpio2 ~ gpio4 to input and pull none mode

For save power cosumption, if gpio power supply shut down, we need to
set gpio2 ~ gpio4 to input and HiZ status when suspend, and recovery
they status when rusume. we do it base on apio pass from loader.

Change-Id: I59fd2395e5e37e63425472a39f519822c9197e4c

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Merge pull request #691 from rockchip-linux/fixes-suspend/resume-bugs

Fixes suspend/resume bugs

rockchip: on rk3399 enable Schmitt trigger on 32 kHz clock

If we don't enable the Schmitt trigger on the 32 kHz clock then systems
won't always resume from suspend properly. Presumably anything els

rockchip: on rk3399 enable Schmitt trigger on 32 kHz clock

If we don't enable the Schmitt trigger on the 32 kHz clock then systems
won't always resume from suspend properly. Presumably anything else in
the system that relies on the 32 kHz clock also will have problems
without the Schmitt trigger enabled.

Enable it always since having the 32 kHz clock on GPIO0_A0 isn't
exactly an optional feature, so all boards using rk3399 will need this.

Change-Id: Idc18c6cd1adc5be5f60efd9cb805d83d5cd40129

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Merge pull request #679 from rockchip-linux/support-pwm-for-rk3399

Support pwm for rk3399

rockchip: update to handle PWMs for rk3399

This patch updates some things for rk3399, as following:

1) Add the new file to handle the pwm. (e.g. the pwm regulator)
Make sure that good deal with the

rockchip: update to handle PWMs for rk3399

This patch updates some things for rk3399, as following:

1) Add the new file to handle the pwm. (e.g. the pwm regulator)
Make sure that good deal with the pwm related things.
Also, remove some pwm setting for pmu.c.

2) Set the plls slow mode and bypass in suspend, and restore them.

Change-Id: I112806700bf433c87763aac23d22fa7e6a7f5264

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Merge pull request #674 from rockchip-linux/Support-PWMs-for-rk3399-suspend/resume

rockchip: fixes typo and some bugs for suspend/resume tests

rockchip: fixes typo and some bugs for suspend/resume tests

1. Remove the AP_PWROFF in ATF, should configure it in kernel.
2. Save and restore the PWMs pin/regs for suspend/resume.
3. The pmusgrf re

rockchip: fixes typo and some bugs for suspend/resume tests

1. Remove the AP_PWROFF in ATF, should configure it in kernel.
2. Save and restore the PWMs pin/regs for suspend/resume.
3. The pmusgrf reset-hold bits needs to be released. since the
pmusgrf reset-hold bits needs to be held.
4. Configure the PMU power up/down cycles about delay 3ms.
5. With the MMIO register block as one big mapping.
6. Fix the build error with psci_entrypoint since PSCI lib updated.

Fixes the commit
9ec78bd ("rockchip: support the suspend/resume for rk3399").

Change-Id: I112806700bf433c87763aac23d22fa7e6a7f5264

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Merge pull request #654 from rockchip-linux/rk3399-suspend-resume

rockchip: support the suspend/resume for rk3399

rockchip: support the suspend/resume for rk3399

1.Fixes the suspend/resume some bugs.
2.Add the power domain for saving power consumption.
3.Add cpu clusters suspend for rk3399 SoCs

Change-Id: Id60

rockchip: support the suspend/resume for rk3399

1.Fixes the suspend/resume some bugs.
2.Add the power domain for saving power consumption.
3.Add cpu clusters suspend for rk3399 SoCs

Change-Id: Id602779016b41d6281f4ba40a20229d909b28e46

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