Merge changes I25047322,Id476f815 into integration

* changes:
fix(plat/rcar3): change stack size of BL31
fix(plat/rcar3): fix SYSTEM_OFF processing for R-Car D3

fix(plat/rcar3): change stack size of BL31

Increase the stack size to avoid stack overflow
when the LOG_LEVEL compile option is set high.

Signed-off-by: Hideyuki Nitta <hideyuki.nitta.jf@hitachi.co

fix(plat/rcar3): change stack size of BL31

Increase the stack size to avoid stack overflow
when the LOG_LEVEL compile option is set high.

Signed-off-by: Hideyuki Nitta <hideyuki.nitta.jf@hitachi.com>
Signed-off-by: Toshiyuki Ogasahara <toshiyuki.ogasahara.bo@hitachi.com>
Signed-off-by: Yoshifumi Hosoya <yoshifumi.hosoya.wj@renesas.com>
Change-Id: I25047322763bff148dba13848a3a40f4c7cf90b7

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fix(plat/rcar3): fix SYSTEM_OFF processing for R-Car D3

Fixed an issue where the CPU and Cluster could not be turned OFF
when the SYSTEM_OFF has executed.

Signed-off-by: Hideyuki Nitta <hideyuki.ni

fix(plat/rcar3): fix SYSTEM_OFF processing for R-Car D3

Fixed an issue where the CPU and Cluster could not be turned OFF
when the SYSTEM_OFF has executed.

Signed-off-by: Hideyuki Nitta <hideyuki.nitta.jf@hitachi.com>
Signed-off-by: Toshiyuki Ogasahara <toshiyuki.ogasahara.bo@hitachi.com>
Signed-off-by: Yoshifumi Hosoya <yoshifumi.hosoya.wj@renesas.com>
Change-Id: Id476f815b58246ae0574c04ccb3eb201d09039b9

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refactor(renesas): disable CRYPTO_SUPPORT option

Disabled CRYPTO_SUPPORT option for Renesas platform as it does not
follow the TF-A authentication mechanism where Trusted-Boot mandates
Crypto module

refactor(renesas): disable CRYPTO_SUPPORT option

Disabled CRYPTO_SUPPORT option for Renesas platform as it does not
follow the TF-A authentication mechanism where Trusted-Boot mandates
Crypto module support.

Change-Id: I3aa771e983e3dde083dd8a861f25c0714ffd707f
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>

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feat(plat/rcar3): update IPL and Secure Monitor Rev.3.0.3

Update the revision number in the revision management file.

Signed-off-by: Hideyuki Nitta <hideyuki.nitta.jf@hitachi.com>
Signed-off-by: To

feat(plat/rcar3): update IPL and Secure Monitor Rev.3.0.3

Update the revision number in the revision management file.

Signed-off-by: Hideyuki Nitta <hideyuki.nitta.jf@hitachi.com>
Signed-off-by: Toshiyuki Ogasahara <toshiyuki.ogasahara.bo@hitachi.com>
Signed-off-by: Yoshifumi Hosoya <yoshifumi.hosoya.wj@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Change-Id: I19f713de68e62a2ed3f4ec08c31b35af6a4014ef

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feat(plat/rcar3): modify type for Internal function argument

Modify the type of the variable that stores the value for MPIDR
in the internal function from uint64_t to u_register_t.

Signed-off-by: K

feat(plat/rcar3): modify type for Internal function argument

Modify the type of the variable that stores the value for MPIDR
in the internal function from uint64_t to u_register_t.

Signed-off-by: Koichi Yamaguchi <koichi.yamaguchi.zb@hitachi.com>
Signed-off-by: Toshiyuki Ogasahara <toshiyuki.ogasahara.bo@hitachi.com>
Signed-off-by: Yoshifumi Hosoya <yoshifumi.hosoya.wj@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Change-Id: Ib5bda93d5432e0412132bddf41ead8ee3fcf9e46

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feat(plat/rcar3): modify sequence for update value for WUPMSKCA57/53

Add new function so that the value of bit at WUPMSKCA57/53,
which points to CPU other than the BOOT CPU, is 1 at initialization.

feat(plat/rcar3): modify sequence for update value for WUPMSKCA57/53

Add new function so that the value of bit at WUPMSKCA57/53,
which points to CPU other than the BOOT CPU, is 1 at initialization.
Modify sequence so that value of each bit for CPU at WUPMSKCA57/53 is
basically 0 and target bit value is changed to 1 only when CPU_OFF.

Signed-off-by: Koichi Yamaguchi <koichi.yamaguchi.zb@hitachi.com>
Signed-off-by: Toshiyuki Ogasahara <toshiyuki.ogasahara.bo@hitachi.com>
Signed-off-by: Yoshifumi Hosoya <yoshifumi.hosoya.wj@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Change-Id: Id5dafc04e1dbaf265c8b67b903c335bb1af49914

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feat(plat/rcar): change process for Suspend To RAM

- Added the function rcar_pwr_domain_pwr_down_wfi() for power down process.
And change the sequence to power down.
- Removed clearing the count o

feat(plat/rcar): change process for Suspend To RAM

- Added the function rcar_pwr_domain_pwr_down_wfi() for power down process.
And change the sequence to power down.
- Removed clearing the count of psci_locks (PSCI exclusive lock) during
Warm Boot.

Signed-off-by: Koichi Yamaguchi <koichi.yamaguchi.zb@hitachi.com>
Signed-off-by: Toshiyuki Ogasahara <toshiyuki.ogasahara.bo@hitachi.com>
Signed-off-by: Yoshifumi Hosoya <yoshifumi.hosoya.wj@renesas.com>
Change-Id: I684d54a798a6dccde15fbebe16c6e104cbb470ed

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feat(plat/rcar3): keep RWDT enabled

In case the WDT is enabled by prior stage, keep it enabled.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Change-Id: Ie7c0eaf2f59dd8c30a9ef686a70004

feat(plat/rcar3): keep RWDT enabled

In case the WDT is enabled by prior stage, keep it enabled.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Change-Id: Ie7c0eaf2f59dd8c30a9ef686a7000424f38d6352

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feat(plat/rcar3): modify LifeC register setting for R-Car D3

Modified SECGRP0COND6 and SECGRP1COND6 setting for R-Car D3.

Signed-off-by: Hideyuki Nitta <hideyuki.nitta.jf@hitachi.com>
Signed-off-by

feat(plat/rcar3): modify LifeC register setting for R-Car D3

Modified SECGRP0COND6 and SECGRP1COND6 setting for R-Car D3.

Signed-off-by: Hideyuki Nitta <hideyuki.nitta.jf@hitachi.com>
Signed-off-by: Toshiyuki Ogasahara <toshiyuki.ogasahara.bo@hitachi.com>
Signed-off-by: Yoshifumi Hosoya <yoshifumi.hosoya.wj@renesas.com>
Change-Id: I3f173ac44c11743965c013ef238748b0dc8cabab

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feat(plat/rcar3): remove access to RMSTPCRn registers in R-Car D3

Because the Realtime module stop control register n (RMSTPCRn)
are not supported in R-Car D3. Therefore, remove access to these
regi

feat(plat/rcar3): remove access to RMSTPCRn registers in R-Car D3

Because the Realtime module stop control register n (RMSTPCRn)
are not supported in R-Car D3. Therefore, remove access to these
registers in R-Car D3.

Signed-off-by: Hideyuki Nitta <hideyuki.nitta.jf@hitachi.com>
Signed-off-by: Toshiyuki Ogasahara <toshiyuki.ogasahara.bo@hitachi.com>
Signed-off-by: Yoshifumi Hosoya <yoshifumi.hosoya.wj@renesas.com>
Change-Id: I4647e28d0e176ff97151e9842019ba12cefe5c03

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feat(plat/rcar3): add process to back up X6 and X7 register's value

Because the x6 and x7 registers will be overwritten by the callee function,
added the processing the register's value push to/pop

feat(plat/rcar3): add process to back up X6 and X7 register's value

Because the x6 and x7 registers will be overwritten by the callee function,
added the processing the register's value push to/pop from stack memory.

Signed-off-by: Hideyuki Nitta <hideyuki.nitta.jf@hitachi.com>
Signed-off-by: Toshiyuki Ogasahara <toshiyuki.ogasahara.bo@hitachi.com>
Signed-off-by: Yoshifumi Hosoya <yoshifumi.hosoya.wj@renesas.com>
Change-Id: I5351a008d3b208a30a8bc8651b8d9b4d1a02a8e8

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feat(plat/rcar3): add SYSCEXTMASK bit set/clear in scu_power_up

Added the process of SYSECEXTMASK bit set/clear for following
power Resume/Shutoff flow.

Signed-off-by: Hideyuki Nitta <hideyuki.nitt

feat(plat/rcar3): add SYSCEXTMASK bit set/clear in scu_power_up

Added the process of SYSECEXTMASK bit set/clear for following
power Resume/Shutoff flow.

Signed-off-by: Hideyuki Nitta <hideyuki.nitta.jf@hitachi.com>
Signed-off-by: Toshiyuki Ogasahara <toshiyuki.ogasahara.bo@hitachi.com>
Signed-off-by: Yoshifumi Hosoya <yoshifumi.hosoya.wj@renesas.com>
Change-Id: I71ed22840a42e7ab7d87bfd4241eec6f5ddb129b

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feat(plat/rcar3): change the memory map for OP-TEE

The memory area size of OP-TEE was changed from 1MB to 2MB
because the size of OP-TEE has increased.

Signed-off-by: Toshiyuki Ogasahara <toshiyuki

feat(plat/rcar3): change the memory map for OP-TEE

The memory area size of OP-TEE was changed from 1MB to 2MB
because the size of OP-TEE has increased.

Signed-off-by: Toshiyuki Ogasahara <toshiyuki.ogasahara.bo@hitachi.com>
Signed-off-by: Yoshifumi Hosoya <yoshifumi.hosoya.wj@renesas.com>
Change-Id: Ic8a165c83a3a9ef2829f68d5fabeed9ccb6da95e

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feat(plat/rcar3): apply ERRATA_A53_1530924 and ERRATA_A57_1319537

Apply ERRATA_A53_1530924 and ERRATA_A57_1319537.

Signed-off-by: Koichi Yamaguchi <koichi.yamaguchi.zb@hitachi.com>
Signed-off-by: T

feat(plat/rcar3): apply ERRATA_A53_1530924 and ERRATA_A57_1319537

Apply ERRATA_A53_1530924 and ERRATA_A57_1319537.

Signed-off-by: Koichi Yamaguchi <koichi.yamaguchi.zb@hitachi.com>
Signed-off-by: Toshiyuki Ogasahara <toshiyuki.ogasahara.bo@hitachi.com>
Signed-off-by: Yoshifumi Hosoya <yoshifumi.hosoya.wj@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> # Drop Makefile header change, reword commit message
Change-Id: I7d6e7e40bad6545a1d96470ce1a6e2d04e042670

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fix(plat/rcar3): fix version judgment for R-Car D3

Added the process of judgment and logging for R-Car D3 Ver.1.1 and Ver.1.0.

Signed-off-by: Hideyuki Nitta <hideyuki.nitta.jf@hitachi.com>
Signed-o

fix(plat/rcar3): fix version judgment for R-Car D3

Added the process of judgment and logging for R-Car D3 Ver.1.1 and Ver.1.0.

Signed-off-by: Hideyuki Nitta <hideyuki.nitta.jf@hitachi.com>
Signed-off-by: Toshiyuki Ogasahara <toshiyuki.ogasahara.bo@hitachi.com>
Signed-off-by: Yoshifumi Hosoya <yoshifumi.hosoya.wj@renesas.com>
Change-Id: I326aa42374b70b6a4a71893561a7eaa0b6eddef0

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fix(plat/rcar3): fix source file to make about GICv2

Changed the plat/renesas/common/common.mk to change the source files
about GICv2 by include gicv2.mk, because gic_common.c has deprecated.

Signe

fix(plat/rcar3): fix source file to make about GICv2

Changed the plat/renesas/common/common.mk to change the source files
about GICv2 by include gicv2.mk, because gic_common.c has deprecated.

Signed-off-by: Hideyuki Nitta <hideyuki.nitta.jf@hitachi.com>
Signed-off-by: Toshiyuki Ogasahara <toshiyuki.ogasahara.bo@hitachi.com>
Signed-off-by: Yoshifumi Hosoya <yoshifumi.hosoya.wj@renesas.com>
Change-Id: Iaa7eae6b2c1dd79a05339325e6bc422d87bce49e

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refactor(plat/ea_handler): Use default ea handler implementation for panic

Put default ea handler implementation into function plat_default_ea_handler()
which just print verbose information and pani

refactor(plat/ea_handler): Use default ea handler implementation for panic

Put default ea handler implementation into function plat_default_ea_handler()
which just print verbose information and panic, so it can be called also
from overwritten / weak function plat_ea_handler() implementation.

Replace every custom implementation of printing verbose error message of
external aborts in custom plat_ea_handler() functions by a common
implementation from plat_default_ea_handler() function.

Signed-off-by: Pali Rohár <pali@kernel.org>
Change-Id: I15897f61b62b4c3c29351e693f51d4df381f3b98

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feat(plat/rcar3): update IPL and Secure Monitor Rev.3.0.0

Update the revision number in the revision management file.

Signed-off-by: Toshiyuki Ogasahara <toshiyuki.ogasahara.bo@hitachi.com>
Signed-

feat(plat/rcar3): update IPL and Secure Monitor Rev.3.0.0

Update the revision number in the revision management file.

Signed-off-by: Toshiyuki Ogasahara <toshiyuki.ogasahara.bo@hitachi.com>
Signed-off-by: Yoshifumi Hosoya <yoshifumi.hosoya.wj@renesas.com>
Change-Id: I44b9e5a992e8a44cfeafad6d2c1a97aa59baca4e

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fix(drivers/rcar3): fix CPG registers redefinition

This commit deletes the value of the redefined CPG register.

Signed-off-by: Toshiyuki Ogasahara <toshiyuki.ogasahara.bo@hitachi.com>
Signed-off-by

fix(drivers/rcar3): fix CPG registers redefinition

This commit deletes the value of the redefined CPG register.

Signed-off-by: Toshiyuki Ogasahara <toshiyuki.ogasahara.bo@hitachi.com>
Signed-off-by: Yoshifumi Hosoya <yoshifumi.hosoya.wj@renesas.com>
Change-Id: I05cf4a449ae28adb2ddd59593971a7d0cbcb21de

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feat(plat/rcar3): add optional support for gzip-compressed BL33

The BL33 size on this platform is limited to 1 MiB, add optional
support for decompressing and starting gzip-compressed BL33, which
ma

feat(plat/rcar3): add optional support for gzip-compressed BL33

The BL33 size on this platform is limited to 1 MiB, add optional
support for decompressing and starting gzip-compressed BL33, which
may help with this size limitation. This functionality is disabled
by default, set RCAR_GEN3_BL33_GZIP=1 during build to enable it.

The BL33 at 0x50000000 should then be gzip compressed, however if
the BL33 does not have a valid gzip header, it is copied to the
correct location and started as-is, this is a fallback for legacy
systems and systems which update to gzip-compressed BL33.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Change-Id: Id93f1c7e6f17db1ffb952ea086562993473f6efa

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renesas: rzg: Add support to identify EK874 RZ/G2E board

Add support to identify Silicon Linux RZ/G2E evaluation kit (EK874).

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>

renesas: rzg: Add support to identify EK874 RZ/G2E board

Add support to identify Silicon Linux RZ/G2E evaluation kit (EK874).

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Change-Id: Id7bdbc9b0d25aa9af496d58d4bd5055579edc104

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drivers: renesas: common: Add support for DRAM initialization on RZ/G2E SoC

DRAM initialization on RZ/G2E SoC is identical to R-Car E3 so re-use the
same.

Signed-off-by: Lad Prabhakar <prabhakar.ma

drivers: renesas: common: Add support for DRAM initialization on RZ/G2E SoC

DRAM initialization on RZ/G2E SoC is identical to R-Car E3 so re-use the
same.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Change-Id: I454fb40af4f8ce6c4c0d2a53edb307326efd02df

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renesas: rzg: Add support to identify HopeRun HiHope RZ/G2N board

Add support to identify HopeRun HiHope RZ/G2N board.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewe

renesas: rzg: Add support to identify HopeRun HiHope RZ/G2N board

Add support to identify HopeRun HiHope RZ/G2N board.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Change-Id: Ib47aba84b63488247f6e9da1f5878140129766ce

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drivers: renesas: common: Add support for DRAM initialization on RZ/G2N SoC

Add support for initializing DRAM on RZ/G2N SoC.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
R

drivers: renesas: common: Add support for DRAM initialization on RZ/G2N SoC

Add support for initializing DRAM on RZ/G2N SoC.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Change-Id: Id09a367b92b11a5da88f2dce6887677cc935d0c0

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