Tegra: console driver compilation from platform makefiles

This patch includes the console driver from individual platform
makefiles and removes it from tegra_common.mk. This allows future
platforms

Tegra: console driver compilation from platform makefiles

This patch includes the console driver from individual platform
makefiles and removes it from tegra_common.mk. This allows future
platforms to include consoles of their choice.

Change-Id: I7506562bfac78421a80fb6782ac8472fbef6cfb0
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

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Merge pull request #1764 from vwadekar/tf2.0-tegra-downstream-rebase-1.7.19

Tf2.0 tegra downstream rebase 1.7.19

Tegra: lib: library for profiling the cold boot path

The non secure world would like to profile the boot path for
the EL3 and S-EL1 firmwares. To allow it to do that, a non-secure
DRAM region (4K) i

Tegra: lib: library for profiling the cold boot path

The non secure world would like to profile the boot path for
the EL3 and S-EL1 firmwares. To allow it to do that, a non-secure
DRAM region (4K) is allocated and the base address is passed to
the EL3 firmware.

This patch adds a library to allow the platform code to store the
tag:timestamp pair to the shared memory. The tegra platform code
then uses the `record` method to add timestamps.

Original change by Akshay Sharan <asharan@nvidia.com>

Change-Id: Idbbef9c83ed84a508b04d85a6637775960dc94ba
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

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Merge pull request #1729 from vwadekar/tegra-native-gicv2

Tegra native gicv2

Tegra: support for native GICv2 drivers

This patch converts Tegra platforms to support native
GICv2 drivers. This involves removes Tegra's GIC driver
port platforms to use interrupt_props

Change-Id

Tegra: support for native GICv2 drivers

This patch converts Tegra platforms to support native
GICv2 drivers. This involves removes Tegra's GIC driver
port platforms to use interrupt_props

Change-Id: I83d8a690ff276dd97928dc60824a4fd36999bb30
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

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Tegra: support to compile native GICv2 drivers

This patch adds a macro to allow platforms to compile native
GICv2 drivers along with Tegra handlers.

Change-Id: I8281796c09dae5704cff2daab831395d65e2

Tegra: support to compile native GICv2 drivers

This patch adds a macro to allow platforms to compile native
GICv2 drivers along with Tegra handlers.

Change-Id: I8281796c09dae5704cff2daab831395d65e261b7
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

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Merge pull request #1587 from antonio-nino-diaz-arm/an/deprecated

Remove deprecated interfaces for all platforms

tegra: Migrate to new interfaces

- Migrate to bl31_early_platform_setup2().
- Remove references to removed build options.
- Replace zeromem16() by zeromem().
- Use private definition of bl31_params_

tegra: Migrate to new interfaces

- Migrate to bl31_early_platform_setup2().
- Remove references to removed build options.
- Replace zeromem16() by zeromem().
- Use private definition of bl31_params_t.

This is an incomplete migration, the platform doesn't currently compile.

Change-Id: I67fbf2206678be80c3a16692024221a131cec42f
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>

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Merge pull request #925 from dp-arm/dp/spdx

Use SPDX license identifiers

Use SPDX license identifiers

To make software license auditing simpler, use SPDX[0] license
identifiers instead of duplicating the license text in every file.

NOTE: Files that have been imported by

Use SPDX license identifiers

To make software license auditing simpler, use SPDX[0] license
identifiers instead of duplicating the license text in every file.

NOTE: Files that have been imported by FreeBSD have not been modified.

[0]: https://spdx.org/

Change-Id: I80a00e1f641b8cc075ca5a95b10607ed9ed8761a
Signed-off-by: dp-arm <dimitris.papastamos@arm.com>

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Merge branch 'integration' into tf_issue_461

Merge pull request #920 from vwadekar/asserts-release-nvidia

Asserts release nvidia

Tegra: group platform settings together

This patch groups all the platform configuration macros into
the common platform.mk makefile.

Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

Merge pull request #897 from vwadekar/memctrl-v1-xlat-table-v2

Tegra: memctrl_v1: enable 'xlat_table_v2' library

Tegra: memctrl_v1: enable 'xlat_table_v2' library

This patch enables the 'xlat_table_v2' library for the Tegra Memory
Controller driver. This library allows us to dynamically map/unmap
memory region

Tegra: memctrl_v1: enable 'xlat_table_v2' library

This patch enables the 'xlat_table_v2' library for the Tegra Memory
Controller driver. This library allows us to dynamically map/unmap
memory regions, with MMU enabled.

The Memory Controller driver maps/unmaps non-overlapping Video Memory
region, to clean it of any secure contents, before it resizes the
region.

Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

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Merge pull request #873 from dp-arm/dp/makefile-reorg

Move plat/common source file definitions to generic Makefiles

Move plat/common source file definitions to generic Makefiles

These source file definitions should be defined in generic
Makefiles so that all platforms can benefit. Ensure that the
symbols are prop

Move plat/common source file definitions to generic Makefiles

These source file definitions should be defined in generic
Makefiles so that all platforms can benefit. Ensure that the
symbols are properly marked as weak so they can be overridden
by platforms.

NOTE: This change is a potential compatibility break for
non-upstream platforms.

Change-Id: I7b892efa9f2d6d216931360dc6c436e1d10cffed
Signed-off-by: dp-arm <dimitris.papastamos@arm.com>

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Merge pull request #863 from vwadekar/tegra-changes-from-downstream-v4

Tegra changes from downstream v4

Tegra: enable SEPARATE_CODE_AND_RODATA build flag

This patch enables the SEPARATE_CODE_AND_RODATA build flag for all
Tegra platforms, to allow setting proper MMU attributes for the RO
data and the c

Tegra: enable SEPARATE_CODE_AND_RODATA build flag

This patch enables the SEPARATE_CODE_AND_RODATA build flag for all
Tegra platforms, to allow setting proper MMU attributes for the RO
data and the code.

Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

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Tegra: support for silicon/simulation platforms

This patch adds support to identify the underlying platform
on which we are running. The currently supported platforms
are actual silicon and simulati

Tegra: support for silicon/simulation platforms

This patch adds support to identify the underlying platform
on which we are running. The currently supported platforms
are actual silicon and simulation platforms.

Change-Id: Iadf96e79ec663b3dbd1a18e9bb95ffcdb82fc8af
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

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Merge pull request #853 from vwadekar/tegra-changes-from-downstream-v3

Tegra changes from downstream v3

Tegra: implement FIQ interrupt handler

This patch adds a handler for FIQ interrupts triggered when
the CPU is in the NS world. The handler stores the NS world's
context along with ELR_EL3/SPSR_EL3.

Tegra: implement FIQ interrupt handler

This patch adds a handler for FIQ interrupts triggered when
the CPU is in the NS world. The handler stores the NS world's
context along with ELR_EL3/SPSR_EL3.

The NS world driver issues an SMC initially to register it's
handler. The monitor firmware stores this handler address and
jumps to it when the FIQ interrupt fires. Upon entry into the
NS world the driver then issues another SMC to get the CPU
context when the FIQ fired. This allows the NS world driver to
determine the CPU state and call stack when the interrupt
fired. Generally, systems register watchdog interrupts as FIQs
which are then used to get the CPU state during hangs/crashes.

Change-Id: I733af61a08d1318c75acedbe9569a758744edd0c
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

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Tegra: GIC: enable FIQ interrupt handling

Tegra chips support multiple FIQ interrupt sources. These interrupts
are enabled in the GICD/GICC interfaces by the tegra_gic driver. A
new FIQ handler woul

Tegra: GIC: enable FIQ interrupt handling

Tegra chips support multiple FIQ interrupt sources. These interrupts
are enabled in the GICD/GICC interfaces by the tegra_gic driver. A
new FIQ handler would be added in a subsequent change which can be
registered by the platform code.

This patch adds the GIC programming as part of the tegra_gic_setup()
which now takes an array of all the FIQ interrupts to be enabled for
the platform. The Tegra132 and Tegra210 platforms right now do not
register for any FIQ interrupts themselves, but will definitely use
this support in the future.

Change-Id: I0ea164be901cd6681167028fea0567399f18d4b8
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

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Tegra: implement common handler `plat_get_target_pwr_state()`

This patch adds a platform handler to calculate the proper target power
level at the specified affinity level.

Tegra platforms assign a

Tegra: implement common handler `plat_get_target_pwr_state()`

This patch adds a platform handler to calculate the proper target power
level at the specified affinity level.

Tegra platforms assign a local state value in order of decreasing depth
of the power state i.e. for two power states X & Y, if X < Y then X
represents a shallower power state than Y. As a result, the coordinated
target local power state for a power domain will be the maximum of the
requested local power state values.

Change-Id: I67360684b7f5b783fcfdd605b96da5375fa05417
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

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Merge pull request #849 from vwadekar/tegra-changes-from-downstream-v2

Tegra changes from downstream v2