feat(mediatek): move plat_helpers.h to the common folder

The plat_helpers.h is identical across various platforms, moved to the
common folder for easier maintenance.

Change-Id: Ic9f10c697fcda7e3cfb

feat(mediatek): move plat_helpers.h to the common folder

The plat_helpers.h is identical across various platforms, moved to the
common folder for easier maintenance.

Change-Id: Ic9f10c697fcda7e3cfbf32e67486c9cd28481b8a
Signed-off-by: Gavin Liu <gavin.liu@mediatek.com>

show more ...

feat(mt8188): add MT8188 TRNG driver

Add MTK TRNG driver for MT8188.

Change-Id: I604edd42ffce9a153e209a015ba454b51da454e1
Signed-off-by: Suyuan Su <suyuan.su@mediatek.com>
Signed-off-by: Gavin Liu

feat(mt8188): add MT8188 TRNG driver

Add MTK TRNG driver for MT8188.

Change-Id: I604edd42ffce9a153e209a015ba454b51da454e1
Signed-off-by: Suyuan Su <suyuan.su@mediatek.com>
Signed-off-by: Gavin Liu <gavin.liu@mediatek.com>

show more ...

feat(mt8186): add common and MT8186 TRNG driver

Introduce a common RNG driver along with the specific driver for MT8186
platform.

Change-Id: I9f4437b6a4b3e8564a035ff5abb681bcfe85bd1e
Signed-off-by:

feat(mt8186): add common and MT8186 TRNG driver

Introduce a common RNG driver along with the specific driver for MT8186
platform.

Change-Id: I9f4437b6a4b3e8564a035ff5abb681bcfe85bd1e
Signed-off-by: Suyuan Su <suyuan.su@mediatek.com>
Signed-off-by: Gavin Liu <gavin.liu@mediatek.com>

show more ...

Merge changes I7d9444d5,I7b104c8e into integration

* changes:
feat(mt8192): update memory protect region
feat(mt8195): update memory protect region

feat(mediatek): change log level from INFO to VERBOSE

This change aims to reduce unnecessary information in the default log
output, so change to use VERBOSE.

Change-Id: I80ea57cd4164bdcef915db5392a

feat(mediatek): change log level from INFO to VERBOSE

This change aims to reduce unnecessary information in the default log
output, so change to use VERBOSE.

Change-Id: I80ea57cd4164bdcef915db5392a63ae8982a634f
Signed-off-by: Gavin Liu <gavin.liu@mediatek.com>

show more ...

feat(mt8188): update SVP region ID protection flow

- Extend the SVP region number from 1 to 10
- Mapping one region each time

Change-Id: I2dd517127018c71174f3d52a2118463370caf569
Signed-off-by: Gav

feat(mt8188): update SVP region ID protection flow

- Extend the SVP region number from 1 to 10
- Mapping one region each time

Change-Id: I2dd517127018c71174f3d52a2118463370caf569
Signed-off-by: Gavin Liu <gavin.liu@mediatek.com>

show more ...

build: consolidate directory creation rules

This commit streamlines directory creation by introducing a single
pattern rule to automatically make directories for which there is a
dependency.

We cur

build: consolidate directory creation rules

This commit streamlines directory creation by introducing a single
pattern rule to automatically make directories for which there is a
dependency.

We currently use several macros to generate rules to create directories
upon dependence, which is a significant amount of code and a lot of
redundancy. The rule introduced by this change represents a catch-all:
any rule dependency on a path ending in a forward slash is automatically
created.

Now, rules can rely on an unordered dependency (`|`) on `$$(@D)/` which,
when secondary expansion is enabled, expands to the directory of the
target being built, e.g.:

build/main.o: main.c | $$(@D)/ # automatically creates `build/`

Change-Id: I7e554efa2ac850e779bb302fd9c7fbb239886c9f
Signed-off-by: Chris Kay <chris.kay@arm.com>

show more ...

fix(mt8188): remove BL32 region protection if SPD sets to none

When SPD is set to none, it means we don't run any secure OS on the
system. We should make this memory region available to kernel.

Cha

fix(mt8188): remove BL32 region protection if SPD sets to none

When SPD is set to none, it means we don't run any secure OS on the
system. We should make this memory region available to kernel.

Change-Id: Ia83ff4a7d25de38a5d845b7ee1367bafed43bbdd
Signed-off-by: Yidi Lin <yidilin@chromium.org>

show more ...

refactor(mediatek): refactor handling of variables with value 'n'

Refactor to properly handle the case when the variable has a value
of 'n'.

Change-Id: I2f5045253511ec5e5d717821d8428c4e3ed6b7b6
Sig

refactor(mediatek): refactor handling of variables with value 'n'

Refactor to properly handle the case when the variable has a value
of 'n'.

Change-Id: I2f5045253511ec5e5d717821d8428c4e3ed6b7b6
Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com>

show more ...

feat(mt8192): update memory protect region

SCP memory protect region need to align to SCP DRAM range.
Refer to
https://source.chromium.org/chromiumos/chromiumos/codesearch/+/main:src/platform/ec/bas

feat(mt8192): update memory protect region

SCP memory protect region need to align to SCP DRAM range.
Refer to
https://source.chromium.org/chromiumos/chromiumos/codesearch/+/main:src/platform/ec/baseboard/mtscp-rv32i/baseboard.h;l=132

Change-Id: I7d9444d5339f71e6bfdd9999a217e0c177e8199f
Signed-off-by: Kiwi Liu <kiwi.liu@mediatek.corp-partner.google.com>

show more ...

feat(mt8195): update memory protect region

SCP memory protect region need to align to SCP DRAM range.
Refer to
https://source.chromium.org/chromiumos/chromiumos/codesearch/+/main:src/platform/ec/bas

feat(mt8195): update memory protect region

SCP memory protect region need to align to SCP DRAM range.
Refer to
https://source.chromium.org/chromiumos/chromiumos/codesearch/+/main:src/platform/ec/baseboard/mtscp-rv32i/baseboard.h;l=149

Change-Id: I7b104c8ea8ee7f13d829a79f0a310d93ea466215
Signed-off-by: Kiwi Liu <kiwi.liu@mediatek.corp-partner.google.com>

show more ...

feat(mediatek): configure DEV_IRQ as G1S interrupt

In order to register DEV_IRQ as secure interrupt in OP-TEE, the the GICD
EnableGrp1S should be enabled for DEV_IRQ. Add mtk_interrupt_props in
MTK

feat(mediatek): configure DEV_IRQ as G1S interrupt

In order to register DEV_IRQ as secure interrupt in OP-TEE, the the GICD
EnableGrp1S should be enabled for DEV_IRQ. Add mtk_interrupt_props in
MTK GIC driver to configure the interrupt properly.

Signed-off-by: Gavin Liu <gavin.liu@mediatek.com>
Change-Id: Id909a42b535088c6d0dcaf803d3f2faf312ae846

show more ...

build: add string casing facilities to utilities

This is a small modification to two existing functions in the build
system: `uppercase` and `lowercase`.

These functions have been moved to the comm

build: add string casing facilities to utilities

This is a small modification to two existing functions in the build
system: `uppercase` and `lowercase`.

These functions have been moved to the common utilities makefile, and
use the `tr` tool to simplify their implementation. Behaviour is, for
virtually all use-cases, identical.

Change-Id: I0e459d92e454087e4188b2fa5968244e5db89906
Signed-off-by: Chris Kay <chris.kay@arm.com>

show more ...

feat(mt8188): update SVP region ID and permission

- Update SVP EMI-MPU region ID from 4 to 5 for resolving
the issue of duplicate region ID used by the DSP.
- For SVP EMI-MPU region, modify domain

feat(mt8188): update SVP region ID and permission

- Update SVP EMI-MPU region ID from 4 to 5 for resolving
the issue of duplicate region ID used by the DSP.
- For SVP EMI-MPU region, modify domain 1 and domain 6 APC from
FORBIDDEN to SEC_RW.
- Correct the calculation for the end address of SVP DRAM region.
- Add region 0 and region 1 for BL31 and BL32 memory protection.
- Add clear region protection API for SVP region.

Change-Id: Iaea348ad9be629e8a81cf579b148c6df66015b42
Signed-off-by: Haohao Sun <haohao.sun@mediatek.corp-partner.google.com>

show more ...

feat(mt8188): update the memory usage for SCP core0 and core1

- Reduce core0 memory usage from 41MB to 8MB.
- Increase core1 memory to 160MB to fulfill user-specific features.

Change-Id: I35547e2ac

feat(mt8188): update the memory usage for SCP core0 and core1

- Reduce core0 memory usage from 41MB to 8MB.
- Increase core1 memory to 160MB to fulfill user-specific features.

Change-Id: I35547e2ac928945c244883d2333f921ce578bbd1
Signed-off-by: Jason Chen <Jason-ch.Chen@mediatek.com>

show more ...

refactor(console): consolidate console runtime switch

Refactor console_flush() and console_switch_state(CONSOLE_FLAG_RUNTIME)
to bl31_main(). This has been done per the recommendation in TF-A
mailin

refactor(console): consolidate console runtime switch

Refactor console_flush() and console_switch_state(CONSOLE_FLAG_RUNTIME)
to bl31_main(). This has been done per the recommendation in TF-A
mailing list. These calls need to be the last calls, after any runtime
initialization has been done, before BL31 exits.

All platforms that override the generic implementation of
bl31_plat_runtime_setup() have been refactored. The console_flush()
and console_switch_state() calls have been removed as they become
part of bl31_main() function.

Any platform that don't need to make any change to the generic (weak)
implementation of bl31_plat_runtime_setup() don't need to override it
in their platforms.

Change-Id: I6d04d6daa9353daeaa7e3df9e9adf6f322a917b8
Signed-off-by: Salman Nabi <salman.nabi@arm.com>

show more ...

refactor(mediatek): console runtime switch on bl31 exit

Flush the FIFO before switching to runtime. This is so that there are
no lingering chars in the FIFO when we move to the runtime console.

TF-

refactor(mediatek): console runtime switch on bl31 exit

Flush the FIFO before switching to runtime. This is so that there are
no lingering chars in the FIFO when we move to the runtime console.

TF-A plans to refactor the console_Switch_state(CONSOLE_FLAG_RUNTIME)
and console_flush() calls and make them the last calls in bl31_main()
(before BL31 exits). Until then they are being left as the last calls
in bl31_plat_runtime_setup() for testing before refactoring.

This patch affects the Mediatek platform only.

Change-Id: I83beee28ed856bc9b2f3131aa577be9bfa529028
Signed-off-by: Salman Nabi <salman.nabi@arm.com>

show more ...

feat(mt8188): remove apusys kernel handler usage constraints

It is expected that kernel can control the flow of the TF-A operations.
This patch remove the apusys kernel handler usage constraints, ma

feat(mt8188): remove apusys kernel handler usage constraints

It is expected that kernel can control the flow of the TF-A operations.
This patch remove the apusys kernel handler usage constraints, making
the operations all controlled on kernel side.

Signed-off-by: Karl Li <karl.li@mediatek.com>
Change-Id: Idc205a2cf23e1ff5f1920658a3b089c823f0288a

show more ...

feat(mt8188): add secure iommu support

The secure IOMMU has two secure banks: VDO and VPP. Add SiP call to
report the secure bank status in debug build.
About more background, please see:
https://gi

feat(mt8188): add secure iommu support

The secure IOMMU has two secure banks: VDO and VPP. Add SiP call to
report the secure bank status in debug build.
About more background, please see:
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/include/dt-bindings/memory/mediatek,mt8188-memory-port.h?id=d5cda142d649c690fb0fcf1e29f3df63fbafc442

Change-Id: I7b3319e84391fc6d7f456659f8b8c5d9d1c6ab9d
Signed-off-by: Anan Sun <anan.sun@mediatek.corp-partner.google.com>
Signed-off-by: Kiwi Liu <kiwi.liu@mediatek.corp-partner.google.com>
Signed-off-by: Yong Wu <yong.wu@mediatek.com>

show more ...

feat(mediatek): remove bl32 flag for mtk_bl

Currently MediaTek platform code does not support the bl32 image.
Remove bl32 support from Makefile to prevent the build failure when
NEED_BL32 build flag

feat(mediatek): remove bl32 flag for mtk_bl

Currently MediaTek platform code does not support the bl32 image.
Remove bl32 support from Makefile to prevent the build failure when
NEED_BL32 build flag is enabled.

Change-Id: Id8d5663ea5c537390f8ff3ccb427a3a63266545e
Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com>

show more ...

Merge "feat(mt8195): increase TZRAM" into integration

feat(mt8188): add EMI MPU support for SCP and DSP

1. Allow domain D8 (SCP c0) access to the region 0x50000000~0x528FFFFF.
2. Allow domain D8 (SCP c1) access to the region 0x70000000~0x729FFFFF.
3. A

feat(mt8188): add EMI MPU support for SCP and DSP

1. Allow domain D8 (SCP c0) access to the region 0x50000000~0x528FFFFF.
2. Allow domain D8 (SCP c1) access to the region 0x70000000~0x729FFFFF.
3. Allow domain D4 (DSP) access to the region 0x60000000~0x610FFFFF.

Change-Id: Iea92eebaea4d7dd2968cf51f41d07c2479168e7e
Signed-off-by: Jason Chen <Jason-ch.Chen@mediatek.com>

show more ...

feat(mt8188): add DSB before udelay

To ensure that all explicit memory accesses are complete before udelay,
insert dsb before udelay.

Change-Id: If119e920e29539ae8b68d3c44c8f77b5bf424a1a
Signed-off

feat(mt8188): add DSB before udelay

To ensure that all explicit memory accesses are complete before udelay,
insert dsb before udelay.

Change-Id: If119e920e29539ae8b68d3c44c8f77b5bf424a1a
Signed-off-by: Karl Li <karl.li@mediatek.com>

show more ...

feat(mt8188): update return value in mtk_emi_mpu_sip_handler

Remove the use of SMC_RET2 in the mtk_emi_mpu_sip_handler function. The
current smc driver in the atf driver has switched to using SMC_RE

feat(mt8188): update return value in mtk_emi_mpu_sip_handler

Remove the use of SMC_RET2 in the mtk_emi_mpu_sip_handler function. The
current smc driver in the atf driver has switched to using SMC_RET4 for
smc call clients. This change aligns the return value handling with the
updated driver behavior that ensures consistency and avoids potential
issues with the old return value.

Change-Id: I87f25b438d2119837c45bed80a8224fcfd141fb6
Signed-off-by: Dawei Chien <dawei.chien@mediatek.com>
Signed-off-by: Jason Chen <Jason-ch.Chen@mediatek.com>

show more ...

chore: remove MULTI_CONSOLE_API references

MULTI_CONSOLE_API have been removed long time ago by commit 5b6ebeec9c99
("Remove MULTI_CONSOLE_API flag and references to it") that's why remove
reference

chore: remove MULTI_CONSOLE_API references

MULTI_CONSOLE_API have been removed long time ago by commit 5b6ebeec9c99
("Remove MULTI_CONSOLE_API flag and references to it") that's why remove
references in platform.mk files and also in one rst which is not valid
anymore.

Change-Id: I45f8e7db0a14ce63de62509100d8159b7aca2657
Signed-off-by: Michal Simek <michal.simek@amd.com>

show more ...