feat(mt8196): enable apusys mailbox mpu protection

Enable mt8196 apusys mailbox mpu protection and
move the mt8188 setting to platform folder

Change-Id: I76b68318bb88e56b12cdacd9e2b998699ca6b48e
Si

feat(mt8196): enable apusys mailbox mpu protection

Enable mt8196 apusys mailbox mpu protection and
move the mt8188 setting to platform folder

Change-Id: I76b68318bb88e56b12cdacd9e2b998699ca6b48e
Signed-off-by: Karl Li <karl.li@mediatek.com>

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feat(mt8196): enable apusys security control

Remap the request from domain 5, 7, 14 to domain 6 and setup security
sideband

Change-Id: I06d377f4bcc542bf22e0a04ffb45cf52b7528a75
Signed-off-by: Karl

feat(mt8196): enable apusys security control

Remap the request from domain 5, 7, 14 to domain 6 and setup security
sideband

Change-Id: I06d377f4bcc542bf22e0a04ffb45cf52b7528a75
Signed-off-by: Karl Li <karl.li@mediatek.com>

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feat(mt8196): add APUSYS AO DevAPC setting

Apusys AO DevAPC is a set of control registers inside APU, controlling
the access permission of APU AO (Always On) domain.

This patch add the mt8196 APU A

feat(mt8196): add APUSYS AO DevAPC setting

Apusys AO DevAPC is a set of control registers inside APU, controlling
the access permission of APU AO (Always On) domain.

This patch add the mt8196 APU AO DevAPC setting to setup the protection.

Change-Id: I975a92795031cd1813442302890e29b671ef16f1
Signed-off-by: Karl Li <karl.li@mediatek.com>

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feat(mt8196): add APU power-on init flow

Add the APU (AI processing unit) power init flow to prepare the hardware
setting before using APU power functions.

Change-Id: I595b1d5100a4f083263de6527f920

feat(mt8196): add APU power-on init flow

Add the APU (AI processing unit) power init flow to prepare the hardware
setting before using APU power functions.

Change-Id: I595b1d5100a4f083263de6527f920e5168700b7a
Signed-off-by: Karl Li <karl.li@mediatek.com>

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feat(mediatek): add vcp driver support

It is excepted that kernel vcp can request the vcp hw do
some security setting via SMC call services.

Signed-off-by: Xiangzhi Tang <xiangzhi.tang@mediatek.cor

feat(mediatek): add vcp driver support

It is excepted that kernel vcp can request the vcp hw do
some security setting via SMC call services.

Signed-off-by: Xiangzhi Tang <xiangzhi.tang@mediatek.corp-partner.google.com>
Change-Id: Ib5c01c1d72b3483262dcd821878e6e53ba9c681c

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feat(mt8196): enable DP and eDP for mt8196

- Add register definitions for DP
- Add mmap entry for DP register access

Change-Id: I22ed9fa36a7e13fcaed0c137d0e8f4449b6a52d7
Signed-off-by: Mac Shen <ma

feat(mt8196): enable DP and eDP for mt8196

- Add register definitions for DP
- Add mmap entry for DP register access

Change-Id: I22ed9fa36a7e13fcaed0c137d0e8f4449b6a52d7
Signed-off-by: Mac Shen <mac.shen@mediatek.com>

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feat(mt8196): add GPIO support

- MT8196 has 271 GPIO pins. Therefore, update id to a proper datatype.
- Add GPIO support for MT8196.

Signed-off-by: Cathy Xu <ot_cathy.xu@mediatek.com>
Change-Id: I2

feat(mt8196): add GPIO support

- MT8196 has 271 GPIO pins. Therefore, update id to a proper datatype.
- Add GPIO support for MT8196.

Signed-off-by: Cathy Xu <ot_cathy.xu@mediatek.com>
Change-Id: I283939684b54f79d1bba02f38e047e756a56f0c9

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feat(mt8196): initialize platform for MediaTek MT8196

- Add basic platform setup.
- Add MT8196 documentation at docs/plat/.
- Add generic CPU helper functions.
- Add basic register address.
- Add ti

feat(mt8196): initialize platform for MediaTek MT8196

- Add basic platform setup.
- Add MT8196 documentation at docs/plat/.
- Add generic CPU helper functions.
- Add basic register address.
- Add timer driver configuration.

Change-Id: I07fcdeb785fcda4a955c11c39a345da4ad05ef04
Signed-off-by: Gavin Liu <gavin.liu@mediatek.com>

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