feat(mt8196): add topology module for power management

Add topology module to support CPU power state control.

Signed-off-by: Kai Liang <kai.liang@mediatek.com>
Change-Id: I0cc1e5a426762b1b29bff1e9

feat(mt8196): add topology module for power management

Add topology module to support CPU power state control.

Signed-off-by: Kai Liang <kai.liang@mediatek.com>
Change-Id: I0cc1e5a426762b1b29bff1e940e077643da02e5e

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feat(mt8196): add SPMI driver

Add SPMI and PMIF driver for PMIC communication

Change-Id: Iad1d90381d6dad6b3e92fd9d6a3ce02fa11d15f1
Signed-off-by: Hope Wang <hope.wang@mediatek.corp-partner.google.c

feat(mt8196): add SPMI driver

Add SPMI and PMIF driver for PMIC communication

Change-Id: Iad1d90381d6dad6b3e92fd9d6a3ce02fa11d15f1
Signed-off-by: Hope Wang <hope.wang@mediatek.corp-partner.google.com>

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feat(mt8196): add PMIC driver

1. Add PMIC shutdown API
2. Add PMIC low power settings

Change-Id: I634a60fa3e2a74a6031df9fe59e2f52956ef7114
Signed-off-by: Hope Wang <hope.wang@mediatek.corp-partner.

feat(mt8196): add PMIC driver

1. Add PMIC shutdown API
2. Add PMIC low power settings

Change-Id: I634a60fa3e2a74a6031df9fe59e2f52956ef7114
Signed-off-by: Hope Wang <hope.wang@mediatek.corp-partner.google.com>

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feat(mediatek): add gic driver

Add GIC driver for taking interrupts to core.

Signed-off-by: Runyang Chen <runyang.chen@mediatek.com>
Change-Id: Id4d702b8579488befc1a1b6d37e66287dd534798

feat(mt8196): add Mediatek EMI stub implementation for mt8196

Implement stub functions for the EMI driver to ensure that the build
can pass when a prebuilt library is not available.

Change-Id: I296

feat(mt8196): add Mediatek EMI stub implementation for mt8196

Implement stub functions for the EMI driver to ensure that the build
can pass when a prebuilt library is not available.

Change-Id: I296945a3df6766a3a133cd385a1e5038ca979403
Signed-off-by: Gavin Liu <gavin.liu@mediatek.corp-partner.google.com>

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Merge changes Ic746571b,I1926cab9,Id70162e9,I3a9b014e,Ic99adba1, ... into integration

* changes:
feat(mt8196): enable APU on mt8196
feat(mt8196): add APU SMMU hardware semaphore operations
fea

Merge changes Ic746571b,I1926cab9,Id70162e9,I3a9b014e,Ic99adba1, ... into integration

* changes:
feat(mt8196): enable APU on mt8196
feat(mt8196): add APU SMMU hardware semaphore operations
feat(mt8196): add smpu protection for APU secure memory
feat(mt8196): add APU RCX DevAPC setting
feat(mt8196): add APU kernel control operations
feat(mt8196): add APU power on/off functions
feat(mt8196): add APUMMU setting
feat(mt8196): enable apusys mailbox mpu protection
feat(mt8196): enable apusys security control
feat(mt8196): add APUSYS AO DevAPC setting
feat(mt8196): add APU power-on init flow

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feat(mt8196): add APU SMMU hardware semaphore operations

Add APU SMMU hardware semaphore operations to make APU SMMU
able to sync the power status.

Change-Id: I1926cab990fba54a2ea694ac6d9e87135dfb1

feat(mt8196): add APU SMMU hardware semaphore operations

Add APU SMMU hardware semaphore operations to make APU SMMU
able to sync the power status.

Change-Id: I1926cab990fba54a2ea694ac6d9e87135dfb19cf
Signed-off-by: Karl Li <karl.li@mediatek.com>

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feat(mt8196): add smpu protection for APU secure memory

1. Add smpu protection for APU secure memory.
2. Move emi mpu protection for mt8188 to platform folder

Since the smpu driver has not upstream

feat(mt8196): add smpu protection for APU secure memory

1. Add smpu protection for APU secure memory.
2. Move emi mpu protection for mt8188 to platform folder

Since the smpu driver has not upstream, we currently leave the interface
and do nothing until smpu driver is ready.

Change-Id: Id70162e90a7deb64befe90f09a841a0903535482
Signed-off-by: Karl Li <karl.li@mediatek.com>

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feat(mt8196): add APU RCX DevAPC setting

APU RCX is a sub-domain in apusys, connecting several APU components.
The APU RCX DevAPC control lives in APU and can only be set after
APU is powered on.
Th

feat(mt8196): add APU RCX DevAPC setting

APU RCX is a sub-domain in apusys, connecting several APU components.
The APU RCX DevAPC control lives in APU and can only be set after
APU is powered on.
The APUSYS kernel driver will trigger RCX DevAPC init by smc call.

Change-Id: I3a9b014ea1be7ee80fd6861ad088f1dec5410872
Signed-off-by: Karl Li <karl.li@mediatek.com>

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feat(mt8196): add APU kernel control operations

Add APU kernel control operations to provide the bootup init functions.

1. Add software workaround for certain operations on mt8196.
2. Add APU logge

feat(mt8196): add APU kernel control operations

Add APU kernel control operations to provide the bootup init functions.

1. Add software workaround for certain operations on mt8196.
2. Add APU logger operations.
3. Add function to clear mbox spare register, which is used in APU
booting process.
4. Add function to setup CE binary to make sure the CE binary version
is align with the APU firmware.

Change-Id: Ic99adba1409c020c72179ea135e0d4291fc3f384
Signed-off-by: Karl Li <karl.li@mediatek.com>

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feat(mt8196): add APU power on/off functions

1. Add APU power on/off functions
2. Refine the APU power on/off interface for mt8188
3. Add dcm setup function to support mt8196

Change-Id: Ie1caca40f8

feat(mt8196): add APU power on/off functions

1. Add APU power on/off functions
2. Refine the APU power on/off interface for mt8188
3. Add dcm setup function to support mt8196

Change-Id: Ie1caca40f89de71caac037fabe7e7455ff2a1872
Signed-off-by: Karl Li <karl.li@mediatek.com>

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feat(mt8196): add APUMMU setting

APUMMU is the MMU in APU, which is responsible for inner address
mapping. The APU kernel driver will setup the APUMMU by SMC call.

Change-Id: Iad7532883e42c288aeb0d

feat(mt8196): add APUMMU setting

APUMMU is the MMU in APU, which is responsible for inner address
mapping. The APU kernel driver will setup the APUMMU by SMC call.

Change-Id: Iad7532883e42c288aeb0d23ab419f4dc6d8630f2
Signed-off-by: Karl Li <karl.li@mediatek.com>

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feat(mt8196): enable apusys mailbox mpu protection

Enable mt8196 apusys mailbox mpu protection and
move the mt8188 setting to platform folder

Change-Id: I76b68318bb88e56b12cdacd9e2b998699ca6b48e
Si

feat(mt8196): enable apusys mailbox mpu protection

Enable mt8196 apusys mailbox mpu protection and
move the mt8188 setting to platform folder

Change-Id: I76b68318bb88e56b12cdacd9e2b998699ca6b48e
Signed-off-by: Karl Li <karl.li@mediatek.com>

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feat(mt8196): enable apusys security control

Remap the request from domain 5, 7, 14 to domain 6 and setup security
sideband

Change-Id: I06d377f4bcc542bf22e0a04ffb45cf52b7528a75
Signed-off-by: Karl

feat(mt8196): enable apusys security control

Remap the request from domain 5, 7, 14 to domain 6 and setup security
sideband

Change-Id: I06d377f4bcc542bf22e0a04ffb45cf52b7528a75
Signed-off-by: Karl Li <karl.li@mediatek.com>

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feat(mt8196): add APUSYS AO DevAPC setting

Apusys AO DevAPC is a set of control registers inside APU, controlling
the access permission of APU AO (Always On) domain.

This patch add the mt8196 APU A

feat(mt8196): add APUSYS AO DevAPC setting

Apusys AO DevAPC is a set of control registers inside APU, controlling
the access permission of APU AO (Always On) domain.

This patch add the mt8196 APU AO DevAPC setting to setup the protection.

Change-Id: I975a92795031cd1813442302890e29b671ef16f1
Signed-off-by: Karl Li <karl.li@mediatek.com>

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feat(mt8196): add APU power-on init flow

Add the APU (AI processing unit) power init flow to prepare the hardware
setting before using APU power functions.

Change-Id: I595b1d5100a4f083263de6527f920

feat(mt8196): add APU power-on init flow

Add the APU (AI processing unit) power init flow to prepare the hardware
setting before using APU power functions.

Change-Id: I595b1d5100a4f083263de6527f920e5168700b7a
Signed-off-by: Karl Li <karl.li@mediatek.com>

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feat(mediatek): add vcp driver support

It is excepted that kernel vcp can request the vcp hw do
some security setting via SMC call services.

Signed-off-by: Xiangzhi Tang <xiangzhi.tang@mediatek.cor

feat(mediatek): add vcp driver support

It is excepted that kernel vcp can request the vcp hw do
some security setting via SMC call services.

Signed-off-by: Xiangzhi Tang <xiangzhi.tang@mediatek.corp-partner.google.com>
Change-Id: Ib5c01c1d72b3483262dcd821878e6e53ba9c681c

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feat(mt8196): add GPIO support

- MT8196 has 271 GPIO pins. Therefore, update id to a proper datatype.
- Add GPIO support for MT8196.

Signed-off-by: Cathy Xu <ot_cathy.xu@mediatek.com>
Change-Id: I2

feat(mt8196): add GPIO support

- MT8196 has 271 GPIO pins. Therefore, update id to a proper datatype.
- Add GPIO support for MT8196.

Signed-off-by: Cathy Xu <ot_cathy.xu@mediatek.com>
Change-Id: I283939684b54f79d1bba02f38e047e756a56f0c9

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feat(mt8196): initialize platform for MediaTek MT8196

- Add basic platform setup.
- Add MT8196 documentation at docs/plat/.
- Add generic CPU helper functions.
- Add basic register address.
- Add ti

feat(mt8196): initialize platform for MediaTek MT8196

- Add basic platform setup.
- Add MT8196 documentation at docs/plat/.
- Add generic CPU helper functions.
- Add basic register address.
- Add timer driver configuration.

Change-Id: I07fcdeb785fcda4a955c11c39a345da4ad05ef04
Signed-off-by: Gavin Liu <gavin.liu@mediatek.com>

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feat(mt8188): add MT8188 TRNG driver

Add MTK TRNG driver for MT8188.

Change-Id: I604edd42ffce9a153e209a015ba454b51da454e1
Signed-off-by: Suyuan Su <suyuan.su@mediatek.com>
Signed-off-by: Gavin Liu

feat(mt8188): add MT8188 TRNG driver

Add MTK TRNG driver for MT8188.

Change-Id: I604edd42ffce9a153e209a015ba454b51da454e1
Signed-off-by: Suyuan Su <suyuan.su@mediatek.com>
Signed-off-by: Gavin Liu <gavin.liu@mediatek.com>

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feat(mt8186): add common and MT8186 TRNG driver

Introduce a common RNG driver along with the specific driver for MT8186
platform.

Change-Id: I9f4437b6a4b3e8564a035ff5abb681bcfe85bd1e
Signed-off-by:

feat(mt8186): add common and MT8186 TRNG driver

Introduce a common RNG driver along with the specific driver for MT8186
platform.

Change-Id: I9f4437b6a4b3e8564a035ff5abb681bcfe85bd1e
Signed-off-by: Suyuan Su <suyuan.su@mediatek.com>
Signed-off-by: Gavin Liu <gavin.liu@mediatek.com>

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feat(mt8188): update SVP region ID protection flow

- Extend the SVP region number from 1 to 10
- Mapping one region each time

Change-Id: I2dd517127018c71174f3d52a2118463370caf569
Signed-off-by: Gav

feat(mt8188): update SVP region ID protection flow

- Extend the SVP region number from 1 to 10
- Mapping one region each time

Change-Id: I2dd517127018c71174f3d52a2118463370caf569
Signed-off-by: Gavin Liu <gavin.liu@mediatek.com>

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fix(mt8188): remove BL32 region protection if SPD sets to none

When SPD is set to none, it means we don't run any secure OS on the
system. We should make this memory region available to kernel.

Cha

fix(mt8188): remove BL32 region protection if SPD sets to none

When SPD is set to none, it means we don't run any secure OS on the
system. We should make this memory region available to kernel.

Change-Id: Ia83ff4a7d25de38a5d845b7ee1367bafed43bbdd
Signed-off-by: Yidi Lin <yidilin@chromium.org>

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feat(mediatek): configure DEV_IRQ as G1S interrupt

In order to register DEV_IRQ as secure interrupt in OP-TEE, the the GICD
EnableGrp1S should be enabled for DEV_IRQ. Add mtk_interrupt_props in
MTK

feat(mediatek): configure DEV_IRQ as G1S interrupt

In order to register DEV_IRQ as secure interrupt in OP-TEE, the the GICD
EnableGrp1S should be enabled for DEV_IRQ. Add mtk_interrupt_props in
MTK GIC driver to configure the interrupt properly.

Signed-off-by: Gavin Liu <gavin.liu@mediatek.com>
Change-Id: Id909a42b535088c6d0dcaf803d3f2faf312ae846

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feat(mt8188): update SVP region ID and permission

- Update SVP EMI-MPU region ID from 4 to 5 for resolving
the issue of duplicate region ID used by the DSP.
- For SVP EMI-MPU region, modify domain

feat(mt8188): update SVP region ID and permission

- Update SVP EMI-MPU region ID from 4 to 5 for resolving
the issue of duplicate region ID used by the DSP.
- For SVP EMI-MPU region, modify domain 1 and domain 6 APC from
FORBIDDEN to SEC_RW.
- Correct the calculation for the end address of SVP DRAM region.
- Add region 0 and region 1 for BL31 and BL32 memory protection.
- Add clear region protection API for SVP region.

Change-Id: Iaea348ad9be629e8a81cf579b148c6df66015b42
Signed-off-by: Haohao Sun <haohao.sun@mediatek.corp-partner.google.com>

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