build(plat/marvell): do not print comments on stdout

'#' needs to be before TAB, otherwise comment is printed on stdout during build.

Signed-off-by: Pali Rohár <pali@kernel.org>
Change-Id: I502374e

build(plat/marvell): do not print comments on stdout

'#' needs to be before TAB, otherwise comment is printed on stdout during build.

Signed-off-by: Pali Rohár <pali@kernel.org>
Change-Id: I502374ef35d91e194dc35b78d31d6884a466fab2

show more ...

build(plat/marvell): add descriptions why some checks are required

This change adds just comments why some checks are required. They check
that ENV variables and external repos are correctly set for

build(plat/marvell): add descriptions why some checks are required

This change adds just comments why some checks are required. They check
that ENV variables and external repos are correctly set for TF-A builds.

Signed-off-by: Pali Rohár <pali@kernel.org>
Change-Id: I2f8af5061411c0c92d3875917f4d97b60dc2cf10

show more ...

plat/marvell/a8k: add Globalscale Mochabin support

Add support for Globalscale MOCHAbin board.

Its based on Armada 7040 SoC and ships in multiple DRAM options:
* 2GB DDR4 (1CS)
* 4GB DDR4 (1CS)
* 8

plat/marvell/a8k: add Globalscale Mochabin support

Add support for Globalscale MOCHAbin board.

Its based on Armada 7040 SoC and ships in multiple DRAM options:
* 2GB DDR4 (1CS)
* 4GB DDR4 (1CS)
* 8GB DDR4 (2CS)

Since it ships in multiple DRAM configurations, an
Armada 3k style DDR_TOPOLOGY variable is added.
Currently, this only has effect on the MOCHAbin, but
I expect more boards with multiple DRAM sizes to be
supported.

Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Change-Id: I8a1ec9268fed34f6a81c5cbf1e891f638d461305

show more ...

refactor(makefile): remove BL prefixes in build macros

The current Makefile assumes all TF-A binaries
have BL prefixes (BL1, BL2, etc). Now that we
have other binary names with FEAT_RME feature, rem

refactor(makefile): remove BL prefixes in build macros

The current Makefile assumes all TF-A binaries
have BL prefixes (BL1, BL2, etc). Now that we
have other binary names with FEAT_RME feature, remove
this assumption. With this change, we need to pass
the full name of a binary when using build macros.

Signed-off-by: Zelalem Aweke <zelalem.aweke@arm.com>
Change-Id: I44e094b2366aa526f807d92dffa709390d14d145

show more ...

fix(plat/marvell/a3k): enable workaround for erratum 1530924

Erratum 1530924 affects Armada 37xx CPU, since it affects all Cortex-A53
revisions from r0p0 to r0p4.

Enable the workaround for this err

fix(plat/marvell/a3k): enable workaround for erratum 1530924

Erratum 1530924 affects Armada 37xx CPU, since it affects all Cortex-A53
revisions from r0p0 to r0p4.

Enable the workaround for this erratum.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Change-Id: I753225040e49e956788d5617cd7ce76d5e6ea8e8

show more ...

Merge changes from topic "advk-serror" into integration

* changes:
fix(plat/marvell/a3k): disable HANDLE_EA_EL3_FIRST by default
fix(plat/marvell/a3k): update information about PCIe abort hack

feat(plat/marvell): introduce t9130_cex7_eval

This patch adds the necessary files to support
the SolidRun CN913X CEx7 Evaluation Board.

Because the DRAM connectivity and SerDes settings
is shared w

feat(plat/marvell): introduce t9130_cex7_eval

This patch adds the necessary files to support
the SolidRun CN913X CEx7 Evaluation Board.

Because the DRAM connectivity and SerDes settings
is shared with the CN913X DB - reuse relevant
board-specific files.

Change-Id: I75a4554a4373953ca3fdf3b04c4a29c2c4f8ea80
Signed-off-by: Marcin Wojtas <mw@semihalf.com>

show more ...

feat(plat/marvell/a8k): allow overriding default paths

The common makefile used by every a8k/cn913x platform
(a8k_common.mk) assumed default paths in PLAT_INCLUDES,
BLE/BL31_PORTING_SOURCES. Allow o

feat(plat/marvell/a8k): allow overriding default paths

The common makefile used by every a8k/cn913x platform
(a8k_common.mk) assumed default paths in PLAT_INCLUDES,
BLE/BL31_PORTING_SOURCES. Allow overriding those
variables, in order to avoid code duplication.

It can be helpful in case using multiple board variants
or sharing common settings between different platforms.

Change-Id: Idce603e44ed04d99fb1e3e11a2bb395d552e2bf7
Signed-off-by: Marcin Wojtas <mw@semihalf.com>

show more ...

fix(plat/marvell/a3k): disable HANDLE_EA_EL3_FIRST by default

It was enabled in commit 3c7dcdac5c50 ("marvell/a3700: Prevent SError
accessing PCIe link while it is down") with a workaround for a bug

fix(plat/marvell/a3k): disable HANDLE_EA_EL3_FIRST by default

It was enabled in commit 3c7dcdac5c50 ("marvell/a3700: Prevent SError
accessing PCIe link while it is down") with a workaround for a bug found
in U-Boot and Linux kernel driver pci-aardvark.c (PCIe controller driver
for Armada 37xx SoC) which results in SError interrupt caused by AXI
SLVERR on external access (syndrome 0xbf000002) and immediate kernel
panic.

Now when proper patches are in both U-Boot and Linux kernel projects,
this workaround in TF-A should not have to be enabled by default
anymore as it has unwanted side effects like propagating all external
aborts, including non-fatal/correctable into EL3 and making them as
fatal which cause immediate abort.

Add documentation for HANDLE_EA_EL3_FIRST build option into Marvell
Armada build section.

Signed-off-by: Pali Rohár <pali@kernel.org>
Change-Id: Ic92b65bf9923505ab682830afb66c2f6cec70491

show more ...

fix(plat/marvell/a3k): update information about PCIe abort hack

A3700 plat_ea_handler was introduced into TF-A codebase just because of
bugs in U-Boot and Linux kernel PCIe controller driver pci-aar

fix(plat/marvell/a3k): update information about PCIe abort hack

A3700 plat_ea_handler was introduced into TF-A codebase just because of
bugs in U-Boot and Linux kernel PCIe controller driver pci-aardvark.c.

These bugs were finally fixed in both U-Boot and Linux kernel drivers:
https://source.denx.de/u-boot/u-boot/-/commit/eccbd4ad8e4e182638eafbfb87ac139c04f24a01
https://git.kernel.org/stable/c/f18139966d072dab8e4398c95ce955a9742e04f7

Add all these information into comments, including printing error
message into a3k plat_ea_handler. Also check that abort is really
asynchronous and comes from lower level than EL3.

Signed-off-by: Pali Rohár <pali@kernel.org>
Change-Id: I46318d221b39773d5e25b3a0221d7738736ffdf1

show more ...

refactor(plat/ea_handler): Use default ea handler implementation for panic

Put default ea handler implementation into function plat_default_ea_handler()
which just print verbose information and pani

refactor(plat/ea_handler): Use default ea handler implementation for panic

Put default ea handler implementation into function plat_default_ea_handler()
which just print verbose information and panic, so it can be called also
from overwritten / weak function plat_ea_handler() implementation.

Replace every custom implementation of printing verbose error message of
external aborts in custom plat_ea_handler() functions by a common
implementation from plat_default_ea_handler() function.

Signed-off-by: Pali Rohár <pali@kernel.org>
Change-Id: I15897f61b62b4c3c29351e693f51d4df381f3b98

show more ...

Merge changes from topic "marvell-a3k-a8k-updates" into integration

* changes:
fix(plat/marvell/a3k): Fix building uart-images.tgz.bin archive
refactor(plat/marvell/a3k): Rename *_CFG and *_SIG

Merge changes from topic "marvell-a3k-a8k-updates" into integration

* changes:
fix(plat/marvell/a3k): Fix building uart-images.tgz.bin archive
refactor(plat/marvell/a3k): Rename *_CFG and *_SIG variables
refactor(plat/marvell/a3k): Rename DOIMAGETOOL to TBB
refactor(plat/marvell/a3k): Remove useless DOIMAGEPATH variable
fix(plat/marvell/a3k): Fix check for external dependences
fix(plat/marvell/a8k): Add missing build dependency for BLE target
fix(plat/marvell/a8k): Correctly set include directories for individual targets
fix(plat/marvell/a8k): Require that MV_DDR_PATH is correctly set

show more ...

fix(plat/marvell/a3k): fix printing info messages on output

INFO() macro for every call prepends "INFO: " string. Therefore
current code prints unreadable debug messages:

"INFO: set_io_add

fix(plat/marvell/a3k): fix printing info messages on output

INFO() macro for every call prepends "INFO: " string. Therefore
current code prints unreadable debug messages:

"INFO: set_io_addr_dec 0 result: ctrl(0x3fff3d01) base(0x0)INFO: "
"INFO: Set IO decode window successfully, base(0xc000)INFO: win_attr(3d) max_dram_win(2) max_remap(0)INFO: win_offset(8)"

Fix it by calling exactly one INFO() call for one line. After this
change output is:

"INFO: set_io_addr_dec 0 result: ctrl(0x3fff3d01) base(0x0) remap(0x0)"
"INFO: Set IO decode window successfully, base(0xc000) win_attr(3d) max_dram_win(2) max_remap(0) win_offset(8)"

Signed-off-by: Pali Rohár <pali@kernel.org>
Change-Id: I6084e64c6f4da6c1929e5300588e4ba2608ca745

show more ...

fix(plat/marvell/a3k): Fix building uart-images.tgz.bin archive

For UART secure boot it is required also TIMN image, so pack it into
uart-images.tgz.bin archive which is created by mrvl_uart target.

fix(plat/marvell/a3k): Fix building uart-images.tgz.bin archive

For UART secure boot it is required also TIMN image, so pack it into
uart-images.tgz.bin archive which is created by mrvl_uart target.

$(TIMN_IMAGE) and $(TIM_IMAGE) variables are used only for UART images
so their content needs to be initialized from $(TIMN_UART_CFG) and
$(TIM_UART_CFG) config files. And not from $(TIMN_CFG) and $(TIM_CFG) as
it is now because they are not generated during mrvl_uart target. Fix it
to allow building mrvl_uart target before mrvl_flash target.

To match usage of these variables, rename them to $(TIMN_UART_IMAGE) and
$(TIM_UART_IMAGE).

To not complicate rule for building uart-images.tgz.bin archive, set
list of image files into a new $(UART_IMAGES) variable.

Signed-off-by: Pali Rohár <pali@kernel.org>
Change-Id: I83b980abb4047a3afb3ce3026842e1d873c490bf

show more ...

refactor(plat/marvell/a3k): Rename *_CFG and *_SIG variables

For TIM config file use TIM name instead of DOIMAGE and use underscores
to make variable names more readable.

Signed-off-by: Pali Rohár

refactor(plat/marvell/a3k): Rename *_CFG and *_SIG variables

For TIM config file use TIM name instead of DOIMAGE and use underscores
to make variable names more readable.

Signed-off-by: Pali Rohár <pali@kernel.org>
Change-Id: I1282ce11f1431c15458a143ae7bfcee85eed2432

show more ...

refactor(plat/marvell/a3k): Rename DOIMAGETOOL to TBB

Armada 3700 uses external TBB tool for creating images and does not use
internal TF-A doimage tool from tools/marvell/doimage/

Therefore set co

refactor(plat/marvell/a3k): Rename DOIMAGETOOL to TBB

Armada 3700 uses external TBB tool for creating images and does not use
internal TF-A doimage tool from tools/marvell/doimage/

Therefore set correct name of variable.

Signed-off-by: Pali Rohár <pali@kernel.org>
Change-Id: I38a94dca78d483de4c79da597c032e1e5d06d92d

show more ...

refactor(plat/marvell/a3k): Remove useless DOIMAGEPATH variable

Armada 3700 uses WTP so use WTP variable directly.

Signed-off-by: Pali Rohár <pali@kernel.org>
Change-Id: I216b40ffee1f3f8abba4677f05

refactor(plat/marvell/a3k): Remove useless DOIMAGEPATH variable

Armada 3700 uses WTP so use WTP variable directly.

Signed-off-by: Pali Rohár <pali@kernel.org>
Change-Id: I216b40ffee1f3f8abba4677f050ab376c2224ede

show more ...

fix(plat/marvell/a3k): Fix check for external dependences

Old Marvell a3700_utils and mv-ddr tarballs do not have to work with
latest TF-A code base. Marvell do not provide these old tarballs on
Ext

fix(plat/marvell/a3k): Fix check for external dependences

Old Marvell a3700_utils and mv-ddr tarballs do not have to work with
latest TF-A code base. Marvell do not provide these old tarballs on
Extranet anymore. Public version on github repository contains all
patches and is working fine, so for public TF-A builds use only public
external dependencies from git.

Signed-off-by: Pali Rohár <pali@kernel.org>
Change-Id: Iee5ac6daa9a1826a5b80a8d54968bdbb8fe72f61

show more ...

fix(plat/marvell/a8k): Add missing build dependency for BLE target

BLE source files depend on external Marvell mv-ddr-marvell tree
(specified in $(MV_DDR_PATH) variable) and its header files. Add
de

fix(plat/marvell/a8k): Add missing build dependency for BLE target

BLE source files depend on external Marvell mv-ddr-marvell tree
(specified in $(MV_DDR_PATH) variable) and its header files. Add
dependency on $(MV_DDR_LIB) target which checks that variable
$(MV_DDR_PATH) is correctly set and ensures that make completes
compilation of mv-ddr-marvell tree.

Signed-off-by: Pali Rohár <pali@kernel.org>
Change-Id: I73968b24c45d9af1e3500b8db7a24bb4eb2bfa47

show more ...

fix(plat/marvell/a8k): Correctly set include directories for individual targets

Do not set all include directories, including those for external targets
in one PLAT_INCLUDES variable.

Instead split

fix(plat/marvell/a8k): Correctly set include directories for individual targets

Do not set all include directories, including those for external targets
in one PLAT_INCLUDES variable.

Instead split them into variables:
* $(PLAT_INCLUDES) for all TF-A BL images
* BLE target specific $(PLAT_INCLUDES) only for Marvell BLE image
* $(MV_DDR_INCLUDES) for targets in external Marvell mv-ddr-marvell tree

Include directory $(CURDIR)/drivers/marvell is required by TF-A BL
images, so move it from ble.mk to a8k_common.mk.

Include directory $(MV_DDR_PATH) is needed only by Marvell BLE image, so
move it into BLE target specific $(PLAT_INCLUDES) variable.

And remaining include directories specified in ble.mk are needed only
for building external dependences from Marvell mv-ddr tree, so move them
into $(MV_DDR_INCLUDES) variable and correctly use it in $(MV_DDR_LIB)
target.

Signed-off-by: Pali Rohár <pali@kernel.org>
Change-Id: I331f7de675dca2bc70733d56b768f00d56ae4a67

show more ...

fix(plat/marvell/a8k): Require that MV_DDR_PATH is correctly set

Target mrvl_flash depends on external mv_ddr source code which is not
part of TF-A project. Do not expect that it is pre-downloaded a

fix(plat/marvell/a8k): Require that MV_DDR_PATH is correctly set

Target mrvl_flash depends on external mv_ddr source code which is not
part of TF-A project. Do not expect that it is pre-downloaded at some
specific location and require user to specify correct path to mv_ddr
source code via MV_DDR_PATH build option.

TF-A code for Armada 37x0 platform also depends on mv_ddr source code
and already requires passing correct MV_DDR_PATH build option.

So for A8K implement same checks for validity of MV_DDR_PATH option as
are already used by TF-A code for Armada 37x0 platform.

Signed-off-by: Pali Rohár <pali@kernel.org>
Change-Id: I792f2bfeab0cec89b1b64e88d7b2c456e22de43a

show more ...

fix(plat/marvell/a3720/uart): fix UART parent clock rate determination

The UART code for the A3K platform assumes that UART parent clock rate
is always 25 MHz. This is incorrect, because the xtal cl

fix(plat/marvell/a3720/uart): fix UART parent clock rate determination

The UART code for the A3K platform assumes that UART parent clock rate
is always 25 MHz. This is incorrect, because the xtal clock can also run
at 40 MHz (this is board specific).

The frequency of the xtal clock is determined by a value on a strapping
pin during SOC reset. The code to determine this frequency is already in
A3K's comphy driver.

Move the get_ref_clk() function from the comphy driver to a separate
file and use it for UART parent clock rate determination.

Signed-off-by: Pali Rohár <pali@kernel.org>
Change-Id: I8bb18a2d020ef18fe65aa06ffa4ab205c71be92e

show more ...

refactor(plat/marvell/uart): de-duplicate PLAT_MARVELL_UART macros

Macros PLAT_MARVELL_BOOT_UART* and PLAT_MARVELL_CRASH_UART* are defined
to same values. De-duplicate them into PLAT_MARVELL_UART* m

refactor(plat/marvell/uart): de-duplicate PLAT_MARVELL_UART macros

Macros PLAT_MARVELL_BOOT_UART* and PLAT_MARVELL_CRASH_UART* are defined
to same values. De-duplicate them into PLAT_MARVELL_UART* macros.

Signed-off-by: Pali Rohár <pali@kernel.org>
Change-Id: Iae5daf7cad6a971e6f3dbe561df3d0174106ca7f

show more ...

refactor(plat/marvell/uart): remove unused macros

Macros PLAT_MARVELL_BL31_RUN_UART* are not used since commit
d7c4420cb8a7 ("plat/marvell: Migrate to multi-console API").

Remove them.

Signed-off-

refactor(plat/marvell/uart): remove unused macros

Macros PLAT_MARVELL_BL31_RUN_UART* are not used since commit
d7c4420cb8a7 ("plat/marvell: Migrate to multi-console API").

Remove them.

Signed-off-by: Pali Rohár <pali@kernel.org>
Change-Id: I5ec959ef4de87dcfb332c017ad2599bf8af6ffc3

show more ...

fix(plat/marvell/a3720/uart): fix UART clock rate value and divisor calculation

UART parent clock is by default the platform's xtal clock, which is
25 MHz.

The value defined in the driver, though,

fix(plat/marvell/a3720/uart): fix UART clock rate value and divisor calculation

UART parent clock is by default the platform's xtal clock, which is
25 MHz.

The value defined in the driver, though, is 25.8048 MHz. This is a hack
for the suboptimal divisor calculation
Divisor = UART clock / (16 * baudrate)
which does not use rounding division, resulting in a suboptimal value
for divisor if the correct parent clock rate was used.

Change the code for divisor calculation to
Divisor = Round(UART clock / (16 * baudrate))
and change the parent clock rate value to 25 MHz.

The final UART divisor for default baudrate 115200 is not affected by
this change.

(Note that the parent clock rate should not be defined via a macro,
since the xtal clock can also be 40 MHz. This is outside of the scope of
this fix, though.)

Signed-off-by: Pali Rohár <pali@kernel.org>
Change-Id: Iaa401173df87aec94f2dd1b38a90fb6ed0bf0ec6

show more ...