fix(intel): introduce a generic response error code

This patch will introduce a generic error code (0x3ff)
to be used in case where Secure Device Manager (SDM)
mailbox request is not failing (return

fix(intel): introduce a generic response error code

This patch will introduce a generic error code (0x3ff)
to be used in case where Secure Device Manager (SDM)
mailbox request is not failing (returns OK with no error
code) but BL31 instead wants to return error/reject
to the calling software. This value aligns with generic
error code implemented in SDM for consistency.

Signed-off-by: Abdul Halim, Muhammad Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Change-Id: I9894c7df8897fff9aa80970940a6f3f6bfa30bb7

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fix(intel): allow non-secure access to FPGA Crypto Services (FCS)

Allows non-secure software to access FPGA Crypto Services (FCS)
through secure monitor calls (SMC).

Signed-off-by: Abdul Halim, Muh

fix(intel): allow non-secure access to FPGA Crypto Services (FCS)

Allows non-secure software to access FPGA Crypto Services (FCS)
through secure monitor calls (SMC).

Signed-off-by: Abdul Halim, Muhammad Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Change-Id: I805b3f650abf5e118e2c55e469866d5d0ca68048

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feat(intel): single certificate feature enablement

Extend the functionality of FPGA Crypto Service
(FCS) to support FPGA single certificate feature
so that the counter value can be updated with
only

feat(intel): single certificate feature enablement

Extend the functionality of FPGA Crypto Service
(FCS) to support FPGA single certificate feature
so that the counter value can be updated with
only one preauthorized certificate

Signed-off-by: Boon Khai Ng <boon.khai.ng@intel.com>
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Change-Id: Ibde87e4ee46367cf7f27f7bb0172838ab8766340

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feat(intel): initial commit for attestation service

This is to extend the functionality of FPGA Crypto Service (FCS)
to support FPGA Attestation feature in Stratix 10 device.

Signed-off-by: Boon Kh

feat(intel): initial commit for attestation service

This is to extend the functionality of FPGA Crypto Service (FCS)
to support FPGA Attestation feature in Stratix 10 device.

Signed-off-by: Boon Khai Ng <boon.khai.ng@intel.com>
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Change-Id: Ib15783383dc9a06a2f0dc6dc1786f44b89f32cb1

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fix(intel): update encryption and decryption command logic

This change is to re-align HPS cryption logic with
underlying Secure Device Manager's (SDM) mailbox API.

Signed-off-by: Abdul Halim, Muham

fix(intel): update encryption and decryption command logic

This change is to re-align HPS cryption logic with
underlying Secure Device Manager's (SDM) mailbox API.

Signed-off-by: Abdul Halim, Muhammad Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Change-Id: I8fc90982d3cddceaf401c1a112ff8e20861bf4c5

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Merge "feat(intel): add support for F2S and S2F bridge SMC with mask to enable, disable and reset bridge" into integration

feat(intel): implement timer init divider via cpu frequency. (#1)

Get cpu frequency and update the timer init div with it.
The timer is vary based on the cpu frequency instead of hardcoded.
The impl

feat(intel): implement timer init divider via cpu frequency. (#1)

Get cpu frequency and update the timer init div with it.
The timer is vary based on the cpu frequency instead of hardcoded.
The implementation shall apply to only Agilex and S10

Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Change-Id: I61684d9762ad34e5a60b8b176b60c8848db4b422

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feat(intel): add support for F2S and S2F bridge SMC with mask to enable, disable and reset bridge

This adds F2S and S2F bridge enable, disable and reset
sequence to enable, disable and reset properl

feat(intel): add support for F2S and S2F bridge SMC with mask to enable, disable and reset bridge

This adds F2S and S2F bridge enable, disable and reset
sequence to enable, disable and reset properly the bridges
in SMC call or during reset.

The reset is also maskable as the SMC from uboot can
pass in the bridge mask when requesting for bridge
enable or disable.

Signed-off-by: Loh Tien Hock <tien.hock.loh@intel.com>
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Change-Id: Ie144518c591664ef880016c9b3706968411bbf21

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fix(intel): reject non 4-byte align request size for FPGA Crypto Service (FCS)

This patch is to add size checking to make sure that
each certificate and encryption/decryption request
are 4-byte alig

fix(intel): reject non 4-byte align request size for FPGA Crypto Service (FCS)

This patch is to add size checking to make sure that
each certificate and encryption/decryption request
are 4-byte align as this driver is expecting. Unaligned
size may indicate invalid/corrupted request hence will
be rejected.

Signed-off-by: Abdul Halim, Muhammad Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Change-Id: Ib6f97849ec470e45679c5adc4fbfa3afd10eda90

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feat(intel): add SMC support for HWMON voltage and temp sensor

Add support to read temperature and voltage using SMC command

Signed-off-by: Kris Chaplin <kris.chaplin@linux.intel.com>
Signed-off-by

feat(intel): add SMC support for HWMON voltage and temp sensor

Add support to read temperature and voltage using SMC command

Signed-off-by: Kris Chaplin <kris.chaplin@linux.intel.com>
Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Change-Id: I806611610043906b720b5096728a5deb5d652b1d

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feat(intel): add SMC support for Get USERCODE

This patch adds SMC support for enquiring FPGA's User Code.

Signed-off-by: Abdul Halim, Muhammad Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.

feat(intel): add SMC support for Get USERCODE

This patch adds SMC support for enquiring FPGA's User Code.

Signed-off-by: Abdul Halim, Muhammad Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Change-Id: I82c1fa9390b6f7509b2284d51e199fb8b6a9b1ad

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fix(intel): extend SDM command to return the SDM firmware version

Updates intel_smc_fw_version function to read SDM
firmware version in major/minor ACDS release number.
Update CONFIG_STATUS Response

fix(intel): extend SDM command to return the SDM firmware version

Updates intel_smc_fw_version function to read SDM
firmware version in major/minor ACDS release number.
Update CONFIG_STATUS Response Data [1] bit0-23.

Return INTEL_SIP_SMC_STATUS_ERROR if unexpected
firmware version is being retrieved.

Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Change-Id: I018ccbb961786a75dc6eb873b0f232e71341e1d2

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feat(intel): add SMC for enquiring firmware version

This command allows non-secure world software to enquire the
version of currently running Secure Device Manager (SDM) firmware.

This will be usef

feat(intel): add SMC for enquiring firmware version

This command allows non-secure world software to enquire the
version of currently running Secure Device Manager (SDM) firmware.

This will be useful in maintaining backward-compatibility as well
as ensuring software cross-compabitility.

Signed-off-by: Abdul Halim, Muhammad Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Change-Id: Ibc23734d1135db74423da5e29655f9d32472a3b0

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fix(intel): configuration status based on start request

Configuration status command now returns the result based on the last
config start command made to the runtime software. The status type can
b

fix(intel): configuration status based on start request

Configuration status command now returns the result based on the last
config start command made to the runtime software. The status type can
be either:
- NO_REQUEST (default)
- RECONFIGURATION
- BITSTREAM_AUTH

Signed-off-by: Abdul Halim, Muhammad Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Change-Id: I97406abe09b49b9d9a5b43e62fe09eb23c729bff
Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>

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fix(intel): bit-wise configuration flag handling

Change configuration type handling to bit-wise flag. This is to align
with Linux's FPGA Manager definitions and promotes better compatibility.

Signe

fix(intel): bit-wise configuration flag handling

Change configuration type handling to bit-wise flag. This is to align
with Linux's FPGA Manager definitions and promotes better compatibility.

Signed-off-by: Abdul Halim, Muhammad Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Change-Id: I5aaf91d3fec538fe3f4fe8395d9adb47ec969434

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fix(intel): get config status OK status

Config status have different OK requirement between MBOX_CONFIG_STATUS
and MBOX_RECONFIG_STATUS request. This patch adds the checking to
differentiate between

fix(intel): get config status OK status

Config status have different OK requirement between MBOX_CONFIG_STATUS
and MBOX_RECONFIG_STATUS request. This patch adds the checking to
differentiate between both command.

Signed-off-by: Abdul Halim, Muhammad Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Change-Id: I45a4c3de460b031757dbcbd0b3a8055cb0a55aff
Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>

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fix(intel): use macro as return value

SMC function should strictly return INTEL_SIP_SMC_STATUS macro. Directly
returning value of variable status might cause confusion in calling
software.

Signed-o

fix(intel): use macro as return value

SMC function should strictly return INTEL_SIP_SMC_STATUS macro. Directly
returning value of variable status might cause confusion in calling
software.

Signed-off-by: Abdul Halim, Muhammad Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Change-Id: Iea17f4feaa5c917e8b995471f3019dba6ea8dcd3
Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>

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fix(intel): fix fpga config write return mechanism

This revert commit 279c8015fefcb544eb311b9052f417fc02ab84aa.
The previous change breaks this feature compatibility with Linux driver.
Hence, the fi

fix(intel): fix fpga config write return mechanism

This revert commit 279c8015fefcb544eb311b9052f417fc02ab84aa.
The previous change breaks this feature compatibility with Linux driver.
Hence, the fix for the earlier issue is going to be fixed in uboot instead.

Signed-off-by: Abdul Halim, Muhammad Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Change-Id: I93220243bad65ed53322050d990544c7df4ce66b

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feat(intel): add SiP service for DCMF status

This patch adds 2 additional RSU SiP services for Intel SoCFPGA
platforms:
- INTEL_SIP_SMC_RSU_COPY_DCMF_STATUS stores current DCMF status in
BL31
- IN

feat(intel): add SiP service for DCMF status

This patch adds 2 additional RSU SiP services for Intel SoCFPGA
platforms:
- INTEL_SIP_SMC_RSU_COPY_DCMF_STATUS stores current DCMF status in
BL31
- INTEL_SIP_SMC_RSU_DCMF_STATUS is calling function for non-secure
software to retrieve stored DCMF status

Signed-off-by: Abdul Halim, Muhammad Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Change-Id: Ic7a3e6988c71ad4bf66c58a1d669956524dfdf11

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feat(intel): add RSU 'Max Retry' SiP SMC services

Add SiP SMC services to store/retrieve 'Max Retry' counter
for Remote System Update (RSU).

Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
S

feat(intel): add RSU 'Max Retry' SiP SMC services

Add SiP SMC services to store/retrieve 'Max Retry' counter
for Remote System Update (RSU).

Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Change-Id: I17c1f0107ead64e6160954d26407f399003bcbd9

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feat(intel): enable SMC SoC FPGA bridges enable/disable

Enable SoC FPGA bridges enable/disable from non-secure world
through secure monitor calls

Signed-off-by: Abdul Halim, Muhammad Hadi Asyrafi <

feat(intel): enable SMC SoC FPGA bridges enable/disable

Enable SoC FPGA bridges enable/disable from non-secure world
through secure monitor calls

Signed-off-by: Abdul Halim, Muhammad Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Change-Id: I4474abab9731923a61ff0e7eb2c2fa32048001cb
Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>

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feat(intel): add SMC/PSCI services for DCMF version support

Support get/store RSU DCMF version:
INTEL_SIP_SMC_RSU_DCMF_VERSION - Get current DCMF version
INTEL_SIP_SMC_RSU_COPY_DCMF_VERSION - Store

feat(intel): add SMC/PSCI services for DCMF version support

Support get/store RSU DCMF version:
INTEL_SIP_SMC_RSU_DCMF_VERSION - Get current DCMF version
INTEL_SIP_SMC_RSU_COPY_DCMF_VERSION - Store current DCMF version

Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Change-Id: I85ffbc0efc859736899d4812f040fd7be17c8d8d

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feat(intel): allow to access all register addresses if DEBUG=1

Allow to access all register addresses from SMC call if compile the code
with DEBUG=1 for debugging purpose.

Signed-off-by: Siew Chin

feat(intel): allow to access all register addresses if DEBUG=1

Allow to access all register addresses from SMC call if compile the code
with DEBUG=1 for debugging purpose.

Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Change-Id: Idd31827fb71307efbdbcceeaa05f6cb072842e10

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fix(intel): modify how configuration type is handled

This patch creates macros to handle different configuration
types. These changes will help in adding new configuration
types in the future.

Sign

fix(intel): modify how configuration type is handled

This patch creates macros to handle different configuration
types. These changes will help in adding new configuration
types in the future.

Signed-off-by: Abdul Halim, Muhammad Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Change-Id: I5826a8e5942228a9ed376212f0df43b1605c0199

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feat(intel): support SiP SVC version

This command supports to return SiP SVC major and minor version.

Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Signed-off-by: Jit Loon Lim <jit.loon.li

feat(intel): support SiP SVC version

This command supports to return SiP SVC major and minor version.

Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Change-Id: Ia8bf678b8de0278aeaae748f24bdd05f8c9f9b47

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