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39850944 |
| 16-Oct-2024 |
Mark Dykes <mark.dykes@arm.com> |
Merge "fix(intel): update Agilex5 BL2 init flow and other misc changes" into integration
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| #
b3d28508 |
| 26-Aug-2024 |
Sieu Mun Tang <sieu.mun.tang@intel.com> |
fix(intel): update Agilex5 BL2 init flow and other misc changes
BL2: Update BL2 init flow, Timer base address, avoid cache
flush of BL2 image descriptors
BL31: Remove re-init of CCU and other misc u
fix(intel): update Agilex5 BL2 init flow and other misc changes
BL2: Update BL2 init flow, Timer base address, avoid cache
flush of BL2 image descriptors
BL31: Remove re-init of CCU and other misc updates
Change-Id: I5f04901cc455c306209c83aad2377bbf7d8a1789
Signed-off-by: Girisha Dengi <girisha.dengi@intel.com>
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
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| #
e9ed7fa7 |
| 14-Jan-2020 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes from topic "sip-svc" into integration
* changes:
intel: Implement platform specific system reset 2
intel: Enable SiP SMC secure register access
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| #
32cf34ac |
| 22-Oct-2019 |
Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com> |
intel: Implement platform specific system reset 2
Add support for platform specific warm-reset through psci system reset 2.
- system_reset2 implementation that calls for l2 cache reset
- Check for
intel: Implement platform specific system reset 2
Add support for platform specific warm-reset through psci system reset 2.
- system_reset2 implementation that calls for l2 cache reset
- Check for magic number and request for warm reset in bl2
- Create a shared reset manager header file for Agilex and Stratix 10
- Clean up parameter info in plat_get_next_bl_params
Signed-off-by: Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Change-Id: I3fdd9a2711c80d9bd3dc05b81527781d840bd726
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| #
5119fa7b |
| 07-Aug-2019 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Merge changes from topic "intel-plat-refactor" into integration
* changes:
intel: Platform common code refactor
intel: Platform common code refactor
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| #
d8820789 |
| 01-Aug-2019 |
Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com> |
intel: Platform common code refactor
Pull out common code from agilex and stratix10
Signed-off-by: Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Change-Id: Iddc0a9e6eccb30823d7b15615d5
intel: Platform common code refactor
Pull out common code from agilex and stratix10
Signed-off-by: Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Change-Id: Iddc0a9e6eccb30823d7b15615d5ce9c6bedb2abc
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