Merge pull request #1620 from deepan02/deepak-arm/move-reset-to-bl31

plat/arm: allow RESET_TO_BL31 for CSS-based platforms

Merge pull request #1607 from girishpathak/gp/346_sgm775_earlylog_fix_v2

plat/arm/css/sgm: Reorder early platform init

Replace S-EL3 references by EL3

The "Secure" prefix (S-ELx) is valid only for S-EL0 and S-EL1 but is
meaningless for EL3, since EL3 is always secure. Hence, the "S" prefix
has been removed from wher

Replace S-EL3 references by EL3

The "Secure" prefix (S-ELx) is valid only for S-EL0 and S-EL1 but is
meaningless for EL3, since EL3 is always secure. Hence, the "S" prefix
has been removed from wherever it was used as "S-EL3".

Change-Id: Icdeac9506d763f9f83d7297c7113aec7b85e9dbe
Signed-off-by: John Tsichritzis <john.tsichritzis@arm.com>

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plat/arm/css/sgm: Reorder early platform init

In the function, bl1_early_platform_setup in the file
plat/arm/css/sgm/sgm_bl1_setup.c:

plat_config_init();

arm_bl1_early_platform_setup();

The d

plat/arm/css/sgm: Reorder early platform init

In the function, bl1_early_platform_setup in the file
plat/arm/css/sgm/sgm_bl1_setup.c:

plat_config_init();

arm_bl1_early_platform_setup();

The debug messages logged by plat_config_init() are lost because
the console is initialized in the function
arm_bl1_early_platform_setup()

To see the logs of plat_config_init, this fix re-orders above calls
so that the console is initialized before call to plat_config_init.

Change-Id: I2e98f1f67c591cca24e28905acd0838ea3697a7c
Signed-off-by: Girish Pathak <girish.pathak@arm.com>

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plat/arm: Move norflash driver to drivers/ folder

This way it can be reused by other platforms if needed.

Note that this driver is designed to work with the Versatile Express NOR
flash of Juno and

plat/arm: Move norflash driver to drivers/ folder

This way it can be reused by other platforms if needed.

Note that this driver is designed to work with the Versatile Express NOR
flash of Juno and FVP. In said platforms, the memory is organized as an
interleaved memory of two chips with a 16 bit word.

Any platform that wishes to reuse it with a different configuration will
need to modify the driver so that it is more generic.

Change-Id: Ic721758425864e0cf42b7b9b04bf0d9513b6022e
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>

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plat/arm: allow RESET_TO_BL31 for CSS-based platforms

This lets any future CSS platforms to use RESET_TO_BL31 flag.

Change-Id: I32a90fce43cb0c6f4d33589653a0fd6a7ecc9577
Signed-off-by: Deepak Pandey

plat/arm: allow RESET_TO_BL31 for CSS-based platforms

This lets any future CSS platforms to use RESET_TO_BL31 flag.

Change-Id: I32a90fce43cb0c6f4d33589653a0fd6a7ecc9577
Signed-off-by: Deepak Pandey <Deepak.Pandey@arm.com>

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Fix misra warnings in SMC and power mgmt code

Change-Id: Ia00eba2b18804e6498d935d33ec104953e0e5e03
Signed-off-by: Sathees Balya <sathees.balya@arm.com>

Merge pull request #1583 from danielboulby-arm/db/AArch32_Multi_Console

Enable Multi Console API in AArch32

FVP: Reclaim init code for the stack

Map the initialization code for BL31 to overlap with the memory
required for the secondary cores stack. Once BL31 has been
initialized the memory can be remapped

FVP: Reclaim init code for the stack

Map the initialization code for BL31 to overlap with the memory
required for the secondary cores stack. Once BL31 has been
initialized the memory can be remapped to RW data so that it can
be used for secondary cores stacks. By moving code from .text to
.text.init the size of the BL31 image is decreased by a page.

Split arm_common.ld.S into two linker scripts, one for tzc_dram
(arm_tzc_dram.ld.S) and one for reclaiming initialization code
(arm_reclaim_init.ld.S) so that platforms can chose which memory
regions they wish to include.

Change-Id: I648e88f3eda1aa71765744cf34343ecda9320b32
Signed-off-by: Daniel Boulby <daniel.boulby@arm.com>

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Mark GICV3, CCI and CCN boot time code as init

Mark the GICv3, CCI and CCN code only used in Bl31 initialization
with __init to be reclaimed once no longer needed.

Change-Id: I3d77f36758450d9d1d87e

Mark GICV3, CCI and CCN boot time code as init

Mark the GICv3, CCI and CCN code only used in Bl31 initialization
with __init to be reclaimed once no longer needed.

Change-Id: I3d77f36758450d9d1d87ecc60bc1c63fe4082667
Signed-off-by: Daniel Boulby <daniel.boulby@arm.com>

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plat/arm: Mark arm platform initialization functions

Mark the initialization functions found in the BL31 boot sequence
as __init so they can be reclaimed when no longer needed.

Change-Id: I687a8934

plat/arm: Mark arm platform initialization functions

Mark the initialization functions found in the BL31 boot sequence
as __init so they can be reclaimed when no longer needed.

Change-Id: I687a89346419c7710ef5097feaa325d83c527697
Signed-off-by: Daniel Boulby <daniel.boulby@arm.com>

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Remove unused ROMLIB memory region macro

Remove ARM_MAP_BL_ROMLIB memory region macro as it is now split
into two regions for code and data

Change-Id: Ic17b5b584933c196db29fe83051d7e0a8e92911c
Sign

Remove unused ROMLIB memory region macro

Remove ARM_MAP_BL_ROMLIB memory region macro as it is now split
into two regions for code and data

Change-Id: Ic17b5b584933c196db29fe83051d7e0a8e92911c
Signed-off-by: Daniel Boulby <daniel.boulby@arm.com>

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Merge pull request #1591 from jts-arm/cov1

Fix static analysis defects

plat/arm: Remove option ARM_BOARD_OPTIMISE_MEM

This option makes it hard to optimize the memory definitions of all Arm
platforms because any change in the common defines must work in all of
them. Th

plat/arm: Remove option ARM_BOARD_OPTIMISE_MEM

This option makes it hard to optimize the memory definitions of all Arm
platforms because any change in the common defines must work in all of
them. The best thing to do is to remove it and move the definition to
each platform's header.

FVP, SGI and SGM were using the definitions in board_arm_def.h. The
definitions have been copied to each platform's platform_def.h. Juno
was already using the ones in platform_def.h, so there have been no
changes.

Change-Id: I9aecd11bbc72a3d0d7aad1ef9934d8df21dcfaf2
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>

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sgi: sgm: Migrate to new interfaces

- Remove references to removed build options.
- Remove support for LOAD_IMAGE_V2=0.

Change-Id: I296385ef2ebf829446c76a54400d73f963ed265f
Tested-by: Nariman Poush

sgi: sgm: Migrate to new interfaces

- Remove references to removed build options.
- Remove support for LOAD_IMAGE_V2=0.

Change-Id: I296385ef2ebf829446c76a54400d73f963ed265f
Tested-by: Nariman Poushin <nariman.poushin@linaro.org>
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>

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plat/arm: Migrate to new interfaces

- Remove references to removed build options.
- Remove support for legacy GIC driver.
- Remove support for LOAD_IMAGE_V2=0.

Change-Id: I72f8c05620bdf4a682765e6e5

plat/arm: Migrate to new interfaces

- Remove references to removed build options.
- Remove support for legacy GIC driver.
- Remove support for LOAD_IMAGE_V2=0.

Change-Id: I72f8c05620bdf4a682765e6e53e2c04ca749a3d5
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>

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Revert "sgm: increase SCP_BL2 maximum size"

Fix static analysis defects

Fixed a Coverity defect by adding a runtime check to avoid potential
NULL pointer dereference.

Change-Id: I9a0aa0efd27334131ac835b43348658b436c657d
Signed-off-by: John T

Fix static analysis defects

Fixed a Coverity defect by adding a runtime check to avoid potential
NULL pointer dereference.

Change-Id: I9a0aa0efd27334131ac835b43348658b436c657d
Signed-off-by: John Tsichritzis <john.tsichritzis@arm.com>

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sgm: increase SCP_BL2 maximum size

For sgm775 the SCP_BL2 build in debug mode is around 94KiB which
is higher than the maximum size for SCP_BL2.

This patch increase the maximum allowed size for SCP

sgm: increase SCP_BL2 maximum size

For sgm775 the SCP_BL2 build in debug mode is around 94KiB which
is higher than the maximum size for SCP_BL2.

This patch increase the maximum allowed size for SCP_BL2 to
96KiB.

Change-Id: Ibca0daadba41429301c651ae21cbba87e45ccddf
Signed-off-by: Elieva Pignat <Elieva.Pignat@arm.com>

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plat/arm: Enable MULTI_CONSOLE_API in AArch32

Set MULTI_CONSOLE_API=1 for both AArch64 and AArch32 by default.
MULTI_CONSOLE_API=0 is still supported, but it has to be set from the
command line.

Ch

plat/arm: Enable MULTI_CONSOLE_API in AArch32

Set MULTI_CONSOLE_API=1 for both AArch64 and AArch32 by default.
MULTI_CONSOLE_API=0 is still supported, but it has to be set from the
command line.

Change-Id: I4eeaa8e243a3fe93ed8a716e502666a26ad28f35
Signed-off-by: Daniel Boulby <daniel.boulby@arm.com>

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pl011: Add support in AArch32 for MULTI_CONSOLE_API

Allow AArch32 to use the multi console driver by adding the
required functions

Change-Id: I9e69f18965f320074cf75442d6b0de891aef7936
Signed-off-by

pl011: Add support in AArch32 for MULTI_CONSOLE_API

Allow AArch32 to use the multi console driver by adding the
required functions

Change-Id: I9e69f18965f320074cf75442d6b0de891aef7936
Signed-off-by: Daniel Boulby <daniel.boulby@arm.com>

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ARM platforms: Reintroduce coherent memory for BL1 and BL2

The patch d323af9 removed the support for coherent memory in BL1 and
BL2 for ARM platforms. But the CryptoCell SBROM integration depends
o

ARM platforms: Reintroduce coherent memory for BL1 and BL2

The patch d323af9 removed the support for coherent memory in BL1 and
BL2 for ARM platforms. But the CryptoCell SBROM integration depends
on use of coherent buffers for passing data from the AP CPU to the
CryptoCell. Hence this patch reintroduces support for coherent
memory in BL1 and BL2 if ARM_CRYPTOCELL_INTEG=1.

Change-Id: I011482dda7f7a3ec9e3e79bfb3f4fa03796f7e02
Signed-Off-by: Soby Mathew <soby.mathew@arm.com>

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Merge pull request #1569 from soby-mathew/sm/cov_fix_scmi

CSS: Fix overrun if system power level is not available

CSS: Fix overrun if system power level is not available

This patch fixes an array overrun in CSS scmi driver if the
system power domain level is less than 2. This was reported from
https://scan.cove

CSS: Fix overrun if system power level is not available

This patch fixes an array overrun in CSS scmi driver if the
system power domain level is less than 2. This was reported from
https://scan.coverity.com/projects/arm-software-arm-trusted-firmware

CID 308492

Change-Id: I3a59c700490816718d20c71141281f19b2b7e7f7
Signed-off-by: Soby Mathew <soby.mathew@arm.com>

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Merge pull request #1566 from EvanLloyd/non_secure_uart

ARM Platforms:Enable non-secure access to UART1