| 036e9c17 | 25-Jan-2021 |
Lauren Wehrmeister <lauren.wehrmeister@arm.com> |
Merge changes I635cf82e,Iee3b4e0d into integration
* changes: Makefile: Fix ${FIP_NAME} to be rebuilt only when needed Makefile: Do not mark file targets as .PHONY target |
| 009553fc | 25-Jan-2021 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "plat/arm: css: Turn ON/OFF redistributor in sync with GIC CPU interface ON/OFF" into integration |
| 0301d09c | 11-Jan-2021 |
Ming Huang <huangming@linux.alibaba.com> |
plat/arm/css/sgi: Fix assert expression issue
Violation of MISRA-C Rule 14.4
Signed-off-by: Ming Huang <huangming@linux.alibaba.com> Change-Id: I44ef50dadb54fb056a91f3de962b6e63ba6d7ac4 |
| 9feb1e2f | 09-Nov-2020 |
Ming Huang <huangming@linux.alibaba.com> |
plat/arm/css/sgi: Fix bl32 receive event - 0xC4000061 issue
The issue is that, when interrupt is triggered and RAS handler is entered, after interrupt handler finishes, TF-A will re-enter bl32 and t
plat/arm/css/sgi: Fix bl32 receive event - 0xC4000061 issue
The issue is that, when interrupt is triggered and RAS handler is entered, after interrupt handler finishes, TF-A will re-enter bl32 and then crash. sdei_dispatch_event() may return failing result in some cases, for example kernel may not have registered a handler or RAS event may happen early during boot. We restore the NS context when sdei_dispatch_event() returns failing result.
error log : Received delegated event X0 : 0xC4000061 X1 : 0x0 X2 : 0x0 X3 : 0x0 Received event - 0xC4000061 on cpu 0 UnRecognized Event - 0xC4000061 Failed delegated event 0xC4000061, Status Invalid Parameter Unhandled Exception in EL3. x30 = 0x000000000401f700 x0 = 0xfffffffffffffffe x1 = 0xfffffffffffffffe x2 = 0x00000000600003c0
Signed-off-by: Ming Huang <huangming@linux.alibaba.com> Change-Id: I9802e9a32eee0ac3b5a8bcc0362d0b0e3b71dc9f
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| 4d8c1819 | 05-Jan-2021 |
Jagadeesh Ujja <jagadeesh.ujja@arm.com> |
plat/arm: css: Turn ON/OFF redistributor in sync with GIC CPU interface ON/OFF
Turn ON/OFF GIC redistributor in sync with GIC CPU interface ON/OFF.
Issue : The Linux prompt hangs when all the cores
plat/arm: css: Turn ON/OFF redistributor in sync with GIC CPU interface ON/OFF
Turn ON/OFF GIC redistributor in sync with GIC CPU interface ON/OFF.
Issue : The Linux prompt hangs when all the cores in a cluster are turned OFF and we try to turn ON a core in that cluster. Previously when TF-A turns ON a core, TF-A first turns ON the redistributor followed by the core. This did not match the flow when turning OFF a core, as TF-A did not turn OFF redistributor when the corresponding core[s] are disabled. This hang is resolved by disabling redistributor as cores are disabled, keeping them in sync.
Signed-off-by: Jagadeesh Ujja <jagadeesh.ujja@arm.com> Change-Id: Ifd04fdcfd47b45e00f874f15b098471883d023f0
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| 90aecf1e | 15-Dec-2020 |
Aditya Angadi <aditya.angadi@arm.com> |
plat/arm: rename rddanielxlr to rdv1mc
Reference Design platform RD-Daniel-ConfigXLR has been renamed to RD-V1-MC. Correspondingly, remove all uses of 'rddanielxlr' and replace it with 'rdv1mc' wher
plat/arm: rename rddanielxlr to rdv1mc
Reference Design platform RD-Daniel-ConfigXLR has been renamed to RD-V1-MC. Correspondingly, remove all uses of 'rddanielxlr' and replace it with 'rdv1mc' where appropriate.
Signed-off-by: Aditya Angadi <aditya.angadi@arm.com> Change-Id: I5d91c69738397b19ced43949b4080c74678e604c
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| edf771a1 | 15-Dec-2020 |
Aditya Angadi <aditya.angadi@arm.com> |
plat/arm: rename rddaniel to rdv1
Reference Design platform RD-Daniel has been renamed to RD-V1. Correspondingly, remove all uses of 'rddaniel' and replace it with 'rdv1' where appropriate.
Signed-
plat/arm: rename rddaniel to rdv1
Reference Design platform RD-Daniel has been renamed to RD-V1. Correspondingly, remove all uses of 'rddaniel' and replace it with 'rdv1' where appropriate.
Signed-off-by: Aditya Angadi <aditya.angadi@arm.com> Change-Id: I1702bab39c501f8c0a09df131cb2394d54c83bcf
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| a9812206 | 24-Nov-2020 |
Pali Rohár <pali@kernel.org> |
Makefile: Do not mark file targets as .PHONY target
Only non-file targets should be set a .PHONY. Otherwise if file target is set as .PHONY then targets which depends on those file .PHONY targets wo
Makefile: Do not mark file targets as .PHONY target
Only non-file targets should be set a .PHONY. Otherwise if file target is set as .PHONY then targets which depends on those file .PHONY targets would be always rebuilt even when their prerequisites are not changed.
File target which needs to be always rebuilt can be specified in Make system via having a prerequisite on some .PHONY target, instead of marking whole target as .PHONY. In Makefile projects it is common to create empty .PHONY target named FORCE for this purpose.
This patch changes all file targets which are set as .PHONY to depends on new .PHONY target FORCE, to ensure that these file targets are always rebuilt (as before). Basically they are those targets which calls external make subprocess.
After FORCE target is specified in main Makefile, remove it from other Makefile files to prevent duplicate definitions.
Signed-off-by: Pali Rohár <pali@kernel.org> Change-Id: Iee3b4e0de93879b95eb29a1745a041538412e69e
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| 669ee776 | 21-Dec-2020 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge changes from topic "tc0_optee_sp" into integration
* changes: fdts: tc0: Add reserved-memory node for OP-TEE plat: tc0: OP-TEE as S-EL1 SP with SPMC at S-EL2 docs: arm: Add OPTEE_SP_FW_C
Merge changes from topic "tc0_optee_sp" into integration
* changes: fdts: tc0: Add reserved-memory node for OP-TEE plat: tc0: OP-TEE as S-EL1 SP with SPMC at S-EL2 docs: arm: Add OPTEE_SP_FW_CONFIG plat: tc0: enable opteed support plat: arm: Increase SP max size
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| fb86e537 | 15-Dec-2020 |
Vijayenthiran Subramaniam <vijayenthiran.subramaniam@arm.com> |
plat/arm/rdn2: update gic redistributor base address
RD-N2 platform has been updated to use six GIC ITS blocks. This results in change in base address of the GIC Redistributor to accomodate two new
plat/arm/rdn2: update gic redistributor base address
RD-N2 platform has been updated to use six GIC ITS blocks. This results in change in base address of the GIC Redistributor to accomodate two new GIC ITS blocks. Update the base address of GICR to reflect the same.
Signed-off-by: Vijayenthiran Subramaniam <vijayenthiran.subramaniam@arm.com> Change-Id: I740a547328fb9a9f25d7a09c08e61bdbc8bf781c
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| 39460d05 | 17-Nov-2020 |
Arunachalam Ganapathy <arunachalam.ganapathy@arm.com> |
plat: tc0: OP-TEE as S-EL1 SP with SPMC at S-EL2
This patch adds support to enable OP-TEE as S-EL1 SP with SPMC at S-EL2 - create SPMC manifest file with OP-TEE as SP - add support for ARM
plat: tc0: OP-TEE as S-EL1 SP with SPMC at S-EL2
This patch adds support to enable OP-TEE as S-EL1 SP with SPMC at S-EL2 - create SPMC manifest file with OP-TEE as SP - add support for ARM_SPMC_MANIFEST_DTS build option - add optee entry with ffa as method in tc0.dts
Signed-off-by: Arunachalam Ganapathy <arunachalam.ganapathy@arm.com> Change-Id: Ia9b5c22c6f605d3886914bbac8ac45e8365671cb
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| 86069c0c | 17-Nov-2020 |
Arunachalam Ganapathy <arunachalam.ganapathy@arm.com> |
plat: tc0: enable opteed support
Enable SPD=opteed support for tc0 platform.
Signed-off-by: Arunachalam Ganapathy <arunachalam.ganapathy@arm.com> Change-Id: Ieb038d645c68fbe6b5a211c7279569e21b476fc3 |
| bd054fd6 | 11-Dec-2020 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge changes from topic "rdevans" into integration
* changes: doc: Update list of supported FVP platforms board/rdn2: add board support for rdn2 platform plat/arm/sgi: adapt to changes in mem
Merge changes from topic "rdevans" into integration
* changes: doc: Update list of supported FVP platforms board/rdn2: add board support for rdn2 platform plat/arm/sgi: adapt to changes in memory map plat/arm/sgi: add platform id value for rdn2 platform plat/arm/sgi: platform definitions for upcoming platforms plat/arm/sgi: refactor header file inclusions plat/arm/sgi: refactor the inclusion of memory mapping
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| 34e443e2 | 19-Nov-2020 |
Aditya Angadi <aditya.angadi@arm.com> |
board/rdn2: add board support for rdn2 platform
Add the initial board support for RD-N2 platform.
Change-Id: I8325885bf248dd92191d6fc92a2da91c23118f8c Signed-off-by: Aditya Angadi <aditya.angadi@ar
board/rdn2: add board support for rdn2 platform
Add the initial board support for RD-N2 platform.
Change-Id: I8325885bf248dd92191d6fc92a2da91c23118f8c Signed-off-by: Aditya Angadi <aditya.angadi@arm.com>
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| 6bb9f7a1 | 19-Nov-2020 |
Aditya Angadi <aditya.angadi@arm.com> |
plat/arm/sgi: adapt to changes in memory map
Upcoming RD platforms will have an updated memory map for the various pheripherals on the system. So, for the newer platforms, handle the memory mapping
plat/arm/sgi: adapt to changes in memory map
Upcoming RD platforms will have an updated memory map for the various pheripherals on the system. So, for the newer platforms, handle the memory mapping and other platform specific functionality separately from the existing platforms.
Change-Id: Iab1355a4c8ea1f6db4f79fcdd6eed907903b6a18 Signed-off-by: Aditya Angadi <aditya.angadi@arm.com>
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| 1b19ad68 | 19-Nov-2020 |
Aditya Angadi <aditya.angadi@arm.com> |
plat/arm/sgi: add platform id value for rdn2 platform
In preparation for adding the board support for RD-N2 platform, add macros to define the platform id and the corresponding SCMI platform info fo
plat/arm/sgi: add platform id value for rdn2 platform
In preparation for adding the board support for RD-N2 platform, add macros to define the platform id and the corresponding SCMI platform info for the RD-N2 platform.
Change-Id: Ie764ae618732b39e316f7ed080421f5d79adab21 Signed-off-by: Aditya Angadi <aditya.angadi@arm.com>
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| 284efb16 | 17-Nov-2020 |
Aditya Angadi <aditya.angadi@arm.com> |
plat/arm/sgi: platform definitions for upcoming platforms
Upcoming RD platforms have changes in the SOC address map from that of the existing platforms. As a prepartory step to add support for the u
plat/arm/sgi: platform definitions for upcoming platforms
Upcoming RD platforms have changes in the SOC address map from that of the existing platforms. As a prepartory step to add support for the upcoming platforms, create platform definitions for those platforms.
Change-Id: Ic5df9fed02c44e65ec260bbb5efc1b8dbd919a56 Signed-off-by: Aditya Angadi <aditya.angadi@arm.com>
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| 60f995fd | 18-Nov-2020 |
Aditya Angadi <aditya.angadi@arm.com> |
plat/arm/sgi: refactor header file inclusions
Upcoming RD platforms have deviations in various definitions of platform macros from that of the exisiting platforms. In preparation for adding support
plat/arm/sgi: refactor header file inclusions
Upcoming RD platforms have deviations in various definitions of platform macros from that of the exisiting platforms. In preparation for adding support for those upcoming RD platforms, refactor the header file inclusion to allow newer platforms to use a different set of platform macros.
Change-Id: Ic80283ddadafaa7f766f300652cb0d4e507efdb6 Signed-off-by: Aditya Angadi <aditya.angadi@arm.com>
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| db2aeddc | 18-Nov-2020 |
Aditya Angadi <aditya.angadi@arm.com> |
plat/arm/sgi: refactor the inclusion of memory mapping
Upcoming RD platforms have a different memory map from those of the existing platforms. So make the build of the existing mmap entries to be us
plat/arm/sgi: refactor the inclusion of memory mapping
Upcoming RD platforms have a different memory map from those of the existing platforms. So make the build of the existing mmap entries to be usable only for existing platforms and let upcoming platforms define a different set of mmap entries.
Change-Id: Id1ef0293efe8749c78a99237e78d32573c7233aa Signed-off-by: Aditya Angadi <aditya.angadi@arm.com>
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| 89832ac9 | 25-Nov-2020 |
Olivier Deprez <olivier.deprez@arm.com> |
spm: provide number of vCPUs and VM size for first SP
The primary VM concept is removed from the SPMC. Update the SPMC manifests with number of Execution Contexts and SP workspace size for the first
spm: provide number of vCPUs and VM size for first SP
The primary VM concept is removed from the SPMC. Update the SPMC manifests with number of Execution Contexts and SP workspace size for the first Secure Partition (as it is done for NWd secondary VMs and other SPs).
Signed-off-by: Olivier Deprez <olivier.deprez@arm.com> Change-Id: I3b9c52666f7dfe74ab1f7d2148ad0070ee44b54e
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| 5134fcbb | 24-Nov-2020 |
Olivier Deprez <olivier.deprez@arm.com> |
spm: remove chosen node from SPMC manifests
The chosen node is no longer required as the SPMC implements a specific boot flow which no longer requires this node.
Signed-off-by: Olivier Deprez <oliv
spm: remove chosen node from SPMC manifests
The chosen node is no longer required as the SPMC implements a specific boot flow which no longer requires this node.
Signed-off-by: Olivier Deprez <olivier.deprez@arm.com> Change-Id: Ib566b602a7f83003a1b2d0ba5f6ebf4d8b7a9156
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| 76d22f06 | 03-Dec-2020 |
Olivier Deprez <olivier.deprez@arm.com> |
spm: move OP-TEE SP manifest DTS to FVP platform
Signed-off-by: Olivier Deprez <olivier.deprez@arm.com> Change-Id: I0981c43e2ef8172138f65d95eac7b20f8969394e |
| b635d11b | 10-Nov-2020 |
Olivier Deprez <olivier.deprez@arm.com> |
spm: remove device-memory node from SPMC manifests
The PVM concept is removed from the SPMC so the device-memory node which is specifying the device memory range for the PVM is no longer applicable.
spm: remove device-memory node from SPMC manifests
The PVM concept is removed from the SPMC so the device-memory node which is specifying the device memory range for the PVM is no longer applicable.
Signed-off-by: Olivier Deprez <olivier.deprez@arm.com> Change-Id: If0cb956e0197028b24ecb78952c66ec454904516
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| 25bbbd2d | 23-Oct-2020 |
Javier Almansa Sobrino <javier.almansasobrino@arm.com> |
Add support for Neoverse-N2 CPUs.
Enable basic support for Neoverse-N2 CPUs.
Signed-off-by: Javier Almansa Sobrino <javier.almansasobrino@arm.com> Change-Id: I498adc2d9fc61ac6e1af8ece131039410872e8
Add support for Neoverse-N2 CPUs.
Enable basic support for Neoverse-N2 CPUs.
Signed-off-by: Javier Almansa Sobrino <javier.almansasobrino@arm.com> Change-Id: I498adc2d9fc61ac6e1af8ece131039410872e8ad
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| 8109d2dd | 29-Oct-2020 |
Alexei Fedorov <Alexei.Fedorov@arm.com> |
Merge "Use constant stack size with RECLAIM_INIT_CODE" into integration |