Merge "fix(neoverse-rd): add console initialisation to BL31" into integration

Merge "feat(cpus): add support for Canyon CPU" into integration

Merge "fix(arm): increase reserved DRAM1 mem for NS images" into integration

Merge "fix(arm): re-enable console by default in BL31" into integration

fix(arm): increase reserved DRAM1 mem for NS images

Defconfig kernels are now approaching 50MB, making the previous 64MB
allocation for both the kernel and initrd insufficient. To accommodate
this g

fix(arm): increase reserved DRAM1 mem for NS images

Defconfig kernels are now approaching 50MB, making the previous 64MB
allocation for both the kernel and initrd insufficient. To accommodate
this growth, increase the reserved NS memory to 128MB.

Change-Id: Ifffdda4623ec7930e4c830a6a222933807d09882
Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>

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feat(cpufeat): enable FEAT_MPAM_PE_BW_CTRL support

Implement support for FEAT_MPAM_PE_BW_CTRL, allowing lower
Exception Levels to access MPAM_PE_BW_CTRL control registers
by disabling their traps to

feat(cpufeat): enable FEAT_MPAM_PE_BW_CTRL support

Implement support for FEAT_MPAM_PE_BW_CTRL, allowing lower
Exception Levels to access MPAM_PE_BW_CTRL control registers
by disabling their traps to EL3.

When INIT_UNUSED_NS_EL2=1, configure MPAMBW2_EL2 in EL3 so
that MPAM_PE_BW_CTRL accesses from EL0/EL1 do not trap to EL2.

At this stage, PE-side MPAM bandwidth controls remain disabled
in EL3.

Signed-off-by: Arvind Ram Prakash <arvind.ramprakash@arm.com>
Change-Id: I8e359b0eb912cff3bdda109b21727a627cac3a7e

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Merge "fix(drtm): remove plat_system_reset()" into integration

feat(cpus): add support for Canyon CPU

Add basic CPU library code to support the Canyon CPU.

Change-Id: I82edc4384c4fe35ec2cf6b4bfd877a24ad8725dc
Signed-off-by: Icen Zeyada <Icen.Zeyada2@arm.com>
S

feat(cpus): add support for Canyon CPU

Add basic CPU library code to support the Canyon CPU.

Change-Id: I82edc4384c4fe35ec2cf6b4bfd877a24ad8725dc
Signed-off-by: Icen Zeyada <Icen.Zeyada2@arm.com>
Signed-off-by: Ryan Everett <ryan.everett@arm.com>
Signed-off-by: Min Yao Ng <minyao.ng@arm.com>
Signed-off-by: Aditya Deshpande <aditya.deshpande@arm.com>

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Merge changes from topic "xlnx_misra_fix_gen_arm" into integration

* changes:
fix(arm-drivers): add missing curly braces
fix(arm): typecast operands to match data type
fix(arm-drivers): declar

Merge changes from topic "xlnx_misra_fix_gen_arm" into integration

* changes:
fix(arm-drivers): add missing curly braces
fix(arm): typecast operands to match data type
fix(arm-drivers): declare unused parameters as void

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fix(neoverse-rd): add console initialisation to BL31

Neoverse-RD currently neglects to initialise the console in BL31. This
change adds the missing initialisation routine.

Change-Id: I946485f4dd857

fix(neoverse-rd): add console initialisation to BL31

Neoverse-RD currently neglects to initialise the console in BL31. This
change adds the missing initialisation routine.

Change-Id: I946485f4dd857240208653e237a83e71073c33ff
Signed-off-by: Chris Kay <chris.kay@arm.com>

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fix(arm): re-enable console by default in BL31

In c997a8d, the common `arm_bl31_early_platform_setup` function
underwent a consolidation of two large preprocessor branches that were
conditional on w

fix(arm): re-enable console by default in BL31

In c997a8d, the common `arm_bl31_early_platform_setup` function
underwent a consolidation of two large preprocessor branches that were
conditional on whether or not Transfer List support is enabled.

This function would initialise the console via `arm_console_boot_init`
*only* if Transfer List support was disabled. During the consolidation,
this call was removed, such that the behaviour was the same for both
branches.

However, the common `bl31_early_platform_setup2` implementation was not
updated to reflect this change, and so platforms that a) relied on this
common implementation and b) did not enable Transfer List support no
longer initialise the console in BL31.

This change ensures that the common implementation correctly initialises
the console during early BL31 boot.

Change-Id: I332af3932ac70382fbf7a5434c0008807f38f86c
Signed-off-by: Chris Kay <chris.kay@arm.com>

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fix(drtm): remove plat_system_reset()

The name plat_system_reset() has been in use for some time by a mediatek
platform (in plat/mediatek/mt8173/plat_pm.c). However, DRTM added a
global hook, that i

fix(drtm): remove plat_system_reset()

The name plat_system_reset() has been in use for some time by a mediatek
platform (in plat/mediatek/mt8173/plat_pm.c). However, DRTM added a
global hook, that is only implemented on FVP, that conflicts with it.
This sometimes results in failed builds.

DRTM remediation ends with a platform reset. However, there is currently
an error message printed that this is not supported. In this case, the
correct thing to do is to panic and as such this hook is not needed.

Further, the correct sequence to reset the system is different and is
only fully implemented by psci_system_reset(). This is a portable
implementation supported by a wide variety of platform.

So remove plat_system_reset(). Once DRTM remediation properly supports
resetting, the psci_system_reset() function should be used to achieve
reset correctly and portably.

Change-Id: Ia4e150c51aeec613838464fbb0e1d0542f19ccab
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>

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Merge "feat(juno): increase MAX_XLAT_TABLES for SPMC_AT_EL3" into integration

Merge "fix(bl31): remove incorrect asserts" into integration

fix(bl31): remove incorrect asserts

When RESET_TO_BL31 is defined, BL31 is the reset vector and no
parameters are provided by a previous bootloader.
Therefore, the arguments arg0 to arg3 passed to
a

fix(bl31): remove incorrect asserts

When RESET_TO_BL31 is defined, BL31 is the reset vector and no
parameters are provided by a previous bootloader.
Therefore, the arguments arg0 to arg3 passed to
arm_bl31_early_platform_setup() must be ignored.
They come directly from the BL31 entrypoint.
The GP registers reset to an architecturally unknown value
so are not necessarily initialized to zero.

Signed-off-by: Alexandre Gonzalo <alexandre.gonzalo@arm.com>
Change-Id: I38dde35145f2bd27fe9645906df192b138984c1d

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feat(juno): increase MAX_XLAT_TABLES for SPMC_AT_EL3

Because of lack of XLAT_TABLE region, juno with SPMC_AT_EL3
got failure while mapping Rx/Tx buffer with ffa_driver.

To fix this, reduce PLAT_SP_

feat(juno): increase MAX_XLAT_TABLES for SPMC_AT_EL3

Because of lack of XLAT_TABLE region, juno with SPMC_AT_EL3
got failure while mapping Rx/Tx buffer with ffa_driver.

To fix this, reduce PLAT_SP_IMAGE_MAX_XLAT_TABLES and
increase MAX_XLAT_TABLES.

Change-Id: I2d9e1f8a7a0661ff9a28781fd14a1376c2a155eb
Signed-off-by: Yeoreum Yun <yeoreum.yun@arm.com>

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feat(fvp): add the GICv5 config

The GICv5 FVP needs a gic_config.yaml file to fully configure the
platform. The device tree that is provided is tied to this configuration
and one does not come in th

feat(fvp): add the GICv5 config

The GICv5 FVP needs a gic_config.yaml file to fully configure the
platform. The device tree that is provided is tied to this configuration
and one does not come in the public package. So add a gic_config.yaml to
have an easy means of fully defining the platform with what we expect.
The provided yaml will also boot Linux.

Change-Id: Ib4994807fe397a86f730bd18b163e55453988b5d
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>

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feat(fvp): add a GICv5 device tree

Tested with Linux v6.17-rc1, it boots as long as cpu idle is disabled.

Change-Id: Iadeb157e9d911c4228dc62c5610676f4c07f6c11
Co-developed-by: Sascha Bischoff <sasc

feat(fvp): add a GICv5 device tree

Tested with Linux v6.17-rc1, it boots as long as cpu idle is disabled.

Change-Id: Iadeb157e9d911c4228dc62c5610676f4c07f6c11
Co-developed-by: Sascha Bischoff <sascha.bischoff@arm.com>
Co-developed-by: Lorenzo Pieralisi <lorenzo.pieralisi2@arm.com>
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>

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chore(fvp): remove redundant tsp manifest definitions

They are never consumed as the macros that use them are not used.

Change-Id: Ifcc0e7875f0dd3a842c80e3180119cd8f6818c87
Signed-off-by: Boyan Kar

chore(fvp): remove redundant tsp manifest definitions

They are never consumed as the macros that use them are not used.

Change-Id: Ifcc0e7875f0dd3a842c80e3180119cd8f6818c87
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>

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Merge changes I61d77211,I9cb5c1fa,I8e8a92fd into integration

* changes:
refactor(gicv3): clarify redistributor base address usage with USE_GIC_DRIVER=3
fix(gicv3): remove plat_gicv3_base.c
ref

Merge changes I61d77211,I9cb5c1fa,I8e8a92fd into integration

* changes:
refactor(gicv3): clarify redistributor base address usage with USE_GIC_DRIVER=3
fix(gicv3): remove plat_gicv3_base.c
refactor(versal-net): use the generic GIC driver

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refactor(gicv3): clarify redistributor base address usage with USE_GIC_DRIVER=3

The GICv3 driver has 2 methods of discovering the redistributors:
a) via setting gicr_base - done at boot and assumes

refactor(gicv3): clarify redistributor base address usage with USE_GIC_DRIVER=3

The GICv3 driver has 2 methods of discovering the redistributors:
a) via setting gicr_base - done at boot and assumes all GICR frames are
contiguous. This is the original method.

b) via gicv3_rdistif_probe() - called from platform code and requires
gicr_base == 0. It relaxes the requirement for frames to be
contiguous, like in a multichip configuration, and defers the
discovery to core bringup. This was introduced later.

Configurations possible with option a) are also possible with option b)
with only slightly different behaviour. USE_GIC_DRIVER=3 inherited
option b) from plat_gicv3_base.c and as such option a) is unusable.
However, it is unclear from code how this should be used. Clarify this
by requiring platforms initialise with gic_set_gicr_frames() and
adding relevant comments.

Also rename plat_arm_override_gicr_frames() to gic_set_gicr_frames() as
this is not plat arm specific and a part of the generic GIC driver.

Change-Id: I61d77211f8e65dc54cf9904069b500d26a06b5a5
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>

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feat(fvp): add firmware update agent uuid in StandaloneMm

To support firmware update feature with StandaloneMm,
add firmware update agent uuid for it.

Currently, firmware update feature with Standa

feat(fvp): add firmware update agent uuid in StandaloneMm

To support firmware update feature with StandaloneMm,
add firmware update agent uuid for it.

Currently, firmware update feature with StandaloneMm is supprted
in SPMC_AT_EL3 only.

Change-Id: I095fb969d22aff36a9f8433a7b731b8023496437
Signed-off-by: Yeoreum Yun <yeoreum.yun@arm.com>

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feat(juno): support image measured boot

Support measured boot with image & configuration hash in juno board with
SPMC_AT_EL3.

Change-Id: I89514c2fee64a7a7aadef28366875df4d4d9243a
Signed-off-by: Yeo

feat(juno): support image measured boot

Support measured boot with image & configuration hash in juno board with
SPMC_AT_EL3.

Change-Id: I89514c2fee64a7a7aadef28366875df4d4d9243a
Signed-off-by: Yeoreum Yun <yeoreum.yun@arm.com>

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feat(juno): change preprocessor condition for plat_get_mbedtls_heap()

The implementation of plat_get_mbedtls_heap() is mandatory
not only when TRUSTED_BOARD_BOOT is enabled,
but also when MEASURED_B

feat(juno): change preprocessor condition for plat_get_mbedtls_heap()

The implementation of plat_get_mbedtls_heap() is mandatory
not only when TRUSTED_BOARD_BOOT is enabled,
but also when MEASURED_BOOT is enabled. But to use either
TRUSTED_BOARD_BOOT or MEASURED_BOOT, it should be
built with CRYPTO_SUPPORT.

Therefore, change the preprocessor condition for
plat_get_mbedtls_heap() with CRYPTO_SUPPORT and
move this function to juno_common.c

Change-Id: I8ec9eaa87f58b760b47c5245b3bca234a9a77075
Signed-off-by: Yeoreum Yun <yeoreum.yun@arm.com>

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feat(juno): change the FW_NS_HANDOFF_BASE

Before supporting StandaloneMm in Juno, the PLAT_SP_IMAGE_NS_BUF_BASE
doesn't use so it's find to use as FW_NS_HANDOFF_BASE.;
But as juno support Standalone

feat(juno): change the FW_NS_HANDOFF_BASE

Before supporting StandaloneMm in Juno, the PLAT_SP_IMAGE_NS_BUF_BASE
doesn't use so it's find to use as FW_NS_HANDOFF_BASE.;
But as juno support StandaloneMm, PLAT_SP_IMAGE_NS_BUF_BASE is used for
non shared buffer between normal world and secure world,
it couldn't be used as FW_NS_HANDOFF_BASE.

Like FVP board, change FW_NS_HANDOFF_BASE as
(PLAT_ARM_NS_IMAGE_BASE - PLAT_ARM_FW_HANDOFF_SIZE) so that
it doesn't overlap with ns shared buffer.

Change-Id: I9fcf31a91fd12e931fb4c41341cdaa23057453cd
Signed-off-by: Yeoreum Yun <yeoreum.yun@arm.com>

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