| 479c833a | 10-Jul-2024 |
Xialin Liu <Xialin.Liu@ARM.com> |
feat(arm): generate tbbr c file CoT dt2c
Integrate the cot-dt2c tool into build process for TBBR configuration
Change-Id: I42ccbc96c5c8fd21266200e427306a80236a78aa Signed-off-by: Xialin Liu <Xialin
feat(arm): generate tbbr c file CoT dt2c
Integrate the cot-dt2c tool into build process for TBBR configuration
Change-Id: I42ccbc96c5c8fd21266200e427306a80236a78aa Signed-off-by: Xialin Liu <Xialin.Liu@ARM.com>
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| 0e0fab0c | 28-Jun-2024 |
Xialin Liu <Xialin.Liu@ARM.com> |
feat(arm): makefile invoke CoT dt2c
Change the makefile to call the cot-dt2c tool during the build for Arm platform
Change-Id: Idb7c02cca6b9ddd87f575a42c88e7b2660b896e0 Signed-off-by: Xialin Liu <X
feat(arm): makefile invoke CoT dt2c
Change the makefile to call the cot-dt2c tool during the build for Arm platform
Change-Id: Idb7c02cca6b9ddd87f575a42c88e7b2660b896e0 Signed-off-by: Xialin Liu <Xialin.Liu@ARM.com>
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| 3146a70a | 27-Jun-2024 |
Xialin Liu <Xialin.Liu@ARM.com> |
refactor(auth): separate bl1 and bl2 CoT
Separate the bl1 and bl2 CoT into individual C files for the upcoming tool, i.e. the CoT device tree-to-source file generator.
Change-Id: I0d24791991b3539c7
refactor(auth): separate bl1 and bl2 CoT
Separate the bl1 and bl2 CoT into individual C files for the upcoming tool, i.e. the CoT device tree-to-source file generator.
Change-Id: I0d24791991b3539c7aef9a562920dc62fecdc69a Signed-off-by: Xialin Liu <Xialin.Liu@ARM.com>
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| 89c58a50 | 02-Feb-2024 |
Jagdish Gediya <jagdish.gediya@arm.com> |
feat(tc): setup ni-tower non-secure access for TC3
NI-Tower's component's registers are need to be accessed from kernel NI-PMU driver so enable NS access to it.
Change-Id: I83a8b3a1d2778baf767ff932
feat(tc): setup ni-tower non-secure access for TC3
NI-Tower's component's registers are need to be accessed from kernel NI-PMU driver so enable NS access to it.
Change-Id: I83a8b3a1d2778baf767ff93263e246d127ef8114 Signed-off-by: Jagdish Gediya <jagdish.gediya@arm.com> Signed-off-by: Leo Yan <leo.yan@arm.com>
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| fe94a21a | 12-Jul-2024 |
Harrison Mutai <harrison.mutai@arm.com> |
fix(arm): move HW_CONFIG relocation into BL31
Refactor DT relocation logic from BL2 to BL31 for non-secure DRAM. Previously, BL2 was responsible for copying the DT into SRAM and DRAM, resulting in d
fix(arm): move HW_CONFIG relocation into BL31
Refactor DT relocation logic from BL2 to BL31 for non-secure DRAM. Previously, BL2 was responsible for copying the DT into SRAM and DRAM, resulting in duplicate code in BL31 to cater for the `RESET_TO_BL31` case. By moving the re-location logic to BL31, we simplify handling of the non-secure DT and TL.
Change-Id: Id239f9410669afe4b223fa8d8bb093084a0e5e1b Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>
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| 1a0ebff7 | 02-May-2024 |
Harrison Mutai <harrison.mutai@arm.com> |
feat(arm): add fw handoff support for RESET_TO_BL31
Change-Id: I78f3c5606f0221bb5fc613a973a7d3fe187db35b Signed-off-by: Harrison Mutai <harrison.mutai@arm.com> |
| 491832fe | 04-Jun-2024 |
Jimmy Brisson <jimmy.brisson@arm.com> |
fix(arm): check the presence of the policy check function
Change-Id: I7bb0dad232eac6c8084873713af22562853a4c21 Signed-off-by: Jimmy Brisson <jimmy.brisson@arm.com> |
| cca1b72b | 03-Jul-2024 |
Harrison Mutai <harrison.mutai@arm.com> |
fix(arm): remove critical handoff code from assert
Fix BL31 crashes caused by incorrect placement of firmware handoff code within an assert. The function call has been removed from the assert to ens
fix(arm): remove critical handoff code from assert
Fix BL31 crashes caused by incorrect placement of firmware handoff code within an assert. The function call has been removed from the assert to ensure it’s executed even when assertions are disabled.
Change-Id: I668f5c08af33327e8ff0e22887c3da109bd6be31 Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>
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| 4f321794 | 19-Jun-2024 |
Salman Nabi <salman.nabi@arm.com> |
fix(arm): string split into two lines causing error
Fix the code related error message when user provides RESET_TO_BL31=1 to the make command but fails to provide "ARM_PRELOADED_DTB_BASE" macro at t
fix(arm): string split into two lines causing error
Fix the code related error message when user provides RESET_TO_BL31=1 to the make command but fails to provide "ARM_PRELOADED_DTB_BASE" macro at the same command line. Remove the line break from the error string causing the code error.
Additionally, make doesn't parse quote marks in strings, thus remove quote marks within error strings in this file.
Change-Id: Ic131b6febebfb420ed588fe4fb0853cbdae0afb8 Signed-off-by: Salman Nabi <salman.nabi@arm.com>
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| 731ac5ea | 14-May-2024 |
laurenw-arm <lauren.wehrmeister@arm.com> |
feat(arm): add COT_DESC_IN_DTB option for Dualroot
Add support for BL2 to get the Dualroot chain of trust description through the Firmware Configuration Framework (FCONF). This makes it possible to
feat(arm): add COT_DESC_IN_DTB option for Dualroot
Add support for BL2 to get the Dualroot chain of trust description through the Firmware Configuration Framework (FCONF). This makes it possible to export the part of the Dualroot chain of trust enforced by BL2 in BL2's configuration file (TB_FW_CONFIG DTB file). BL2 will parse it when setting up the platform.
The feature can be enabled through the COT_DESC_IN_DTB=1 option. The default behavior (COT_DESC_IN_DTB=0) remains to hard-code the Dualroot CoT into BL2 images.
Change-Id: I3497b1daf14be09b5ce3a74d39df7551819255c2 Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com>
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| 7efaad9e | 14-May-2024 |
Daniel Boulby <daniel.boulby@arm.com> |
fix(juno): remove incorrect assert in sp min boot
There may be some valid configurations where a bootloader runs before sp_min. In this case the bootloader may pass arguments through the general pur
fix(juno): remove incorrect assert in sp min boot
There may be some valid configurations where a bootloader runs before sp_min. In this case the bootloader may pass arguments through the general purpose registers when passing control to sp_min causing the assert to fail. Although sp_min may not use the content of the registers requiring them to be zero seems unnecessary.
Signed-off-by: Daniel Boulby <daniel.boulby@arm.com> Change-Id: I96fdc79626968830985bdd540f89e73b213de7d8
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| 5593ec1a | 09-May-2024 |
Manish Pandey <manish.pandey2@arm.com> |
refactor(arm): remove console switch from platform
With commit af3e8e63b switching from Boot console to runtime console is consolidated and been moved to just before exiting bl31 and removed from pl
refactor(arm): remove console switch from platform
With commit af3e8e63b switching from Boot console to runtime console is consolidated and been moved to just before exiting bl31 and removed from platform runtime setup hooks.
For Arm platform's runtime hook has not removed switching of console causing runtime console to be used for Runtime instrumentation logs which is just before bl31 exit. Causing a CI sript fail as it expects the logs on boot console.
Signed-off-by: Manish Pandey <manish.pandey2@arm.com> Change-Id: Ia3728d17635f993911099f9d6a6938e55f45de42
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| 0a9c244b | 29-Jan-2024 |
Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com> |
fix(psci): mask the Last in Level nibble in StateId
In the ARM recommended StateID Encoding, the index for the power level where the calling core is last to go idle use the last niblle of the StateI
fix(psci): mask the Last in Level nibble in StateId
In the ARM recommended StateID Encoding, the index for the power level where the calling core is last to go idle use the last niblle of the StateId.
Even if this nibble is necessary for OS-initiated mode, it can be used by caller even when this OSI mode is not used.
In arm_validate_power_state() function, the StateId is compared with content of arm_pm_idle_states[] build with the arm_make_pwrstate_lvl2 macro, without Last in Level information. So it is safe to mask this nibble for ARM platform in all the cases, and that avoids issues with caller with use the same StateId encoding with OSI mode activated or not (in tftf tests for example, the input(power state) parameter = (0x40001022) and the associated power state is 0x40000022).
Change-Id: I45e8e2b8f526fb61b94cf134d7d4aa3bac4c215d Signed-off-by: Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
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| 2a0ca84f | 07-May-2024 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes from topic "sm/feat_detect" into integration
* changes: refactor(cpufeat): restore functions in detect_arch_features refactor(cpufeat): add macro to simplify is_feat_xx_present c
Merge changes from topic "sm/feat_detect" into integration
* changes: refactor(cpufeat): restore functions in detect_arch_features refactor(cpufeat): add macro to simplify is_feat_xx_present chore: simplify the macro names in ENABLE_FEAT mechanism
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| f7679d43 | 15-Apr-2024 |
Govindraj Raja <govindraj.raja@arm.com> |
refactor(smccc): move pmf to vendor el3 calls
Move pmf support to vendor-specific EL3 Monitor Service Calls. Remove pmf call count as it's not supported in vendor-specific el3 as per SMCCC Documenta
refactor(smccc): move pmf to vendor el3 calls
Move pmf support to vendor-specific EL3 Monitor Service Calls. Remove pmf call count as it's not supported in vendor-specific el3 as per SMCCC Documentation 1.5: https://developer.arm.com/documentation/den0028/latest
Add a deprecation notice to inform PMF is moved from arm-sip range to vendor-specific EL3 range. PMF support from arm-sip range will be removed and will not available after TF-A 2.12 release.
Change-Id: Ie1e14aa601d4fc3db352cd5621d842017a18e9ec Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>
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| 273b8983 | 07-Mar-2024 |
Govindraj Raja <govindraj.raja@arm.com> |
refactor(smccc): move debugfs to vendor el3 calls
Move debugfs to Vendor-Specific EL3 Monitor Service Calls. Function Identifier for Vendor-Specific EL3 Monitor Service is '7' and allocated subrange
refactor(smccc): move debugfs to vendor el3 calls
Move debugfs to Vendor-Specific EL3 Monitor Service Calls. Function Identifier for Vendor-Specific EL3 Monitor Service is '7' and allocated subranges of Function identifiers to different services are:
0x87000000-0x8700FFFF-SMC32: Vendor-Specific EL3 Monitor Service Calls 0xC7000000-0xC700FFFF-SMC64: Vendor-Specific EL3 Monitor Service Calls
Amend Debugfs FID's to use this range and id.
Add a deprecation notice to inform debugfs moved from arm-sip range to Vendor-Specific EL3 range. Debugfs support from arm-sip range will be removed and will not be available after TF-A 2.12 release.
Reference to debugfs component level documentation: https://trustedfirmware-a.readthedocs.io/en/latest/components/debugfs-design.html#overview
Change-Id: I97a50170178f361f70c95ed0049bc4e278de59d7 Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>
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| aaaf2cc3 | 13-Mar-2024 |
Sona Mathew <sonarebecca.mathew@arm.com> |
refactor(cpufeat): add macro to simplify is_feat_xx_present
In this patch, we are trying to introduce the wrapper macro CREATE_FEATURE_PRESENT to get the following capability and align it for all th
refactor(cpufeat): add macro to simplify is_feat_xx_present
In this patch, we are trying to introduce the wrapper macro CREATE_FEATURE_PRESENT to get the following capability and align it for all the features:
-> is_feat_xx_present(): Does Hardware implement the feature. -> uniformity in naming the function across multiple features. -> improved readability
The is_feat_xx_present() is implemented to check if the hardware implements the feature and does not take into account the ENABLE_FEAT_XXX flag enabled/disabled in software.
- CREATE_FEATURE_PRESENT(name, idreg, shift, mask, idval) The wrapper macro reduces the function to a single line and creates the is_feat_xx_present function that checks the id register based on the shift and mask values and compares this against a determined idvalue.
Change-Id: I7b91d2c9c6fbe55f94c693aa1b2c50be54fb9ecc Signed-off-by: Sona Mathew <sonarebecca.mathew@arm.com>
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| f019c801 | 23-Apr-2024 |
Harrison Mutai <harrison.mutai@arm.com> |
feat(handoff): add support for RESET_TO_BL2
When BL2 is enabled as the entrypoint in the reset vector, none of the TL initialisation ordinarily performed in BL1 will have been done. This change ensu
feat(handoff): add support for RESET_TO_BL2
When BL2 is enabled as the entrypoint in the reset vector, none of the TL initialisation ordinarily performed in BL1 will have been done. This change ensures that BL2 has a secure TL to pass information onto BL31 through.
Change-Id: I553b0b7aac9390cd6a2d63471b81ddc72cc40a60 Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>
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| 9c11ed7e | 22-Dec-2023 |
Harrison Mutai <harrison.mutai@arm.com> |
feat(arm): support FW handoff b/w BL1 & BL2
Leverage the framework between BL1 and BL2. Migrate all handoff structures to the TL.
Change-Id: I79ff3a319596b5656184cde10b5204b10a4d03bb Signed-off-by:
feat(arm): support FW handoff b/w BL1 & BL2
Leverage the framework between BL1 and BL2. Migrate all handoff structures to the TL.
Change-Id: I79ff3a319596b5656184cde10b5204b10a4d03bb Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>
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| a5566f65 | 01-Dec-2023 |
Harrison Mutai <harrison.mutai@arm.com> |
feat(arm): support FW handoff b/w BL2 & BL31
Add support for the firmware handoff framework between BL2 and BL31. Create a transfer list in trusted SRAM, leveraging the larger SRAM sizes in recent m
feat(arm): support FW handoff b/w BL2 & BL31
Add support for the firmware handoff framework between BL2 and BL31. Create a transfer list in trusted SRAM, leveraging the larger SRAM sizes in recent models. Load the HW_CONFIG as a TE along with entry point parameters for BL31 execution.
Change-Id: I7c4c6e8353ca978a13520fb3e15fb2803f0f1d0e Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>
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| 3b48ca17 | 06-Feb-2024 |
Chris Kay <chris.kay@arm.com> |
fix(arm): only expose `arm_bl2_dyn_cfg_init` to BL2
The `arm_bl2_dyn_cfg_init` function is intended exclusively for BL2 - it should not be compiled for any other bootloader image. This change hides
fix(arm): only expose `arm_bl2_dyn_cfg_init` to BL2
The `arm_bl2_dyn_cfg_init` function is intended exclusively for BL2 - it should not be compiled for any other bootloader image. This change hides it for all but BL2.
Change-Id: I9fa95094dcc30f9fa4cc7bc5b3119ceae82df1ea Signed-off-by: Chris Kay <chris.kay@arm.com>
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| e7d14fa8 | 07-Mar-2024 |
Manish V Badarkhe <manish.badarkhe@arm.com> |
Merge changes from topic "DPE" into integration
* changes: feat(tc): group components into certificates feat(dice): add cert_id argument to dpe_derive_context() refactor(sds): modify log level
Merge changes from topic "DPE" into integration
* changes: feat(tc): group components into certificates feat(dice): add cert_id argument to dpe_derive_context() refactor(sds): modify log level for region validity feat(tc): add dummy TRNG support to be able to boot pVMs feat(tc): get the parent component provided DPE context_handle feat(tc): share DPE context handle with child component feat(tc): add DPE context handle node to device tree feat(tc): add DPE backend to the measured boot framework feat(auth): add explicit entries for key OIDs feat(dice): add DPE driver to measured boot feat(dice): add client API for DICE Protection Environment feat(dice): add QCBOR library as a dependency of DPE feat(dice): add typedefs from the Open DICE repo docs(changelog): add 'dice' scope refactor(tc): align image identifier string macros refactor(fvp): align image identifier string macros refactor(imx8m): align image identifier string macros refactor(qemu): align image identifier string macros fix(measured-boot): add missing image identifier string refactor(measured-boot): move metadata size macros to a common header refactor(measured-boot): move image identifier strings to a common header
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| 6bdc856b | 06-Mar-2024 |
Manish Pandey <manish.pandey2@arm.com> |
fix(arm): move console flush/switch in common function
There are some CI configs which apply patch on the fly to test some unusual test scenarios. After commit c864af989 there is one patch which doe
fix(arm): move console flush/switch in common function
There are some CI configs which apply patch on the fly to test some unusual test scenarios. After commit c864af989 there is one patch which does not apply cleanly into arm_bl31_plat_runtime_setup().
To fix this issue move console flush/switch into the caller of this function.
Signed-off-by: Manish Pandey <manish.pandey2@arm.com> Change-Id: I4116044d53bef349a707c977cf26d1df65200045
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| 1f47a713 | 12-Jun-2023 |
Tamas Ban <tamas.ban@arm.com> |
feat(tc): add DPE context handle node to device tree
Child software components are inheriting their first valid DPE context handle from their parent components (who loaded and measured them). The co
feat(tc): add DPE context handle node to device tree
Child software components are inheriting their first valid DPE context handle from their parent components (who loaded and measured them). The context handle is shared through the device tree object the following way: - BL1 -> BL2 via TB_FW_CONFIG - BL2 -> BL33 via NT_FW_CONFIG
Signed-off-by: Tamas Ban <tamas.ban@arm.com> Change-Id: I9bf7808fb13a310ad7ca1895674a0c7e6725e08b
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| c864af98 | 19-Feb-2024 |
Salman Nabi <salman.nabi@arm.com> |
refactor(arm): console runtime switch on bl31 exit
Any BL31 setup and Runtime initialization within BL31 is still part of the BOOT process. As such, the console flush and switch must be the last cal
refactor(arm): console runtime switch on bl31 exit
Any BL31 setup and Runtime initialization within BL31 is still part of the BOOT process. As such, the console flush and switch must be the last calls before BL31 exit. Flush the console print buffer before switching to runtime. This is so that there is no lingering chars in the print buffer when we move to the runtime console.
This patch adds console flush before switching to runtime in bl31_plat_runtime_setup() function (before BL31 exits). The plan is to move flush and switch calls to bl31_main before BL31 exits, until then console_flush() in bl31_main.c has been left as is.
This patch affects the Arm platform only.
Change-Id: I4d367b9e9640686ac15246ad24318ae4685c12c5 Signed-off-by: Salman Nabi <salman.nabi@arm.com>
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