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ebce735d |
| 22-Jun-2018 |
Dimitris Papastamos <dimitris.papastamos@arm.com> |
Merge pull request #1406 from robertovargas-arm/uuid
Make TF UUID RFC 4122 compliant
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03364865 |
| 26-Apr-2018 |
Roberto Vargas <roberto.vargas@arm.com> |
Make TF UUID RFC 4122 compliant
RFC4122 defines that fields are stored in network order (big endian), but TF-A stores them in machine order (little endian by default in TF-A). We cannot change the f
Make TF UUID RFC 4122 compliant
RFC4122 defines that fields are stored in network order (big endian), but TF-A stores them in machine order (little endian by default in TF-A). We cannot change the future UUIDs that are already generated, but we can store all the bytes using arrays and modify fiptool to generate the UUIDs with the correct byte order.
Change-Id: I97be2d3168d91f4dee7ccfafc533ea55ff33e46f Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
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d6104f5a |
| 11-May-2017 |
davidcunado-arm <david.cunado@arm.com> |
Merge pull request #927 from jeenu-arm/state-switch
Execution state switch
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f132b4a0 |
| 04-May-2017 |
davidcunado-arm <david.cunado@arm.com> |
Merge pull request #925 from dp-arm/dp/spdx
Use SPDX license identifiers
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b10d4499 |
| 16-Feb-2017 |
Jeenu Viswambharan <jeenu.viswambharan@arm.com> |
Introduce ARM SiP service to switch execution state
In AArch64, privileged exception levels control the execution state (a.k.a. register width) of the immediate lower Exception Level; i.e. whether t
Introduce ARM SiP service to switch execution state
In AArch64, privileged exception levels control the execution state (a.k.a. register width) of the immediate lower Exception Level; i.e. whether the lower exception level executes in AArch64 or AArch32 state. For an exception level to have its execution state changed at run time, it must request the change by raising a synchronous exception to the higher exception level.
This patch implements and adds such a provision to the ARM SiP service, by which an immediate lower exception level can request to switch its execution state. The execution state is switched if the request is:
- raised from non-secure world;
- raised on the primary CPU, before any secondaries are brought online with CPU_ON PSCI call;
- raised from an exception level immediately below EL3: EL2, if implemented; otherwise NS EL1.
If successful, the SMC doesn't return to the caller, but to the entry point supplied with the call. Otherwise, the caller will observe the SMC returning with STATE_SW_E_DENIED code. If ARM Trusted Firmware is built for AArch32, the feature is not supported, and the call will always fail.
For the ARM SiP service:
- Add SMC function IDs for both AArch32 and AArch64; - Increment the SiP service minor version to 2; - Adjust the number of supported SiP service calls.
Add documentation for ARM SiP service.
Fixes ARM-software/tf-issues#436
Change-Id: I4347f2d6232e69fbfbe333b340fcd0caed0a4cea Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
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82cb2c1a |
| 03-May-2017 |
dp-arm <dimitris.papastamos@arm.com> |
Use SPDX license identifiers
To make software license auditing simpler, use SPDX[0] license identifiers instead of duplicating the license text in every file.
NOTE: Files that have been imported by
Use SPDX license identifiers
To make software license auditing simpler, use SPDX[0] license identifiers instead of duplicating the license text in every file.
NOTE: Files that have been imported by FreeBSD have not been modified.
[0]: https://spdx.org/
Change-Id: I80a00e1f641b8cc075ca5a95b10607ed9ed8761a Signed-off-by: dp-arm <dimitris.papastamos@arm.com>
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66b4542a |
| 17-Oct-2016 |
danh-arm <dan.handley@arm.com> |
Merge pull request #729 from dp-arm/dp/arm-sip
Add instrumentation support for PSCI
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f10796a0 |
| 19-Sep-2016 |
dp-arm <dimitris.papastamos@arm.com> |
Introduce ARM SiP service
This patch adds ARM SiP service for use by ARM standard platforms. This service is added to support the SMC interface for the Performance measurement framework(PMF).
Chang
Introduce ARM SiP service
This patch adds ARM SiP service for use by ARM standard platforms. This service is added to support the SMC interface for the Performance measurement framework(PMF).
Change-Id: I26f5712f9ab54f5f721dd4781e35a16f40aacc44 Signed-off-by: dp-arm <dimitris.papastamos@arm.com>
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