| #
2f18aa1f |
| 04-May-2018 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
plat/arm: Migrate AArch64 port to the multi console driver
The old API is deprecated and will eventually be removed.
Arm platforms now use the multi console driver for boot and runtime consoles. Ho
plat/arm: Migrate AArch64 port to the multi console driver
The old API is deprecated and will eventually be removed.
Arm platforms now use the multi console driver for boot and runtime consoles. However, the crash console uses the direct console API because it doesn't need any memory access to work. This makes it more robust during crashes.
The AArch32 port of the Trusted Firmware doesn't support this new API yet, so it is only enabled in AArch64 builds. Because of this, the common code must maintain compatibility with both systems. SP_MIN doesn't have to be updated because it's only used in AArch32 builds. The TSP is only used in AArch64, so it only needs to support the new API without keeping support for the old one.
Special care must be taken because of PSCI_SYSTEM_SUSPEND. In Juno, this causes the UARTs to reset (except for the one used by the TSP). This means that they must be unregistered when suspending and re-registered when resuming. This wasn't a problem with the old driver because it just restarted the UART, and there were no problems associated with registering and unregistering consoles.
The size of BL31 has been increased in builds with SPM.
Change-Id: Icefd117dd1eb9c498921181a21318c2d2435c441 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
show more ...
|
| #
16b05e94 |
| 08-Mar-2018 |
davidcunado-arm <david.cunado@arm.com> |
Merge pull request #1303 from soby-mathew/sm/fix_juno_fwu
Juno: Fixes for firmware update
|
| #
74847ab2 |
| 06-Mar-2018 |
Soby Mathew <soby.mathew@arm.com> |
BL2U: Fix ARM platform timer initilization
This issue was detected when testing FWU on Juno. The Timer `timer_ops` was not being initialized before being used by the SDS driver on Juno. This patch a
BL2U: Fix ARM platform timer initilization
This issue was detected when testing FWU on Juno. The Timer `timer_ops` was not being initialized before being used by the SDS driver on Juno. This patch adds the call to `generic_delay_timer_init()` during bl2u_early_platform_setup(). This is done generically for all ARM platforms because the cost involved is minimal.
Change-Id: I349cf0bd1db68406eb2298b65f9c729f792cabdc Signed-off-by: Soby Mathew <soby.mathew@arm.com>
show more ...
|
| #
73a96051 |
| 28-Feb-2018 |
davidcunado-arm <david.cunado@arm.com> |
Merge pull request #1282 from robertovargas-arm/misra-changes
Misra changes
|
| #
1af540ef |
| 12-Feb-2018 |
Roberto Vargas <roberto.vargas@arm.com> |
Fix MISRA rule 8.4 Part 1
Rule 8.4: A compatible declaration shall be visible when an object or function with external linkage is defined
Fixed for: make DEBUG=1 PLAT=fvp LOG_LEVEL=50 al
Fix MISRA rule 8.4 Part 1
Rule 8.4: A compatible declaration shall be visible when an object or function with external linkage is defined
Fixed for: make DEBUG=1 PLAT=fvp LOG_LEVEL=50 all
Change-Id: I7c2ad3f5c015411c202605851240d5347e4cc8c7 Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
show more ...
|
| #
aa965e15 |
| 20-Jul-2017 |
davidcunado-arm <david.cunado@arm.com> |
Merge pull request #1029 from islmit01/im/fix_includes
Fix order of includes
|
| #
4adb10c1 |
| 14-Jul-2017 |
Isla Mitchell <isla.mitchell@arm.com> |
Fix order of ARM platform #includes
This fix modifies the order of #includes in ARM standard platforms to meet the ARM TF coding standard.
Change-Id: Ide19aad6233babda4eea2d17d49e523645fed1b2 Signe
Fix order of ARM platform #includes
This fix modifies the order of #includes in ARM standard platforms to meet the ARM TF coding standard.
Change-Id: Ide19aad6233babda4eea2d17d49e523645fed1b2 Signed-off-by: Isla Mitchell <isla.mitchell@arm.com>
show more ...
|
| #
81602a97 |
| 22-May-2017 |
danh-arm <dan.handley@arm.com> |
Merge pull request #939 from dp-arm/dp/AArch32_tbbr
Add TBBR and FWU support for AArch32
|
| #
1bd61d0a |
| 22-Nov-2016 |
Yatharth Kochar <yatharth.kochar@arm.com> |
AArch32: Add BL2U support
Add support for firmware upgrade on AArch32. This patch has been tested on the FVP models.
NOTE: Firmware upgrade on Juno AArch32 is not currently supported.
Change-Id: I
AArch32: Add BL2U support
Add support for firmware upgrade on AArch32. This patch has been tested on the FVP models.
NOTE: Firmware upgrade on Juno AArch32 is not currently supported.
Change-Id: I1ca8078214eaf86b46463edd14740120af930aec Signed-off-by: dp-arm <dimitris.papastamos@arm.com> Co-Authored-By: Yatharth Kochar <yatharth.kochar@arm.com>
show more ...
|
| #
f132b4a0 |
| 04-May-2017 |
davidcunado-arm <david.cunado@arm.com> |
Merge pull request #925 from dp-arm/dp/spdx
Use SPDX license identifiers
|
| #
82cb2c1a |
| 03-May-2017 |
dp-arm <dimitris.papastamos@arm.com> |
Use SPDX license identifiers
To make software license auditing simpler, use SPDX[0] license identifiers instead of duplicating the license text in every file.
NOTE: Files that have been imported by
Use SPDX license identifiers
To make software license auditing simpler, use SPDX[0] license identifiers instead of duplicating the license text in every file.
NOTE: Files that have been imported by FreeBSD have not been modified.
[0]: https://spdx.org/
Change-Id: I80a00e1f641b8cc075ca5a95b10607ed9ed8761a Signed-off-by: dp-arm <dimitris.papastamos@arm.com>
show more ...
|
| #
f38d93fd |
| 18-Jan-2017 |
davidcunado-arm <david.cunado@arm.com> |
Merge pull request #801 from masahir0y/cleanup
Macro cleanups
|
| #
47497053 |
| 28-Dec-2016 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
Move BL_COHERENT_RAM_BASE/END defines to common_def.h
We have lots of duplicated defines (and comment blocks too). Move them to include/plat/common/common_def.h.
While we are here, suffix the end a
Move BL_COHERENT_RAM_BASE/END defines to common_def.h
We have lots of duplicated defines (and comment blocks too). Move them to include/plat/common/common_def.h.
While we are here, suffix the end address with _END instead of _LIMIT. The _END is a better fit to indicate the linker-derived real end address.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
show more ...
|
| #
ecdc898d |
| 17-Jan-2017 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
Use *_END instead of *_LIMIT for linker derived end addresses
The usage of _LIMIT seems odd here, so rename as follows: BL_CODE_LIMIT --> BL_CODE_END BL_RO_DATA_LIMIT --> BL_RO_DATA_END B
Use *_END instead of *_LIMIT for linker derived end addresses
The usage of _LIMIT seems odd here, so rename as follows: BL_CODE_LIMIT --> BL_CODE_END BL_RO_DATA_LIMIT --> BL_RO_DATA_END BL1_CODE_LIMIT --> BL1_CODE_END BL1_RO_DATA_LIMIT --> BL1_RO_DATA_END
Basically, we want to use _LIMIT and _END properly as follows: *_SIZE + *_MAX_SIZE = *_LIMIT *_SIZE + *_SIZE = *_END
The _LIMIT is generally defined by platform_def.h to indicate the platform-dependent memory constraint. So, its typical usage is ASSERT(. <= BL31_LIMIT, "BL31 image has exceeded its limit.") in a linker script.
On the other hand, _END is used to indicate the end address of the compiled image, i.e. we do not know it until the image is linked.
Here, all of these macros belong to the latter, so should be suffixed with _END.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
show more ...
|
| #
aadb1350 |
| 15-Jul-2016 |
danh-arm <dan.handley@arm.com> |
Merge pull request #662 from sandrine-bailleux-arm/sb/rodata-xn
Map read-only data as execute-never
|
| #
0af559a8 |
| 08-Jul-2016 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
ARM platforms: Add support for SEPARATE_CODE_AND_RODATA
The arm_setup_page_tables() function used to expect a single set of addresses defining the extents of the whole read-only section, code and re
ARM platforms: Add support for SEPARATE_CODE_AND_RODATA
The arm_setup_page_tables() function used to expect a single set of addresses defining the extents of the whole read-only section, code and read-only data mixed up, which was mapped as executable.
This patch changes this behaviour. arm_setup_page_tables() now expects 2 separate sets of addresses:
- the extents of the code section; - the extents of the read-only data section.
The code is mapped as executable, whereas the data is mapped as execute-never. New #defines have been introduced to identify the extents of the code and the read-only data section. Given that all BL images except BL1 share the same memory layout and linker script structure, these #defines are common across these images. The slight memory layout differences in BL1 have been handled by providing values specific to BL1.
Note that this patch also affects the Xilinx platform port, which uses the arm_setup_page_tables() function. It has been updated accordingly, such that the memory mappings on this platform are unchanged. This is achieved by passing null values as the extents of the read-only data section so that it is ignored. As a result, the whole read-only section is still mapped as executable.
Fixes ARM-software/tf-issues#85
Change-Id: I1f95865c53ce6e253a01286ff56e0aa1161abac5
show more ...
|
| #
b2c96eed |
| 20-Jun-2016 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
ARM platforms: Include BL2U's RO section in total memory region
This patch changes the base address of the "total" Trusted SRAM region seen by the BL2U image. It used to start just after BL2U's read
ARM platforms: Include BL2U's RO section in total memory region
This patch changes the base address of the "total" Trusted SRAM region seen by the BL2U image. It used to start just after BL2U's read-only section (i.e. at address BL2U_RO_LIMIT), it now starts from the base address of the BL2U image (i.e. at address BL2U_BASE). In other words, the "total" memory region now includes BL2U's own read-only section.
This does not change BL2U's resulting memory mappings because the read-only section was already mapped in BL2U, it just wasn't part of this total memory region.
Change-Id: I2da16ac842469023b41904eaa8d13ed678d65671
show more ...
|
| #
b5fa6563 |
| 18-May-2016 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Introduce arm_setup_page_tables() function
This patch introduces the arm_setup_page_tables() function to set up page tables on ARM platforms. It replaces the arm_configure_mmu_elx() functions and do
Introduce arm_setup_page_tables() function
This patch introduces the arm_setup_page_tables() function to set up page tables on ARM platforms. It replaces the arm_configure_mmu_elx() functions and does the same thing except that it doesn't enable the MMU at the end. The idea is to reduce the amount of per-EL code that is generated by the C preprocessor by splitting the memory regions definitions and page tables creation (which is generic) from the MMU enablement (which is the only per-EL configuration).
As a consequence, the call to the enable_mmu_elx() function has been moved up into the plat_arch_setup() hook. Any other ARM standard platforms that use the functions `arm_configure_mmu_elx()` must be updated.
Change-Id: I6f12a20ce4e5187b3849a8574aac841a136de83d
show more ...
|
| #
ab5a53ef |
| 09-Dec-2015 |
danh-arm <dan.handley@arm.com> |
Merge pull request #453 from yatharth-arm/yk/fwu-6
Firmware Update patch stack
|
| #
dcda29f6 |
| 14-Oct-2015 |
Yatharth Kochar <yatharth.kochar@arm.com> |
FWU: Add Firmware Update support in BL2U for ARM platforms
This patch adds support for Firmware update in BL2U for ARM platforms such that TZC initialization is performed on all ARM platforms and (o
FWU: Add Firmware Update support in BL2U for ARM platforms
This patch adds support for Firmware update in BL2U for ARM platforms such that TZC initialization is performed on all ARM platforms and (optionally) transfer of SCP_BL2U image on ARM CSS platforms.
BL2U specific functions are added to handle early_platform and plat_arch setup. The MMU is configured to map in the BL2U code/data area and other required memory.
Change-Id: I57863295a608cc06e6cbf078b7ce34cbd9733e4f
show more ...
|