Merge changes from topics "rotpk_rss_interface", "rss_interfaces" into integration

* changes:
refactor(tc): print RSS interface test PSA status
test(tc): test for AP/RSS interface for ROTPK
fe

Merge changes from topics "rotpk_rss_interface", "rss_interfaces" into integration

* changes:
refactor(tc): print RSS interface test PSA status
test(tc): test for AP/RSS interface for ROTPK
feat(psa): interface with RSS for retrieving ROTPK

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refactor(tc): move all plat tests in test makefile

Moving all PLATFORM_TESTS into platform test makefile

Change-Id: I31821e9e69d916d12ae4c804df26f07fb523c835
Signed-off-by: Lauren Wehrmeister <laur

refactor(tc): move all plat tests in test makefile

Moving all PLATFORM_TESTS into platform test makefile

Change-Id: I31821e9e69d916d12ae4c804df26f07fb523c835
Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com>

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test(tc): test for AP/RSS interface for ROTPK

Adding new test for AP/RSS interface for reading ROTPK for
each 3 types of ROTPKs for: CCA, secure, and non-secure firmware.

Enabled by PLATFORM_TEST=r

test(tc): test for AP/RSS interface for ROTPK

Adding new test for AP/RSS interface for reading ROTPK for
each 3 types of ROTPKs for: CCA, secure, and non-secure firmware.

Enabled by PLATFORM_TEST=rss-rotpk.

Update to print output when AP/RSS interface platform tests
pass to be able to reuse expect script functionality in CI.

Change-Id: Icc50b090e18a272378751fda104d209738b5b70c
Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com>

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Merge changes from topic "gr/cpu_rename" into integration

* changes:
chore: rename hayes to a520
chore: rename hunter to a720
chore: rename hunter_elp to cortex-x4

chore: rename hayes to a520

Rename Cortex-hayes to Cortes-A520

Change-Id: Ic574b55b1aaf11b5bf7b583e244245e7b54bdb22
Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>

chore: rename hunter to a720

Rename cortex_hunter to cortex_a720

Change-Id: Id4e0e2cd47051c2e92b3f16373ea06ef4df1d75f
Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>

chore: rename hunter_elp to cortex-x4

Rename hunter_elp to cortex-x4

Change-Id: I78c8c009d7bee14b4793dc1d950ed81273216831
Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>

Merge "docs: remove deprecated tc0 from list of supported FVPs" into integration

docs: remove deprecated tc0 from list of supported FVPs

TC0 is now a deprecated platform so remove it from the list
of supported FVPs as well as throwing an error if it is attempted
to be built.

Si

docs: remove deprecated tc0 from list of supported FVPs

TC0 is now a deprecated platform so remove it from the list
of supported FVPs as well as throwing an error if it is attempted
to be built.

Signed-off-by: Daniel Boulby <daniel.boulby@arm.com>
Change-Id: Id013fcecbe20700611463ef9eab8cb3ae09071cc

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Merge changes from topics "plat_tests_scalability", "sb/tc-plat-tests" into integration

* changes:
test(tc): unify platform tests traces
test(tc): return test failures count for tfm-testsuite

Merge changes from topics "plat_tests_scalability", "sb/tc-plat-tests" into integration

* changes:
test(tc): unify platform tests traces
test(tc): return test failures count for tfm-testsuite
test(tc): move platform tests in their own function
test(tc): centralize platform error handling
refactor(tc): define PLATFORM_TESTS for scale

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Merge changes from topic "mp/feat_ras" into integration

* changes:
refactor(cpufeat): enable FEAT_RAS for FEAT_STATE_CHECKED
refactor(ras): replace RAS_EXTENSION with FEAT_RAS

refactor(ras): replace RAS_EXTENSION with FEAT_RAS

The current usage of RAS_EXTENSION in TF-A codebase is to cater for two
things in TF-A :
1. Pull in necessary framework and platform hooks for Firm

refactor(ras): replace RAS_EXTENSION with FEAT_RAS

The current usage of RAS_EXTENSION in TF-A codebase is to cater for two
things in TF-A :
1. Pull in necessary framework and platform hooks for Firmware first
handling(FFH) of RAS errors.
2. Manage the FEAT_RAS extension when switching the worlds.

FFH means that all the EAs from NS are trapped in EL3 first and signaled
to NS world later after the first handling is done in firmware. There is
an alternate way of handling RAS errors viz Kernel First handling(KFH).
Tying FEAT_RAS to RAS_EXTENSION build flag was not correct as the
feature is needed for proper handling KFH in as well.

This patch breaks down the RAS_EXTENSION flag into a flag to denote the
CPU architecture `ENABLE_FEAT_RAS` which is used in context management
during world switch and another flag `RAS_FFH_SUPPORT` to pull in
required framework and platform hooks for FFH.

Proper support for KFH will be added in future patches.

BREAKING CHANGE: The previous RAS_EXTENSION is now deprecated. The
equivalent functionality can be achieved by the following
2 options:
- ENABLE_FEAT_RAS
- RAS_FFH_SUPPORT

Signed-off-by: Manish Pandey <manish.pandey2@arm.com>
Change-Id: I1abb9ab6622b8f1b15712b12f17612804d48a6ec

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refactor(tc): define PLATFORM_TESTS for scale

For scalability when we add more tests in the future, add PLATFORM_TESTS
macro when specific test flags, i.e. PLATFORM_TEST_NV_COUNTERS, are
defined.

C

refactor(tc): define PLATFORM_TESTS for scale

For scalability when we add more tests in the future, add PLATFORM_TESTS
macro when specific test flags, i.e. PLATFORM_TEST_NV_COUNTERS, are
defined.

Change-Id: Icb875a171dde673fca9fcf66624ac55383e7b641
Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com>

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Merge changes from topic "mp/group0_support" into integration

* changes:
feat(tc): allow secure watchdog timer to trigger periodically
feat(sbsa): helper api for refreshing watchdog timer

feat(tc): allow secure watchdog timer to trigger periodically

This patch does the following:
1. Configures SBSA secure watchdog timer as Group0 interrupt for
TC platform while keeping it as G

feat(tc): allow secure watchdog timer to trigger periodically

This patch does the following:
1. Configures SBSA secure watchdog timer as Group0 interrupt for
TC platform while keeping it as Group1 secure interrupt for
other CSS based SoCs.
2. Programs the watchdog timer to trigger periodically
3. Provides a Group0 interrupt handler for TC platform port to
deactivate the EL3 interrupt due to expiry of secure watchdog
timer and refresh it explicitly.

Change-Id: I3847d6eb7347c6ea0e527b97b096119ca1e6701b
Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>

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Merge changes Ia1142b31,I424f1cde into integration

* changes:
fix(tc): enable the execution of both platform tests
fix(tc): update the name of mbedtls config header

Merge "refactor(fiptool): move plat_fiptool.mk to tools" into integration

fix(tc): enable the execution of both platform tests

The C preprocessor cannot compare defines against strings.
Such an expression is always evaluated to be true. Therefore,
its usage in a condition

fix(tc): enable the execution of both platform tests

The C preprocessor cannot compare defines against strings.
Such an expression is always evaluated to be true. Therefore,
its usage in a conditional expression results that always the
first branch is taken. Other branches cannot be reached by
any configuration value. The fix removes this string comparison
and instead it introduces distinct defines for all the cases.

Signed-off-by: Tamas Ban <tamas.ban@arm.com>
Change-Id: Ia1142b31b6778686c74e1e882fe4604fe3b6501d

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Merge changes from topic "jc/sve" into integration

* changes:
fix(qemu): enable dynamic feature detection of FEAT_SVE for NormalWorld
fix(tc): enable dynamic feature detection of FEAT_SVE for No

Merge changes from topic "jc/sve" into integration

* changes:
fix(qemu): enable dynamic feature detection of FEAT_SVE for NormalWorld
fix(tc): enable dynamic feature detection of FEAT_SVE for NormalWorld

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fix(tc): enable dynamic feature detection of FEAT_SVE for NormalWorld

Currently, TF-A supports three states for feature flags:
0: FEAT_DISABLED
1: FEAT_STATE_ALWAYS (for fixed/real platforms)
2: FEA

fix(tc): enable dynamic feature detection of FEAT_SVE for NormalWorld

Currently, TF-A supports three states for feature flags:
0: FEAT_DISABLED
1: FEAT_STATE_ALWAYS (for fixed/real platforms)
2: FEAT_STATE_CHECK (for configurable platforms)
to meet the feature detection requirements dynamically, mainly
targetting configurable/Fixed Virtual platforms.

With this mechanism in place, we are refactoring all the existing
feature flags to the FEAT_STATE_CHECK option(=2), including
FEAT_SVE explicitly for FVPs.

SVE Patch Reference:
https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/19888/25

This newly introduced change, breaks the existing behaviour especially
for virtual platforms, who have set the ENABLE_SVE_FOR_NS flag to 1.

Moving ahead, we advise the platforms to take the following steps while
enabling the features:

1. If the platform is configurable (virtual), and want to ensure feature
detection happens dynamically at runtime, set the build flags to
FEAT_STATE_CHECK(=2).

2. For real(fixed) platforms, depending on the features supported by the
hardware and platform wants to enable it, platforms could set build
flags to FEAT_STATE_ALWAYS(=1).

(Note: Only the non-secure world enablement related build flags have
been refactored to take the values within 0 to 2. As earlier Secure
world enablement flags will still remain boolean.)

Henceforth, in order to keep it aligned with this tri-state mechanism,
changing the TC platform default to the now supported dynamic
option(=2), so the right decision can be made by the code at runtime.

Change-Id: I4c1ebeb55a00a7f148fac1573a6694b7c02a0a81
Signed-off-by: Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com>

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Merge changes from topic "feat_amu_rework" into integration

* changes:
refactor(amu): use new AMU feature check routines
refactor(amu): unify ENABLE_AMU and ENABLE_FEAT_AMUv1

refactor(amu): unify ENABLE_AMU and ENABLE_FEAT_AMUv1

So far we have the ENABLE_AMU build option to include AMU register
handling code for enabling and context switch. There is also an
ENABLE_FEAT_A

refactor(amu): unify ENABLE_AMU and ENABLE_FEAT_AMUv1

So far we have the ENABLE_AMU build option to include AMU register
handling code for enabling and context switch. There is also an
ENABLE_FEAT_AMUv1 option, solely to protect the HAFGRTR_EL2 system
register handling. The latter needs some alignment with the new feature
scheme, but it conceptually overlaps with the ENABLE_AMU option.

Since there is no real need for two separate options, unify both into a
new ENABLE_FEAT_AMU name in a first step. This is mostly just renaming at
this point, a subsequent patch will make use of the new feature handling
scheme.

Change-Id: I97d8a55bdee2ed1e1509fa9f2b09fd0bdd82736e
Signed-off-by: Andre Przywara <andre.przywara@arm.com>

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Merge changes from topic "feat_state_part3" into integration

* changes:
refactor(cpufeat): enable FEAT_VHE for FEAT_STATE_CHECKED
refactor(mpam): enable FEAT_MPAM for FEAT_STATE_CHECKED
feat(l

Merge changes from topic "feat_state_part3" into integration

* changes:
refactor(cpufeat): enable FEAT_VHE for FEAT_STATE_CHECKED
refactor(mpam): enable FEAT_MPAM for FEAT_STATE_CHECKED
feat(libc): add support for fallthrough statement
refactor(spe): enable FEAT_SPE for FEAT_STATE_CHECKED
refactor(cpufeat): rename ENABLE_SPE_FOR_LOWER_ELS to ENABLE_SPE_FOR_NS
fix(spe): drop SPE EL2 context switch code

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refactor(cpufeat): rename ENABLE_SPE_FOR_LOWER_ELS to ENABLE_SPE_FOR_NS

At the moment we hardcode the SPE functionality to be available on the
non-secure side only, by setting MDCR_EL2.E2PB accordin

refactor(cpufeat): rename ENABLE_SPE_FOR_LOWER_ELS to ENABLE_SPE_FOR_NS

At the moment we hardcode the SPE functionality to be available on the
non-secure side only, by setting MDCR_EL2.E2PB accordingly.

This should be reflected in the feature selection symbol, so rename that
to ENABLE_SPE_FOR_NS, to make it clearer that SPE is not supported in
the secure world.

Change-Id: I3f9b48eab1a45d6ccfcbb9c90a11eeb66867ad9a
Signed-off-by: Andre Przywara <andre.przywara@arm.com>

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Merge "test(tc): test for AP/RSS NV counter interface" into integration