History log of /rk3399_ARM-atf/make_helpers/defaults.mk (Results 326 – 339 of 339)
Revision Date Author Comments
# 82cb2c1a 03-May-2017 dp-arm <dimitris.papastamos@arm.com>

Use SPDX license identifiers

To make software license auditing simpler, use SPDX[0] license
identifiers instead of duplicating the license text in every file.

NOTE: Files that have been imported by

Use SPDX license identifiers

To make software license auditing simpler, use SPDX[0] license
identifiers instead of duplicating the license text in every file.

NOTE: Files that have been imported by FreeBSD have not been modified.

[0]: https://spdx.org/

Change-Id: I80a00e1f641b8cc075ca5a95b10607ed9ed8761a
Signed-off-by: dp-arm <dimitris.papastamos@arm.com>

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# 0f22bef3 29-Apr-2017 Scott Branden <sbranden@users.noreply.github.com>

Merge branch 'integration' into tf_issue_461


# e83b5fdc 21-Apr-2017 davidcunado-arm <david.cunado@arm.com>

Merge pull request #898 from soby-mathew/sm/dcache-early

PSCI: Build option to enable D-Caches early in warmboot


# bcc3c49c 10-Apr-2017 Soby Mathew <soby.mathew@arm.com>

PSCI: Build option to enable D-Caches early in warmboot

This patch introduces a build option to enable D-cache early on the CPU
after warm boot. This is applicable for platforms which do not require

PSCI: Build option to enable D-Caches early in warmboot

This patch introduces a build option to enable D-cache early on the CPU
after warm boot. This is applicable for platforms which do not require
interconnect programming to enable cache coherency (eg: single cluster
platforms). If this option is enabled, then warm boot path enables
D-caches immediately after enabling MMU.

Fixes ARM-Software/tf-issues#456

Change-Id: I44c8787d116d7217837ced3bcf0b1d3441c8d80e
Signed-off-by: Soby Mathew <soby.mathew@arm.com>

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# ed756252 06-Apr-2017 davidcunado-arm <david.cunado@arm.com>

Merge pull request #886 from dp-arm/dp/stack-protector

Add support for GCC stack protection


# 51faada7 24-Feb-2017 Douglas Raillard <douglas.raillard@arm.com>

Add support for GCC stack protection

Introduce new build option ENABLE_STACK_PROTECTOR. It enables
compilation of all BL images with one of the GCC -fstack-protector-*
options.

A new platform funct

Add support for GCC stack protection

Introduce new build option ENABLE_STACK_PROTECTOR. It enables
compilation of all BL images with one of the GCC -fstack-protector-*
options.

A new platform function plat_get_stack_protector_canary() is introduced.
It returns a value that is used to initialize the canary for stack
corruption detection. Returning a random value will prevent an attacker
from predicting the value and greatly increase the effectiveness of the
protection.

A message is printed at the ERROR level when a stack corruption is
detected.

To be effective, the global data must be stored at an address
lower than the base of the stacks. Failure to do so would allow an
attacker to overwrite the canary as part of an attack which would void
the protection.

FVP implementation of plat_get_stack_protector_canary is weak as
there is no real source of entropy on the FVP. It therefore relies on a
timer's value, which could be predictable.

Change-Id: Icaaee96392733b721fa7c86a81d03660d3c1bc06
Signed-off-by: Douglas Raillard <douglas.raillard@arm.com>

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# 510a9de7 17-Mar-2017 davidcunado-arm <david.cunado@arm.com>

Merge pull request #860 from jeenu-arm/hw-asstd-coh

Patches for platforms with hardware-assisted coherency


# 3c251af3 04-Jan-2017 Jeenu Viswambharan <jeenu.viswambharan@arm.com>

build: Define build option for hardware-assisted coherency

The boolean build option HW_ASSISTED_COHERENCY is introduced to enable
various optimizations in ARM Trusted Software, when built for such
s

build: Define build option for hardware-assisted coherency

The boolean build option HW_ASSISTED_COHERENCY is introduced to enable
various optimizations in ARM Trusted Software, when built for such
systems. It's set to 0 by default.

Change-Id: I638390da6e1718fe024dcf5b402e07084f1eb014
Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>

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# 8da12f61 20-Feb-2017 danh-arm <dan.handley@arm.com>

Merge pull request #843 from jeenu-arm/cas-lock

Introduce locking primitives using CAS instruction


# c877b414 16-Jan-2017 Jeenu Viswambharan <jeenu.viswambharan@arm.com>

Introduce locking primitives using CAS instruction

The ARMv8v.1 architecture extension has introduced support for far
atomics, which includes compare-and-swap. Compare and Swap instruction
is only a

Introduce locking primitives using CAS instruction

The ARMv8v.1 architecture extension has introduced support for far
atomics, which includes compare-and-swap. Compare and Swap instruction
is only available for AArch64.

Introduce build options to choose the architecture versions to target
ARM Trusted Firmware:

- ARM_ARCH_MAJOR: selects the major version of target ARM
Architecture. Default value is 8.

- ARM_ARCH_MINOR: selects the minor version of target ARM
Architecture. Default value is 0.

When:

(ARM_ARCH_MAJOR > 8) || ((ARM_ARCH_MAJOR == 8) && (ARM_ARCH_MINOR >= 1)),

for AArch64, Compare and Swap instruction is used to implement spin
locks. Otherwise, the implementation falls back to using
load-/store-exclusive instructions.

Update user guide, and introduce a section in Firmware Design guide to
summarize support for features introduced in ARMv8 Architecture
Extensions.

Change-Id: I73096a0039502f7aef9ec6ab3ae36680da033f16
Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>

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# 474d4eca 31-Jan-2017 danh-arm <dan.handley@arm.com>

Merge pull request #799 from masahir0y/fiptool

fiptool: Alignment support + misc refactoring


# 1c75d5df 25-Dec-2016 Masahiro Yamada <yamada.masahiro@socionext.com>

fiptool: support --align option to add desired alignment to image offset

The current fiptool packs all the images without any padding between
them. So, the offset to each image has no alignment. T

fiptool: support --align option to add desired alignment to image offset

The current fiptool packs all the images without any padding between
them. So, the offset to each image has no alignment. This is not
efficient, for example, when the FIP is read from a block-oriented
device.

For example, (e)MMC is accessed by block-addressing. The block size
is 512 byte. So, the best case is each image is aligned by 512 byte
since the DMA engine can transfer the whole of the image to its load
address directly. The worst case is the offset does not have even
DMA-capable alignment (this is where we stand now). In this case,
we need to transfer every block to a bounce buffer, then do memcpy()
from the bounce buffer to our final destination. At least, this
should work with the abstraction by the block I/O layer, but the
CPU-intervention for the whole data transfer makes it really slow.

This commit adds a new option --align to the fiptool. This option,
if given, requests the tool to align each component in the FIP file
by the specified byte. Also, add a new Make option FIP_ALIGN for
easier access to this feature; users can give something like
FIP_ALIGN=512 from the command line, or add "FIP_ALIGN := 512" to
their platform.mk file.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

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# f61bf2c7 08-Nov-2016 danh-arm <dan.handley@arm.com>

Merge pull request #751 from jeenu-arm/ug-reorder

Alphabetical reordering for build options and make files


# 2fae4b1e 24-Oct-2016 Jeenu Viswambharan <jeenu.viswambharan@arm.com>

build: Reorder build variables alphabetically

When build variables are assigned or processed en masse, they'd appear
neater in alphabetical order.

Static initializations are moved to a separate fil

build: Reorder build variables alphabetically

When build variables are assigned or processed en masse, they'd appear
neater in alphabetical order.

Static initializations are moved to a separate file,
make_helpers/defaults.mk, which in itself is sorted alphabetically.

No functional changes.

Change-Id: I966010042b33de6b67592fb9ffcef8fc44d7d128
Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>

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