Merge "feat(psci): add a helper function to ensure that non-boot PEs are offline" into integration

feat(psci): add a helper function to ensure that non-boot PEs are offline

Introduce a helper function that ensures that non-boot PEs are offline.
This function will be used by DRTM implementation to

feat(psci): add a helper function to ensure that non-boot PEs are offline

Introduce a helper function that ensures that non-boot PEs are offline.
This function will be used by DRTM implementation to ensure that system
is running with only single PE.

Signed-off-by: Manish V Badarkhe <manish.badarkhe@arm.com>
Signed-off-by: Lucian Paul-Trifu <lucian.paultrifu@gmail.com>
Signed-off-by: Manish Pandey <manish.pandey2@arm.com>
Change-Id: I521ebefa49297026b02554629b1710a232148e01

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Merge "PSCI: fix limit of 256 CPUs caused by cast to unsigned char" into integration

PSCI: fix limit of 256 CPUs caused by cast to unsigned char

In psci_setup.c psci_init_pwr_domain_node() takes an unsigned
char as node_idx which limits it to initialising only the first
256 CPUs. As

PSCI: fix limit of 256 CPUs caused by cast to unsigned char

In psci_setup.c psci_init_pwr_domain_node() takes an unsigned
char as node_idx which limits it to initialising only the first
256 CPUs. As the calling function does not check for a limit of
256 I think this is a bug so change the unsigned char to
uint16_t and change the cast from the calling site in
populate_power_domain_tree().

Also update the non_cpu_pwr_domain_node structure lock_index
to uint16_t and update the function signature for psci_lock_init()
appropriately.

Finally add a define PSCI_MAX_CPUS_INDEX to psci_private.h and add
a CASSERT to psci_setup.c to make sure PLATFORM_CORE_COUNT cannot
exceed the index value.

Signed-off-by: Graeme Gregory <graeme@nuviainc.com>
Change-Id: I9e26842277db7483fd698b46bbac62aa86e71b45

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Merge "Unify type of "cpu_idx" across PSCI module." into integration

Unify type of "cpu_idx" across PSCI module.

NOTE for platform integrators:
API `plat_psci_stat_get_residency()` third argument
`last_cpu_idx` is changed from "signed int" to the
"unsigned i

Unify type of "cpu_idx" across PSCI module.

NOTE for platform integrators:
API `plat_psci_stat_get_residency()` third argument
`last_cpu_idx` is changed from "signed int" to the
"unsigned int" type.

Issue / Trouble points
1. cpu_idx is used as mix of `unsigned int` and `signed int` in code
with typecasting at some places leading to coverity issues.

2. Underlying platform API's return cpu_idx as `unsigned int`
and comparison is performed with platform specific defines
`PLAFORM_xxx` which is not consistent

Misra Rule 10.4:
The value of a complex expression of integer type may only be cast to
a type that is narrower and of the same signedness as the underlying
type of the expression.

Based on above points, cpu_idx is kept as `unsigned int` to match
the API's and low-level functions and platform defines are updated
where ever required

Signed-off-by: Deepika Bhavnani <deepika.bhavnani@arm.com>
Change-Id: Ib26fd16e420c35527204b126b9b91e8babcc3a5c

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Merge "adding support to enable different personality of the same soc." into integration

adding support to enable different personality of the same soc.

Same SoC has different personality by creating different number of:
- cores
- clusters.

As a result, the platform specific power doma

adding support to enable different personality of the same soc.

Same SoC has different personality by creating different number of:
- cores
- clusters.

As a result, the platform specific power domain tree will be created
after identify the personality of the SoC.
Hence, platform specific power domain tree may not be same for all the
personality of the soc.

Thus, psci library code will deduce the 'plat_core_count', while
populating the power domain tree topology and return the number of
cores.

PLATFORM_CORE_COUNT will still be valid for a SoC, such that
psci_plat_core_count <= PLATFORM_CORE_COUNT.

PLATFORM_CORE_COUNT will continued to be defined by platform to create
the data structures.

Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
Change-Id: I1f5c47647631cae2dcdad540d64cf09757db7185

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Merge "Unify type of "cpu_idx" across PSCI module." into integration

Unify type of "cpu_idx" across PSCI module.

cpu_idx is used as mix of `unsigned int` and `signed int` in code
with typecasting at some places. This change is to unify the
cpu_idx as `unsigned int` a

Unify type of "cpu_idx" across PSCI module.

cpu_idx is used as mix of `unsigned int` and `signed int` in code
with typecasting at some places. This change is to unify the
cpu_idx as `unsigned int` as underlying API;s `plat_my_core_pos`
returns `unsigned int`

It was discovered via coverity issue CID 354715

Signed-off-by: Deepika Bhavnani <deepika.bhavnani@arm.com>
Change-Id: I4f0adb0c596ff1177210c5fe803bff853f2e54ce

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Merge "PSCI: Lookup list of parent nodes to lock only once" into integration

PSCI: Lookup list of parent nodes to lock only once

When acquiring or releasing the power domain locks for a given CPU the
parent nodes are looked up by walking the up the PD tree list on both the
a

PSCI: Lookup list of parent nodes to lock only once

When acquiring or releasing the power domain locks for a given CPU the
parent nodes are looked up by walking the up the PD tree list on both the
acquire and release path, only one set of lookups is needed. Fetch the
parent nodes first and pass this list into both the acquire and release
functions to avoid the double lookup.

This also allows us to not have to do this lookup after coherency has
been exited during the core power down sequence. The shared struct
psci_cpu_pd_nodes is not placed in coherent memory like is done
for psci_non_cpu_pd_nodes and doing so would negatively affect
performance. With this patch we remove the need to have it in coherent
memory by moving the access out of psci_release_pwr_domain_locks().

Signed-off-by: Andrew F. Davis <afd@ti.com>
Change-Id: I7b9cfa9d31148dea0f5e21091c8b45ef7fe4c4ab

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Merge pull request #1726 from antonio-nino-diaz-arm/an/includes

Sanitise includes across codebase

Sanitise includes across codebase

Enforce full include path for includes. Deprecate old paths.

The following folders inside include/lib have been left unchanged:

- include/lib/cpus/${ARCH}
- inclu

Sanitise includes across codebase

Enforce full include path for includes. Deprecate old paths.

The following folders inside include/lib have been left unchanged:

- include/lib/cpus/${ARCH}
- include/lib/el3_runtime/${ARCH}

The reason for this change is that having a global namespace for
includes isn't a good idea. It defeats one of the advantages of having
folders and it introduces problems that are sometimes subtle (because
you may not know the header you are actually including if there are two
of them).

For example, this patch had to be created because two headers were
called the same way: e0ea0928d5b7 ("Fix gpio includes of mt8173 platform
to avoid collision."). More recently, this patch has had similar
problems: 46f9b2c3a282 ("drivers: add tzc380 support").

This problem was introduced in commit 4ecca33988b9 ("Move include and
source files to logical locations"). At that time, there weren't too
many headers so it wasn't a real issue. However, time has shown that
this creates problems.

Platforms that want to preserve the way they include headers may add the
removed paths to PLAT_INCLUDES, but this is discouraged.

Change-Id: I39dc53ed98f9e297a5966e723d1936d6ccf2fc8f
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>

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Merge pull request #1509 from antonio-nino-diaz-arm/an/bool

xlat: psci: Use bool instead of int

psci: Use bool in internal interfaces

Change-Id: I77c9cd2d1d6d0122cc49917fa686014bee154589
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>

Merge pull request #1486 from antonio-nino-diaz-arm/an/psci-misra

Fix several MISRA defects in PSCI library

PSCI: Fix MISRA defects in common and setup code

MISRA C-2012 Rules 10.1, 10.3, 17.8 and 20.7.

Change-Id: I3980bd2a1d845559af4bbe2887a0250d0506a064
Signed-off-by: Antonio Nino Diaz <antonio.ninodia

PSCI: Fix MISRA defects in common and setup code

MISRA C-2012 Rules 10.1, 10.3, 17.8 and 20.7.

Change-Id: I3980bd2a1d845559af4bbe2887a0250d0506a064
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>

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PSCI: Fix MISRA defects in MEM_PROTECT

MISRA C-2012 Rules 10.1 and 10.3.

Change-Id: I88cd5f56cda5780f2e0ba541c0f5b561309ab3af
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>

PSCI: Fix MISRA defects in ON/OFF/SUSPEND/SYSTEM_OFF

Fix violations of MISRA C-2012 Rules 8.13, 10.1, 10.3, 17.7 and 20.7.

Change-Id: I6f45a1069b742aebf9e1d6a403717b1522083f51
Signed-off-by: Antoni

PSCI: Fix MISRA defects in ON/OFF/SUSPEND/SYSTEM_OFF

Fix violations of MISRA C-2012 Rules 8.13, 10.1, 10.3, 17.7 and 20.7.

Change-Id: I6f45a1069b742aebf9e1d6a403717b1522083f51
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>

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PSCI: Fix types of definitions

Also change header guards to fix defects of MISRA C-2012 Rule 21.1.

Change-Id: Ied0d4b0e557ef6119ab669d106d2ac5d99620c57
Acked-by: Sumit Garg <sumit.garg@linaro.org>

PSCI: Fix types of definitions

Also change header guards to fix defects of MISRA C-2012 Rule 21.1.

Change-Id: Ied0d4b0e557ef6119ab669d106d2ac5d99620c57
Acked-by: Sumit Garg <sumit.garg@linaro.org>
Acked-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>

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PSCI: Refactor lock macros to comply with MISRA

Fix MISRA C-2012 Directive 4.9 defects.

Change-Id: Ibd5364d8f138ddcf59c8074c32b35769366807dc
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.c

PSCI: Refactor lock macros to comply with MISRA

Fix MISRA C-2012 Directive 4.9 defects.

Change-Id: Ibd5364d8f138ddcf59c8074c32b35769366807dc
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>

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PSCI: Replace macros by static inline functions

Fix MISRA C-2012 Directive 4.9 and Rule 21.1 defects.

Change-Id: I96c216317d38741ee632d2640cd7b36e6723d5c2
Signed-off-by: Antonio Nino Diaz <antonio.

PSCI: Replace macros by static inline functions

Fix MISRA C-2012 Directive 4.9 and Rule 21.1 defects.

Change-Id: I96c216317d38741ee632d2640cd7b36e6723d5c2
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>

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Merge pull request #1399 from danielboulby-arm/db/MISRA

MISRA 5.1, 5.3 & 5.7 compliance changes

Fix MISRA Rule 5.3 Part 2

Use a _ prefix for Macro arguments to prevent that argument from
hiding variables of the same name in the outer scope

Rule 5.3: An identifier declared in an inner scope sh

Fix MISRA Rule 5.3 Part 2

Use a _ prefix for Macro arguments to prevent that argument from
hiding variables of the same name in the outer scope

Rule 5.3: An identifier declared in an inner scope shall not
hide an identifier declared in an outer scope

Fixed For:
make LOG_LEVEL=50 PLAT=fvp

Change-Id: I67b6b05cbad4aeca65ce52981b4679b340604708
Signed-off-by: Daniel Boulby <daniel.boulby@arm.com>

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