| #
e0c7d8f5 |
| 07-Nov-2023 |
Olivier Deprez <olivier.deprez@arm.com> |
Merge "fix(smccc): ensure that mpidr passed through SMC is valid" into integration
|
| #
e60c1847 |
| 27-Oct-2023 |
Manish Pandey <manish.pandey2@arm.com> |
fix(smccc): ensure that mpidr passed through SMC is valid
There are various SMC calls which pass mpidr as an argument which is currently tested at random places in SMC call path. To make the mpidr v
fix(smccc): ensure that mpidr passed through SMC is valid
There are various SMC calls which pass mpidr as an argument which is currently tested at random places in SMC call path. To make the mpidr validation check consistent across SMC calls, do this check as part of SMC argument validation.
This patch introduce a helper function is_valid_mpidr() to validate mpidr and call it as part of validating SMC arguments at starting of SMC handlers (which expect mpidr as an argument).
Signed-off-by: Manish Pandey <manish.pandey2@arm.com> Change-Id: I11ea50e22caf17896cf4b2059b87029b2ba136b1
show more ...
|
| #
e6faf282 |
| 04-Apr-2023 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "fix(psci): remove unreachable switch/case blocks" into integration
|
| #
ad27f4b5 |
| 29-Mar-2023 |
Andre Przywara <andre.przywara@arm.com> |
fix(psci): remove unreachable switch/case blocks
The PSCI function dispatcher switch/case is split up between 32-bit and 64-bit function IDs, based on bit 30 of the encoding. This bit just encodes t
fix(psci): remove unreachable switch/case blocks
The PSCI function dispatcher switch/case is split up between 32-bit and 64-bit function IDs, based on bit 30 of the encoding. This bit just encodes the maximum size of the arguments, not necessarily whether they are used from AArch64 or AArch32. So while some functions exist in both worlds (CPU_ON, for instance), some functions take no or only 32-bit arguments (CPU_OFF, PSCI_FEATURES), so they only exist as a 32-bit function call.
Commit b88a4416b5e5 ("feat(psci): add support for PSCI_SET_SUSPEND_MODE" , gerrit ID Iebf65f5f7846aef6b8643ad6082db99b4dcc4bef) and commit 9a70e69e0598 ("feat(psci): update PSCI_FEATURES", gerrit ID I5da8a989b53419ad2ab55b73ddeee6e882c25554) introduced two "case" sections for 32-bit function IDs in the 64-bit branch, which will never trigger. The one small extra case caused the sun50i_a64 DEBUG build to go beyond its RAM limit.
Removed the redundant switch/case blocks, to make sun50i_a64 build again.
Change-Id: Ic65b7403d128837296a0c3af42c6f23f9f57778e Signed-off-by: Andre Przywara <andre.przywara@arm.com>
show more ...
|
| #
92e93253 |
| 28-Mar-2023 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes from topic "psci-osi" into integration
* changes: feat(sc7280): add support for PSCI_OS_INIT_MODE feat(fvp): enable support for PSCI OS-initiated mode feat(psci): update PSCI_FEA
Merge changes from topic "psci-osi" into integration
* changes: feat(sc7280): add support for PSCI_OS_INIT_MODE feat(fvp): enable support for PSCI OS-initiated mode feat(psci): update PSCI_FEATURES feat(psci): add support for OS-initiated mode feat(psci): add support for PSCI_SET_SUSPEND_MODE build(psci): add build option for OS-initiated mode docs(psci): add design proposal for OS-initiated mode
show more ...
|
| #
9a70e69e |
| 14-Sep-2022 |
Wing Li <wingers@google.com> |
feat(psci): update PSCI_FEATURES
This patch updates the PSCI_FEATURES handler to indicate support for OS-initiated mode per section 5.15.2 of the PSCI spec (DEN0022D.b) based on the value of `FF_SUP
feat(psci): update PSCI_FEATURES
This patch updates the PSCI_FEATURES handler to indicate support for OS-initiated mode per section 5.15.2 of the PSCI spec (DEN0022D.b) based on the value of `FF_SUPPORTS_OS_INIT_MODE`, which is conditionally enabled by the `PSCI_OS_INIT_MODE` build option.
Change-Id: I5da8a989b53419ad2ab55b73ddeee6e882c25554 Signed-off-by: Wing Li <wingers@google.com>
show more ...
|
| #
606b7430 |
| 14-Sep-2022 |
Wing Li <wingers@google.com> |
feat(psci): add support for OS-initiated mode
This patch adds a `psci_validate_state_coordination` function that is called by `psci_cpu_suspend_start` in OS-initiated mode.
This function validates
feat(psci): add support for OS-initiated mode
This patch adds a `psci_validate_state_coordination` function that is called by `psci_cpu_suspend_start` in OS-initiated mode.
This function validates the request per sections 4.2.3.2, 5.4.5, and 6.3 of the PSCI spec (DEN0022D.b): - The requested power states are consistent with the system's state - The calling core is the last running core at the requested power level
This function differs from `psci_do_state_coordination` in that: - The `psci_req_local_pwr_states` map is not modified if the request were to be denied - The `state_info` argument is never modified since it contains the power states requested by the calling OS
This is conditionally compiled into the build depending on the value of the `PSCI_OS_INIT_MODE` build option.
Change-Id: I667041c842d2856e9d128c98db4d5ae4e4552df3 Signed-off-by: Wing Li <wingers@google.com>
show more ...
|
| #
b88a4416 |
| 14-Sep-2022 |
Wing Li <wingers@google.com> |
feat(psci): add support for PSCI_SET_SUSPEND_MODE
This patch adds a PSCI_SET_SUSPEND_MODE handler that validates the request per section 5.20.2 of the PSCI spec (DEN0022D.b), and updates the suspend
feat(psci): add support for PSCI_SET_SUSPEND_MODE
This patch adds a PSCI_SET_SUSPEND_MODE handler that validates the request per section 5.20.2 of the PSCI spec (DEN0022D.b), and updates the suspend mode to the requested mode.
This is conditionally compiled into the build depending on the value of the `PSCI_OS_INIT_MODE` build option.
Change-Id: Iebf65f5f7846aef6b8643ad6082db99b4dcc4bef Signed-off-by: Wing Li <wingers@google.com>
show more ...
|
| #
9bd1aed3 |
| 03-Oct-2022 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "refactor(psci): unify psci_is_last_on_cpu and psci_is_last_on_cpu_safe" into integration
|
| #
b41b0824 |
| 22-Aug-2022 |
Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com> |
refactor(psci): unify psci_is_last_on_cpu and psci_is_last_on_cpu_safe
"psci_is_last_on_cpu" and "psci_is_last_on_cpu_safe" modules perform mostly similar functionalities, verifying whether the curr
refactor(psci): unify psci_is_last_on_cpu and psci_is_last_on_cpu_safe
"psci_is_last_on_cpu" and "psci_is_last_on_cpu_safe" modules perform mostly similar functionalities, verifying whether the current CPU is the only active core and other cores have been turned off.
However, psci_is_last_on_cpu_safe function differs from the other with: 1. Safe API locks the power domain
This patch removes the section duplicating the functionality and ensures that "psci_is_last_on_cpu api",is reused in "psci_is_last_on_cpu_safe" procedure.
Signed-off-by: Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com> Change-Id: Ie372519e423898d7afa5427cdd77a7f9d3369587
show more ...
|
| #
43636796 |
| 10-Jan-2020 |
Mark Dykes <mardyk01@review.trustedfirmware.org> |
Merge "Unify type of "cpu_idx" across PSCI module." into integration
|
| #
5b33ad17 |
| 13-Dec-2019 |
Deepika Bhavnani <deepika.bhavnani@arm.com> |
Unify type of "cpu_idx" across PSCI module.
NOTE for platform integrators: API `plat_psci_stat_get_residency()` third argument `last_cpu_idx` is changed from "signed int" to the "unsigned i
Unify type of "cpu_idx" across PSCI module.
NOTE for platform integrators: API `plat_psci_stat_get_residency()` third argument `last_cpu_idx` is changed from "signed int" to the "unsigned int" type.
Issue / Trouble points 1. cpu_idx is used as mix of `unsigned int` and `signed int` in code with typecasting at some places leading to coverity issues.
2. Underlying platform API's return cpu_idx as `unsigned int` and comparison is performed with platform specific defines `PLAFORM_xxx` which is not consistent
Misra Rule 10.4: The value of a complex expression of integer type may only be cast to a type that is narrower and of the same signedness as the underlying type of the expression.
Based on above points, cpu_idx is kept as `unsigned int` to match the API's and low-level functions and platform defines are updated where ever required
Signed-off-by: Deepika Bhavnani <deepika.bhavnani@arm.com> Change-Id: Ib26fd16e420c35527204b126b9b91e8babcc3a5c
show more ...
|
| #
9a207532 |
| 04-Jan-2019 |
Antonio Niño Díaz <antonio.ninodiaz@arm.com> |
Merge pull request #1726 from antonio-nino-diaz-arm/an/includes
Sanitise includes across codebase
|
| #
09d40e0e |
| 14-Dec-2018 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
Sanitise includes across codebase
Enforce full include path for includes. Deprecate old paths.
The following folders inside include/lib have been left unchanged:
- include/lib/cpus/${ARCH} - inclu
Sanitise includes across codebase
Enforce full include path for includes. Deprecate old paths.
The following folders inside include/lib have been left unchanged:
- include/lib/cpus/${ARCH} - include/lib/el3_runtime/${ARCH}
The reason for this change is that having a global namespace for includes isn't a good idea. It defeats one of the advantages of having folders and it introduces problems that are sometimes subtle (because you may not know the header you are actually including if there are two of them).
For example, this patch had to be created because two headers were called the same way: e0ea0928d5b7 ("Fix gpio includes of mt8173 platform to avoid collision."). More recently, this patch has had similar problems: 46f9b2c3a282 ("drivers: add tzc380 support").
This problem was introduced in commit 4ecca33988b9 ("Move include and source files to logical locations"). At that time, there weren't too many headers so it wasn't a real issue. However, time has shown that this creates problems.
Platforms that want to preserve the way they include headers may add the removed paths to PLAT_INCLUDES, but this is discouraged.
Change-Id: I39dc53ed98f9e297a5966e723d1936d6ccf2fc8f Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
show more ...
|
| #
424f68dd |
| 11-Oct-2018 |
Soby Mathew <soby.mathew@arm.com> |
Merge pull request #1625 from ldts/psci
psci: platform control of SYSTEM_SUSPEND entry
|
| #
a4065abd |
| 11-Oct-2018 |
ldts <jorge.ramirez.ortiz@gmail.com> |
psci: platform control of SYSTEM_SUSPEND entry
Some platforms can only resume from system suspend from the boot CPU, hence they should only enter that state from that same core.
The following commi
psci: platform control of SYSTEM_SUSPEND entry
Some platforms can only resume from system suspend from the boot CPU, hence they should only enter that state from that same core.
The following commit presents an interface that allows the platform to reject system suspend entry near its very last stage (last CPU).
show more ...
|
| #
f943ce74 |
| 03-Aug-2018 |
Dimitris Papastamos <dimitris.papastamos@arm.com> |
Merge pull request #1509 from antonio-nino-diaz-arm/an/bool
xlat: psci: Use bool instead of int
|
| #
362030bf |
| 01-Aug-2018 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
psci: Use bool in internal interfaces
Change-Id: I77c9cd2d1d6d0122cc49917fa686014bee154589 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
|
| #
60e062fb |
| 25-Jul-2018 |
danh-arm <dan.handley@arm.com> |
Merge pull request #1486 from antonio-nino-diaz-arm/an/psci-misra
Fix several MISRA defects in PSCI library
|
| #
6b7b0f36 |
| 17-Jul-2018 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
PSCI: Fix MISRA defects in common and setup code
MISRA C-2012 Rules 10.1, 10.3, 17.8 and 20.7.
Change-Id: I3980bd2a1d845559af4bbe2887a0250d0506a064 Signed-off-by: Antonio Nino Diaz <antonio.ninodia
PSCI: Fix MISRA defects in common and setup code
MISRA C-2012 Rules 10.1, 10.3, 17.8 and 20.7.
Change-Id: I3980bd2a1d845559af4bbe2887a0250d0506a064 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
show more ...
|
| #
6ab136c2 |
| 29-Mar-2018 |
Dimitris Papastamos <dimitris.papastamos@arm.com> |
Merge pull request #1313 from jonathanwright-ARM/jw/MISRA-switch-statements
Fix switch statements to comply with MISRA rules
|
| #
3eacacc0 |
| 13-Mar-2018 |
Jonathan Wright <jonathan.wright@arm.com> |
lib: fix switch statements to comply with MISRA rules
Ensure (where possible) that switch statements in lib comply with MISRA rules 16.1 - 16.7.
Change-Id: I52bc896fb7094d2b7569285686ee89f39f1ddd84
lib: fix switch statements to comply with MISRA rules
Ensure (where possible) that switch statements in lib comply with MISRA rules 16.1 - 16.7.
Change-Id: I52bc896fb7094d2b7569285686ee89f39f1ddd84 Signed-off-by: Jonathan Wright <jonathan.wright@arm.com>
show more ...
|
| #
6d8db46b |
| 21-Mar-2018 |
davidcunado-arm <david.cunado@arm.com> |
Merge pull request #1314 from antonio-nino-diaz-arm/an/smccc-header
Rename 'smcc' to 'smccc'
|
| #
085e80ec |
| 21-Mar-2018 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
Rename 'smcc' to 'smccc'
When the source code says 'SMCC' it is talking about the SMC Calling Convention. The correct acronym is SMCCC. This affects a few definitions and file names.
Some files hav
Rename 'smcc' to 'smccc'
When the source code says 'SMCC' it is talking about the SMC Calling Convention. The correct acronym is SMCCC. This affects a few definitions and file names.
Some files have been renamed (smcc.h, smcc_helpers.h and smcc_macros.S) but the old files have been kept for compatibility, they include the new ones with an ERROR_DEPRECATED guard.
Change-Id: I78f94052a502436fdd97ca32c0fe86bd58173f2f Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
show more ...
|
| #
9bc94a6d |
| 01-Feb-2018 |
davidcunado-arm <david.cunado@arm.com> |
Merge pull request #1240 from dp-arm/dp/smccc
Implement support for SMCCC v1.1 and optimize security mitigations for CVE-2017-5715 on AArch64
|