History log of /rk3399_ARM-atf/lib/gpt_rme/gpt_rme.c (Results 26 – 37 of 37)
Revision Date Author Comments
# 0a549c50 06-Sep-2022 Manish V Badarkhe <manish.badarkhe@arm.com>

Merge "fix(gpt): correct the GPC enable sequence" into integration


# 14cddd7a 22-Jul-2022 Kathleen Capella <kathleen.capella@arm.com>

fix(gpt): correct the GPC enable sequence

Since GPC control register fields are permitted to be cached in a TLB,
invalidate TLB after setting fields to ensure future checks are using
the updated val

fix(gpt): correct the GPC enable sequence

Since GPC control register fields are permitted to be cached in a TLB,
invalidate TLB after setting fields to ensure future checks are using
the updated values.

Signed-off-by: Kathleen Capella <kathleen.capella@arm.com>
Change-Id: I95630b40b673363bbf74da2705deca03089fff3a

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# 3f9d5c24 22-Jul-2022 Manish Pandey <manish.pandey2@arm.com>

Merge "fix(doc): document missing RMM-EL3 runtime services" into integration


# e50fedbc 04-Jul-2022 Javier Almansa Sobrino <javier.almansasobrino@arm.com>

fix(doc): document missing RMM-EL3 runtime services

This patch adds documentation for the missing RMM-EL3
runtime services:

* RMM_RMI_REQ_COMPLETE
* RMM_GTSI_DELEGATE
* RMM_GTSI_UNDELEGATE

This pa

fix(doc): document missing RMM-EL3 runtime services

This patch adds documentation for the missing RMM-EL3
runtime services:

* RMM_RMI_REQ_COMPLETE
* RMM_GTSI_DELEGATE
* RMM_GTSI_UNDELEGATE

This patch also fixes a couple of minor bugs on return codes
for delegate/undelegate internal APIs.

Signed-off-by: Javier Almansa Sobrino <javier.almansasobrino@arm.com>
Change-Id: Ic721005e7851e838eebaee7865ba78fadc3309e4

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# 9c33b087 09-Mar-2022 Soby Mathew <soby.mathew@arm.com>

Merge "fix(gpt_rme): rework delegating/undelegating sequence" into integration


# 6a00e9b0 21-Oct-2021 Robert Wakim <robert.wakim@arm.com>

fix(gpt_rme): rework delegating/undelegating sequence

The previous delegating/undelegating sequence was incorrect as per the
specification DDI0615, "Architecture Reference Manual Supplement, The
Rea

fix(gpt_rme): rework delegating/undelegating sequence

The previous delegating/undelegating sequence was incorrect as per the
specification DDI0615, "Architecture Reference Manual Supplement, The
Realm Management Extension (RME), for Armv9-A" Sections A1.1.1 and
A1.1.2

Off topic:
- cleaning the gpt_is_gpi_valid and gpt_check_pass_overlap

Change-Id: Idb64d0a2e6204f1708951137062847938ab5e0ac
Signed-off-by: Robert Wakim <robert.wakim@arm.com>

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# 7ddeabab 10-Nov-2021 Manish Pandey <manish.pandey2@arm.com>

Merge "fix(gpt_rme): use correct print format for uint64_t" into integration


# 2461bd3a 09-Nov-2021 Manish Pandey <manish.pandey2@arm.com>

fix(gpt_rme): use correct print format for uint64_t

sha 4ce3e99a3 introduced printf format specifiers for fixed width
types, which uses PRI*64 instead of "ll" for 64 bit values.

Signed-off-by: Mani

fix(gpt_rme): use correct print format for uint64_t

sha 4ce3e99a3 introduced printf format specifiers for fixed width
types, which uses PRI*64 instead of "ll" for 64 bit values.

Signed-off-by: Manish Pandey <manish.pandey2@arm.com>
Change-Id: I30472411467061d58cc6ee22407ed3bad2552751

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# 08da1876 05-Nov-2021 Soby Mathew <soby.mathew@arm.com>

Merge "fix(gpt_rme): add necessary barriers and remove cache clean" into integration


# 77612b90 11-Oct-2021 Soby Mathew <soby.mathew@arm.com>

fix(gpt_rme): add necessary barriers and remove cache clean

This patch adds necessary barriers after GPT entries are modified
so that the writes are observed correctly by the GPC hardware.
The share

fix(gpt_rme): add necessary barriers and remove cache clean

This patch adds necessary barriers after GPT entries are modified
so that the writes are observed correctly by the GPC hardware.
The shareability of GPC fetches are changed from OSH to ISH so
that they align with the shareability of MMU attributes for the
region. Thus by adding a dsbishst() between the GPT L1 entry
write as part of granule migration at runtime, we can now remove
the clean cache maintenance operation (CMO) for that region.

Signed-off-by: Soby Mathew <soby.mathew@arm.com>
Signed-off-by: Robert Wakim <robert.wakim@arm.com>
Change-Id: Ib9e405b106f0db95c7fbdb26773c0ed41663a5b4

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# 1d651211 06-Oct-2021 Soby Mathew <soby.mathew@arm.com>

Merge changes from topic "za/feat_rme" into integration

* changes:
refactor(gpt): productize and refactor GPT library
feat(rme): disable Watchdog for Arm platforms if FEAT_RME enabled
docs(rme

Merge changes from topic "za/feat_rme" into integration

* changes:
refactor(gpt): productize and refactor GPT library
feat(rme): disable Watchdog for Arm platforms if FEAT_RME enabled
docs(rme): add build and run instructions for FEAT_RME
fix(plat/fvp): bump BL2 stack size
fix(plat/fvp): allow changing the kernel DTB load address
refactor(plat/arm): rename ARM_DTB_DRAM_NS region macros
refactor(plat/fvp): update FVP platform DTS for FEAT_RME
feat(plat/arm): add GPT initialization code for Arm platforms
feat(plat/fvp): add memory map for FVP platform for FEAT_RME
refactor(plat/arm): modify memory region attributes to account for FEAT_RME
feat(plat/fvp): add RMM image support for FVP platform
feat(rme): add GPT Library
feat(rme): add ENABLE_RME build option and support for RMM image
refactor(makefile): remove BL prefixes in build macros
feat(rme): add context management changes for FEAT_RME
feat(rme): add Test Realm Payload (TRP)
feat(rme): add RMM dispatcher (RMMD)
feat(rme): run BL2 in root world when FEAT_RME is enabled
feat(rme): add xlat table library changes for FEAT_RME
feat(rme): add Realm security state definition
feat(rme): add register definitions and helper functions for FEAT_RME

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# f19dc624 16-Jun-2021 johpow01 <john.powell@arm.com>

refactor(gpt): productize and refactor GPT library

This patch updates and refactors the GPT library and fixes bugs.

- Support all combinations of PGS, PPS, and L0GPTSZ parameters.
- PPS and PGS are

refactor(gpt): productize and refactor GPT library

This patch updates and refactors the GPT library and fixes bugs.

- Support all combinations of PGS, PPS, and L0GPTSZ parameters.
- PPS and PGS are set at runtime, L0GPTSZ is read from GPCCR_EL3.
- Use compiler definitions to simplify code.
- Renaming functions to better suit intended uses.
- MMU enabled before GPT APIs called.
- Add comments to make function usage more clear in GPT library.
- Added _rme suffix to file names to differentiate better from the
GPT file system code.
- Renamed gpt_defs.h to gpt_rme_private.h to better separate private
and public code.
- Renamed gpt_core.c to gpt_rme.c to better conform to TF-A precedent.

Signed-off-by: John Powell <john.powell@arm.com>
Change-Id: I4cbb23b0f81e697baa9fb23ba458aa3f7d1ed919

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