Introduce UL(), L() and LL() macros

utils_def.h already has U() and ULL(), but not UL(), which is needed for
types like uinptr_t and u_register_t.

Also added L() and LL() for signed values.

Change

Introduce UL(), L() and LL() macros

utils_def.h already has U() and ULL(), but not UL(), which is needed for
types like uinptr_t and u_register_t.

Also added L() and LL() for signed values.

Change-Id: I0654df80d57149ff49507c52f1b27f3d500486a0
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>

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Merge pull request #1429 from jeenu-arm/mmu-direct

Enable MMU without stack for xlat v2/DynamIQ

xlat v2: Split MMU setup and enable

At present, the function provided by the translation library to enable
MMU constructs appropriate values for translation library, and programs
them to the right r

xlat v2: Split MMU setup and enable

At present, the function provided by the translation library to enable
MMU constructs appropriate values for translation library, and programs
them to the right registers. The construction of initial values,
however, is only required once as both the primary and secondaries
program the same values.

Additionally, the MMU-enabling function is written in C, which means
there's an active stack at the time of enabling MMU. On some systems,
like Arm DynamIQ, having active stack while enabling MMU during warm
boot might lead to coherency problems.

This patch addresses both the above problems by:

- Splitting the MMU-enabling function into two: one that sets up
values to be programmed into the registers, and another one that
takes the pre-computed values and writes to the appropriate
registers. With this, the primary effectively calls both functions
to have the MMU enabled, but secondaries only need to call the
latter.

- Rewriting the function that enables MMU in assembly so that it
doesn't use stack.

This patch fixes a bunch of MISRA issues on the way.

Change-Id: I0faca97263a970ffe765f0e731a1417e43fbfc45
Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>

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Merge pull request #1422 from Yann-lms/genmask

Genmask

utils: Add BIT_32 and BIT_64 macros

When applying some MISRA rules, lots of issues are raised with BIT macro
on AARCH32, and cast on uint32_t would be required (Rule 10.3).
The macros BIT_32 and BIT

utils: Add BIT_32 and BIT_64 macros

When applying some MISRA rules, lots of issues are raised with BIT macro
on AARCH32, and cast on uint32_t would be required (Rule 10.3).
The macros BIT_32 and BIT_64 are then created for 32bit and 64bit.
Then the BIT macro defaults on BIT_64 on AARCH64,
and on BIT_32 on AARCH32.

Signed-off-by: Yann Gautier <yann.gautier@st.com>

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Add GENMASK macros

Import GENMASK_32 and GENMASK_64 macros from optee-os (permissive license).
And default GENMASK is set to GENMASK_32 for AARCH32,
and to GENMASK_64 for 64bit arch.

fixes arm-soft

Add GENMASK macros

Import GENMASK_32 and GENMASK_64 macros from optee-os (permissive license).
And default GENMASK is set to GENMASK_32 for AARCH32,
and to GENMASK_64 for 64bit arch.

fixes arm-software/tf-issues#596

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>

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Merge pull request #1373 from jeenu-arm/ras-support

RAS support

RAS: Add helpers to access Standard Error Records

The ARMv8 RAS Extensions introduced Standard Error Records which are a
set of standard registers through which:

- Platform can configure RAS node

RAS: Add helpers to access Standard Error Records

The ARMv8 RAS Extensions introduced Standard Error Records which are a
set of standard registers through which:

- Platform can configure RAS node policy; e.g., notification
mechanism;

- RAS nodes can record and expose error information for error handling
agents.

Standard Error Records can either be accessed via. memory-mapped
or System registers. This patch adds helper functions to access
registers and fields within an error record.

Change-Id: I6594ba799f4a1789d7b1e45b3e17fd40e7e0ba5c
Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>

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Merge pull request #1335 from JoelHutton/jh/cleanup_void_pointers

Clean usage of void pointers to access symbols

Clean usage of void pointers to access symbols

Void pointers have been used to access linker symbols, by declaring an
extern pointer, then taking the address of it. This limits symbols
values to ali

Clean usage of void pointers to access symbols

Void pointers have been used to access linker symbols, by declaring an
extern pointer, then taking the address of it. This limits symbols
values to aligned pointer values. To remove this restriction an
IMPORT_SYM macro has been introduced, which declares it as a char
pointer and casts it to the required type.

Change-Id: I89877fc3b13ed311817bb8ba79d4872b89bfd3b0
Signed-off-by: Joel Hutton <Joel.Hutton@Arm.com>

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Merge pull request #1287 from davidcunado-arm/dc/fix_misra

Update ULL() macro and instances of ull to comply with MISRA

Update ULL() macro and instances of ull to comply with MISRA

MISRA C-2012 Rule 7.3 violation: lowercase l shall not be used as literal suffixes.

This patch resolves this for the ULL() macro by usin

Update ULL() macro and instances of ull to comply with MISRA

MISRA C-2012 Rule 7.3 violation: lowercase l shall not be used as literal suffixes.

This patch resolves this for the ULL() macro by using ULL suffix instead
of the ull suffix.

Change-Id: Ia8183c399e74677e676956e8653e82375d0e0a01
Signed-off-by: David Cunado <david.cunado@arm.com>

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Merge pull request #1235 from jwerner-chromium/JW_udelay

Fix udelay issues that can make duration slightly too short

Merge pull request #1193 from jwerner-chromium/JW_coreboot

New console API and coreboot support [v4]

Make div_round_up() correct for divisors that are not a power of 2

The current div_round_up() implementation relies on round_up() which
only works correctly for boundaries that are a power of 2. It

Make div_round_up() correct for divisors that are not a power of 2

The current div_round_up() implementation relies on round_up() which
only works correctly for boundaries that are a power of 2. It is
documented as such, but this still seems dangerously easy to overlook,
especially since many other environments (e.g. the Linux kernel) have a
similar macro without these limitations.

There is a different way to calculate this that can deal with all kinds
of divisors without other drawbacks, so let's just use that instead.

Change-Id: Id382736683f5d4e880ef00c53cfa23a2f9208440
Signed-off-by: Julius Werner <jwerner@chromium.org>

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utils_def: Add REGSZ and make BIT() assembly-compatible

In assembly code it can be useful to have a constant for the width of a
register in the current architecture, so this patch adds one to
<utils

utils_def: Add REGSZ and make BIT() assembly-compatible

In assembly code it can be useful to have a constant for the width of a
register in the current architecture, so this patch adds one to
<utils_def.h> and replaces the existing custom one in crash_reporting.S
with that. It also fixes up the BIT() macro in the same file so that it
can be safely used in assembly code.

Change-Id: I10513a311f3379e767396e6ddfbae8d2d8201464
Signed-off-by: Julius Werner <jwerner@chromium.org>

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Merge pull request #1116 from soby-mathew/sm/gicv3_save_restore

GICv3 context save and restore

GICv3: add functions for save and restore

During system suspend, the GICv3 Distributor and Redistributor context
can be lost due to power gating of the system power domain. This means
that the GICv3

GICv3: add functions for save and restore

During system suspend, the GICv3 Distributor and Redistributor context
can be lost due to power gating of the system power domain. This means
that the GICv3 context needs to be saved prior to system suspend and
restored on wakeup. Currently the consensus is that the Firmware should
be in charge of this. See tf-issues#464 for more details.

This patch introduces helper APIs in the GICv3 driver to save and
restore the Distributor and Redistributor contexts. The GICv3 ITS
context is not considered in this patch because the specification says
that the details of ITS power management is implementation-defined.
These APIs are expected to be appropriately invoked by the platform
layer during system suspend.

Fixes ARM-software/tf-issues#464

Change-Id: Iebb9c6770ab8c4d522546f161fa402d2fe02ec00
Signed-off-by: Soby Mathew <soby.mathew@arm.com>
Signed-off-by: Douglas Raillard <douglas.raillard@arm.com>

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Merge pull request #1106 from antonio-nino-diaz-arm/an/bit-macro

Fix type of `unsigned long` constants

Fix type of `unsigned long` constants

The type `unsigned long` is 32 bit wide in AArch32, but 64 bit wide in
AArch64. This is inconsistent and that's why we avoid using it as per
the Coding Guidelin

Fix type of `unsigned long` constants

The type `unsigned long` is 32 bit wide in AArch32, but 64 bit wide in
AArch64. This is inconsistent and that's why we avoid using it as per
the Coding Guidelines. This patch changes all `UL` occurrences to `U`
or `ULL` depending on the context so that the size of the constant is
clear.

This problem affected the macro `BIT(nr)`. As long as this macro is used
to fill fields of registers, that's not a problem, since all registers
are 32 bit wide in AArch32 and 64 bit wide in AArch64. However, if the
macro is used to fill the fields of a 64-bit integer, it won't be able
to set the upper 32 bits in AArch32.

By changing the type of this macro to `unsigned long long` the behaviour
is always the same regardless of the architecture, as this type is
64-bit wide in both cases.

Some Tegra platform files have been modified by this patch.

Change-Id: I918264c03e7d691a931f0d1018df25a2796cc221
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>

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Merge pull request #1066 from islmit01/im/enable_cnp_bit

Enable CnP bit for ARMv8.2 CPUs

Add macro to test for minimum architecture version

The macro concisely expresses and requires architecture version to be at
least as required by its arguments. This would be useful when extending
Tr

Add macro to test for minimum architecture version

The macro concisely expresses and requires architecture version to be at
least as required by its arguments. This would be useful when extending
Trusted Firmware functionality for future architecture revisions.

Replace similar usage in the current code base with the new macro.

Change-Id: I9dcd0aa71a663eabd02ed9632b8ce87611fa5a57
Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>

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Merge pull request #953 from vwadekar/tegra-misra-fixes-v1

Tegra misra fixes v1

Add U() macro to share constants between C and other sources

This patch adds the U(_x) macros to utils_def.h to allow constants to
be shared between C and other sources.

Signed-off-by: Varun Wadeka

Add U() macro to share constants between C and other sources

This patch adds the U(_x) macros to utils_def.h to allow constants to
be shared between C and other sources.

Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

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Merge pull request #925 from dp-arm/dp/spdx

Use SPDX license identifiers