Merge changes I6422cd05,Idd01179d,I5c557616,I343a46d6,Id48671ae, ... into integration

* changes:
feat(st-clock): add STM32MP21 and STM32MP23 RCC variants
feat(stm32mp21): add RCC registers file

Merge changes I6422cd05,Idd01179d,I5c557616,I343a46d6,Id48671ae, ... into integration

* changes:
feat(st-clock): add STM32MP21 and STM32MP23 RCC variants
feat(stm32mp21): add RCC registers file
feat(stm32mp21): add clock and reset bindings
refactor(stm32mp2): update display of reset reason
feat(stm32mp25): add RCC register to display all IWDG flags
feat(stm32mp21): add PWR registers file
feat(st): introduce SoC family compilation switch
docs(changelog): add subsections for STM32MP2
docs(stm32mp2): introduce new STM32MP23 family
docs(stm32mp2): introduce new STM32MP21 family

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feat(st): introduce SoC family compilation switch

add STM32MP1X and STM3MP2X compilation switch to replace
#if STM32MP21 || STM32MP23 || STM32MP25 for MP2 SoCs and
#if STM32MP13 || STM32MP15 for MP1

feat(st): introduce SoC family compilation switch

add STM32MP1X and STM3MP2X compilation switch to replace
#if STM32MP21 || STM32MP23 || STM32MP25 for MP2 SoCs and
#if STM32MP13 || STM32MP15 for MP1 SoCs.

This will avoid to forget to modify all these files when a new SoC is
introduced.

Change-Id: Ib984b22a19e08af5bc1b62fe2032f10240ec9122
Signed-off-by: Maxime Méré <maxime.mere@foss.st.com>

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Merge changes I93de2db1,I880f88b1,I02e2fc75,I48908413,Ie7de9a9f, ... into integration

* changes:
feat(st-ddr): add STM32MP2 driver
refactor(st-ddr): create generic services
refactor(st-ddr): r

Merge changes I93de2db1,I880f88b1,I02e2fc75,I48908413,Ie7de9a9f, ... into integration

* changes:
feat(st-ddr): add STM32MP2 driver
refactor(st-ddr): create generic services
refactor(st-ddr): remove name from stm32mp_ddr_reg_desc
refactor(st-ddr): add definition for timeouts and delays
feat(st): add stm32mp_is_wakeup_from_standby()
feat(stm32mp2): add RETRAM map/unmap capability
feat(stm32mp2): add helper to get DDRDBG base address
feat(stm32mp2): handle DDR power supplies
feat(stm32mp1): handle DDR power supplies

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feat(st-ddr): add STM32MP2 driver

Add driver to support DDR on STM32MP2 platform. It drives the DDR PHY
and its firmware, as well as the DDR controller.

Signed-off-by: Nicolas Le Bayon <nicolas.le.

feat(st-ddr): add STM32MP2 driver

Add driver to support DDR on STM32MP2 platform. It drives the DDR PHY
and its firmware, as well as the DDR controller.

Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
Signed-off-by: Maxime Méré <maxime.mere@foss.st.com>
Change-Id: I93de2db1b9378d5654e76b3bf6f3407d80bc4ca5

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refactor(st-ddr): create generic services

Disabling AXI port, enabling host interface and both enabling/disabling
software self-refresh services are already present inside the driver
source code.
Fa

refactor(st-ddr): create generic services

Disabling AXI port, enabling host interface and both enabling/disabling
software self-refresh services are already present inside the driver
source code.
Factorize by gathering them as services inside the generic part,
and adapt driver to call these new functions.

Add services to manage quasi-dynamic registers. DDRCTRL contains
quasi-dynamic registers, which are dynamic only under some conditions
defined by the user guide (with 4 groups).
In our driver, out of reset state, only groups 3 and 4 are updated.
Group 4 needs only sw_done/sw_done_ack sequence, already available.
Group 3 sequence include more conditions, that are gathered in
specific services. stm32mp_ddr_disable_host_interface() has been added
to do this.

Add dedicated generic service to toggle rfshctl3.refresh_update_level
and wait for completion.

Manage AXI ports and HIF when updating QD3 registers. Quasi-dynamic
group 3 (QD3) registers are updated when DDR is not completely
initialized, i.e. when AXI ports are not enabled and possibly when
host interface (HIF) is not enabled too.
In that case, a specific mechanism is necessary to restore the same
conditions as before accessing QD3 registers.
Static functions have been added to get AXI ports and HIF states and
are used to determine the needed conditions to set/unset.

Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
Change-Id: I880f88b1cb6fc76199ad9ea33e9d63a5c469aed4

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refactor(st-ddr): remove name from stm32mp_ddr_reg_desc

It was only used for an error trace, with little added value. This
allows some gains in DDR driver data size.

Signed-off-by: Yann Gautier <ya

refactor(st-ddr): remove name from stm32mp_ddr_reg_desc

It was only used for an error trace, with little added value. This
allows some gains in DDR driver data size.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I02e2fc75efd90ff188e62f39850b9bd4c3af1649

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refactor(st-ddr): add definition for timeouts and delays

Instead of using hard-coded number in DDR driver, use macros.
Modify TIMEOUT_US_1S to DDR_TIMEOUT_US_1S to align with other defines.

Signed-

refactor(st-ddr): add definition for timeouts and delays

Instead of using hard-coded number in DDR driver, use macros.
Modify TIMEOUT_US_1S to DDR_TIMEOUT_US_1S to align with other defines.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I489084132821774b0049a4a5d7fc30db24a7bb11

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Merge "fix(st-ddr): express memory size with size_t type" into integration

fix(st-ddr): express memory size with size_t type

Express memory size with size_t type in structures.
Retrieve value as uint32_t from device tree and then cast it to size_t.
Combined with uintptr_t

fix(st-ddr): express memory size with size_t type

Express memory size with size_t type in structures.
Retrieve value as uint32_t from device tree and then cast it to size_t.
Combined with uintptr_t use, it ensures a generic algorithm whatever
the platform architecture, notably within systematic tests. Adapt also
their prototypes.

Move memory size print outside stm32mp_ddr_check_size() to adapt it to
related platform.

Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
Change-Id: Ic6e1a62d7a5e23cef49909a658098c800e7dae3f

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Merge changes from topic "st_ddr_updates" into integration

* changes:
refactor(st-ddr): move basic tests in a dedicated file
refactor(st-ddr): reorganize generic and specific elements
feat(stm

Merge changes from topic "st_ddr_updates" into integration

* changes:
refactor(st-ddr): move basic tests in a dedicated file
refactor(st-ddr): reorganize generic and specific elements
feat(stm32mp1): allow configuration of DDR AXI ports number
refactor(st-ddr): update parameter array initialization
feat(st-ddr): add read valid training support
refactor(stm32mp1): remove the support of calibration result
fix(st-ddr): correct DDR warnings

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refactor(st-ddr): reorganize generic and specific elements

stm32mp_ddrctl structure contains DDRCTRL registers definitions.
stm32mp_ddr_info contains general DDR information extracted from DT.
stm32

refactor(st-ddr): reorganize generic and specific elements

stm32mp_ddrctl structure contains DDRCTRL registers definitions.
stm32mp_ddr_info contains general DDR information extracted from DT.
stm32mp_ddr_size moves to the generic side.
stm32mp1_ddr_priv contains platform private data.

stm32mp_ddr_dt_get_info() and stm32mp_ddr_dt_get_param() allow to
retrieve data from DT. They are located in new generic c/h files in
which stm32mp_ddr_param structure is declared. Platform makefile
is updated.

Adapt driver with this new classification.

Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
Change-Id: I4187376c9fff1a30e7a94407d188391547107997

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