| #
c8054c8d |
| 27-Feb-2025 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge changes I5aabe415,Ief6fb4fc into integration
* changes:
feat(stm32mp15-fdts): add SP_MIN versions of DT files
feat(st): use dedicated version of DT for SP_MIN
|
| #
20544d66 |
| 22-Nov-2024 |
Yann Gautier <yann.gautier@st.com> |
feat(stm32mp15-fdts): add SP_MIN versions of DT files
For ST STM32MP15 boards, where the default BL32 is OP-TEE, we add new
versions of DT files with -sp_min.dts extension to manage this
configurati
feat(stm32mp15-fdts): add SP_MIN versions of DT files
For ST STM32MP15 boards, where the default BL32 is OP-TEE, we add new
versions of DT files with -sp_min.dts extension to manage this
configuration. These files can be compiled directly, or, with the
previous patch, the same command line can be used and those sp_min
files will be automatically used, if AARCH32_SP=sp_min option is used.
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I5aabe415b0302da48f02918a3dbd24f334eb8e7d
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| #
ef92d58a |
| 19-Dec-2024 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "fix(stm32mp1-fdts): re-enable RTC clock" into integration
|
| #
33573ea6 |
| 11-Dec-2024 |
Valentin Caron <valentin.caron@foss.st.com> |
fix(stm32mp1-fdts): re-enable RTC clock
On STM32MP15 ST boards, RTC clock configuration by OPTEE is not ready
yet. Re-enable it temporary to get LSE as clock source of RTC.
Signed-off-by: Valentin
fix(stm32mp1-fdts): re-enable RTC clock
On STM32MP15 ST boards, RTC clock configuration by OPTEE is not ready
yet. Re-enable it temporary to get LSE as clock source of RTC.
Signed-off-by: Valentin Caron <valentin.caron@foss.st.com>
Change-Id: Ib6071229552e456faffb4fdfc8db9808140d54a7
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| #
78ff3619 |
| 14-Jun-2024 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge changes from topic "st_clk_update" into integration
* changes:
feat(st-clock): use early traces
fix(st-clock): adapt order of CSS on LSE and HSE
refactor(st-clock): remove unused struct
Merge changes from topic "st_clk_update" into integration
* changes:
feat(st-clock): use early traces
fix(st-clock): adapt order of CSS on LSE and HSE
refactor(st-clock): remove unused struct
feat(stm32mp1-fdts): remove RTC clock configuration
refactor(st-clock): move stm32mp1_clk_rcc_regs_*lock
refactor(st-clock): driver size optimization
refactor(st-clock): remove BL32 support on STM32MP13
feat(st-clock): don't gate/ungate an oscillator if it is not wired
feat(dt-bindings): add missing SPIx bus clocks
feat(stm32mp1-fdts): remove PLL1 settings
feat(st-clock): update with new bindings
feat(stm32mp1-fdts): new RCC DT bindings for STM32MP1
feat(dt-bindings): new RCC DT bindings
feat(stm32mp1): always boot at 650MHz
refactor(st-clock): remove LSEDRV_MEDIUM_HIGH for STM32MP13
fix(st-clock): display proper PLL number for STM32MP13
fix(st-clock): do not reconfigure LSE
feat(stm32mp1-fdts): move RNG1 to CSI to improve random generation
refactor(st-clock): remove unused clk function in API
refactor(st-clock): support deactivated STGEN in stm32mp_stgen_config
feat(st-clock): add function to restore generic timer rate
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| #
703a581e |
| 23-Nov-2023 |
Gabriel Fernandez <gabriel.fernandez@foss.st.com> |
feat(stm32mp1-fdts): remove RTC clock configuration
RTC clock configuration is done now in OPTEE.
Note: The RTC clock source can only be configured once.
TF-A, configuring the RTC clock source will
feat(stm32mp1-fdts): remove RTC clock configuration
RTC clock configuration is done now in OPTEE.
Note: The RTC clock source can only be configured once.
TF-A, configuring the RTC clock source will have no effect in OPTEE.
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
Change-Id: I111ba96b27d0de0c45086ba8ef947dd2e6785672
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| #
66d7c8bf |
| 01-Feb-2023 |
Gabriel Fernandez <gabriel.fernandez@foss.st.com> |
feat(stm32mp1-fdts): remove PLL1 settings
TF-A BL2 always boot at 650MHz using an algorithm to calculate PLL1
settings, without reading DT. Remove the corresponding nodes.
Change-Id: I0003337d8d37d
feat(stm32mp1-fdts): remove PLL1 settings
TF-A BL2 always boot at 650MHz using an algorithm to calculate PLL1
settings, without reading DT. Remove the corresponding nodes.
Change-Id: I0003337d8d37df7b2a70a84b5475f4278c4c4669
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
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| #
4391e5ed |
| 16-Aug-2022 |
Gabriel Fernandez <gabriel.fernandez@foss.st.com> |
feat(stm32mp1-fdts): new RCC DT bindings for STM32MP1
RCC bindings alignment with MP13 RCC bindings
Change-Id: I02c89accd51e4214cd009d4a9433d8d9b6aeba25
Signed-off-by: Gabriel Fernandez <gabriel.fe
feat(stm32mp1-fdts): new RCC DT bindings for STM32MP1
RCC bindings alignment with MP13 RCC bindings
Change-Id: I02c89accd51e4214cd009d4a9433d8d9b6aeba25
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
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| #
d594239d |
| 22-Feb-2022 |
Lionel Debieve <lionel.debieve@foss.st.com> |
feat(stm32mp1-fdts): move RNG1 to CSI to improve random generation
LSI was too slow to provide enough random numbers (limited
to 6ms for 16 bytes production). Switch to CSI that allow
to get the RNG
feat(stm32mp1-fdts): move RNG1 to CSI to improve random generation
LSI was too slow to provide enough random numbers (limited
to 6ms for 16 bytes production). Switch to CSI that allow
to get the RNG fifo ready in less than 50µs.
Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com>
Change-Id: I76d1fe58e2f4d5416a96f48123ae36bd82d8a8ee
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| #
e6a0994c |
| 23-Jan-2024 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes from topic "st-bsec-otp" into integration
* changes:
feat(stm32mp2-fdts): add board ID OTP in STM32MP257F-EV1
feat(stm32mp2-fdts): add OTP nodes in STM32MP251 SoC DT file
fix(stm
Merge changes from topic "st-bsec-otp" into integration
* changes:
feat(stm32mp2-fdts): add board ID OTP in STM32MP257F-EV1
feat(stm32mp2-fdts): add OTP nodes in STM32MP251 SoC DT file
fix(stm32mp2): add missing include
feat(st): do not directly call BSEC functions in common code
feat(st): use stm32_get_otp_value_from_idx() in BL31
refactor(st): update test for closed chip
refactor(st-bsec): improve BSEC driver
refactor(st): use dashes for BSEC node names
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| #
b8816d3c |
| 04-Jan-2024 |
Yann Gautier <yann.gautier@st.com> |
refactor(st): use dashes for BSEC node names
This is something commonly asked by Linux kernel DT maintainers [1].
The mentioned doc is not upstreamed, but may be checked with dtbs_check.
While at it
refactor(st): use dashes for BSEC node names
This is something commonly asked by Linux kernel DT maintainers [1].
The mentioned doc is not upstreamed, but may be checked with dtbs_check.
While at it align some nodes with Linux or OP-TEE.
[1] https://lore.kernel.org/linux-arm-kernel/20231125184422.12315-1-krzysztof.kozlowski@linaro.org/
Change-Id: I63e983c2a00eda3cd8b81c66c0cd1a97cf8249b7
Signed-off-by: Yann Gautier <yann.gautier@st.com>
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| #
c20b0c58 |
| 25-Oct-2023 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "feat(st): update STM32MP DT files" into integration
|
| #
4c8e8ea7 |
| 18-Oct-2023 |
Yann Gautier <yann.gautier@st.com> |
feat(st): update STM32MP DT files
This is an alignment with Linux DT files that have been merged in
stm32 tree [1], and will be in Linux 6.7.
The /omit-if-no-ref/ in overlay files are now removed, a
feat(st): update STM32MP DT files
This is an alignment with Linux DT files that have been merged in
stm32 tree [1], and will be in Linux 6.7.
The /omit-if-no-ref/ in overlay files are now removed, as already in
pinctrl files.
[1] https://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32.git
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: Iab94b0ba7a4a0288ca53d1ae57ab590566967415
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| #
28a8efd2 |
| 17-Jan-2023 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes from topic "st_dt_update" into integration
* changes:
refactor(stm32mp15-fdts): remove unused PMIC nodes
fix(stm32mp15-fdts): use interrupts-extended for i2c2
style(stm32mp15-fdt
Merge changes from topic "st_dt_update" into integration
* changes:
refactor(stm32mp15-fdts): remove unused PMIC nodes
fix(stm32mp15-fdts): use interrupts-extended for i2c2
style(stm32mp15-fdts): remove extra spaces on vbus
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| #
0e51db5a |
| 21-Oct-2022 |
Yann Gautier <yann.gautier@st.com> |
refactor(stm32mp15-fdts): remove unused PMIC nodes
The onkey and watchdog features of the PMIC are not used in TF-A for
STM32MP15 boards. Remove the nodes from DT.
Signed-off-by: Yann Gautier <yann
refactor(stm32mp15-fdts): remove unused PMIC nodes
The onkey and watchdog features of the PMIC are not used in TF-A for
STM32MP15 boards. Remove the nodes from DT.
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I2933e0bdc5843fcb549a817742106d9c66097869
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| #
04339c5e |
| 21-Oct-2022 |
Yann Gautier <yann.gautier@st.com> |
style(stm32mp15-fdts): remove extra spaces on vbus
Remove extra spaces before the closing brace of vbus_otg node in
stm32mp157c-ed1 DT file, before the vbus_sw label, and before the
closing brace of
style(stm32mp15-fdts): remove extra spaces on vbus
Remove extra spaces before the closing brace of vbus_otg node in
stm32mp157c-ed1 DT file, before the vbus_sw label, and before the
closing brace of vbus_sw node.
Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com>
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I2e77e0a043594876551ed8d77ed3d13f6a098c81
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| #
8a858913 |
| 07-Sep-2022 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge changes from topic "stm32mp15-dt-updates" into integration
* changes:
refactor(stm32mp15-fdts): remove timers15 node
refactor(stm32mp15-fdts): remove unused secure-status properties
refa
Merge changes from topic "stm32mp15-dt-updates" into integration
* changes:
refactor(stm32mp15-fdts): remove timers15 node
refactor(stm32mp15-fdts): remove unused secure-status properties
refactor(stm32mp15-fdts): remove RCC secure-status
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| #
0791aaf4 |
| 29-Mar-2022 |
Yann Gautier <yann.gautier@foss.st.com> |
refactor(stm32mp15-fdts): remove RCC secure-status
The RCC security is managed with a dedicated compatible:
"st,stm32mp1-rcc-secure" [1].
Remove useless secure-status property in boards rcc nodes.
refactor(stm32mp15-fdts): remove RCC secure-status
The RCC security is managed with a dedicated compatible:
"st,stm32mp1-rcc-secure" [1].
Remove useless secure-status property in boards rcc nodes.
[1] 812daf916c ("feat(st): update the security based on new compatible")
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: Iff31044ade78dd9c432120dce65375fe2b0d36d6
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| #
dfc59a7b |
| 19-Apr-2022 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes from topic "st_nvmem_layout" into integration
* changes:
refactor(stm32mp1-fdts): remove nvmem_layout node
refactor(stm32mp1): drop the "st,stm32-nvmem-layout" node
refactor(st):
Merge changes from topic "st_nvmem_layout" into integration
* changes:
refactor(stm32mp1-fdts): remove nvmem_layout node
refactor(stm32mp1): drop the "st,stm32-nvmem-layout" node
refactor(st): remove useless includes
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| #
578a4795 |
| 04-Mar-2022 |
Patrick Delaunay <patrick.delaunay@foss.st.com> |
refactor(stm32mp1-fdts): remove nvmem_layout node
Remove the nvmem_layout node with compatible "st,stm32-nvmem-layout"
no more used in TF-A code to simplify the device tree.
Signed-off-by: Patrick
refactor(stm32mp1-fdts): remove nvmem_layout node
Remove the nvmem_layout node with compatible "st,stm32-nvmem-layout"
no more used in TF-A code to simplify the device tree.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: I3748b20b7d3c60ee64ead15541fac1fd12656600
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| #
884a6506 |
| 31-Jan-2022 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge changes from topic "st-nvmem" into integration
* changes:
feat(stm32mp1): manage monotonic counter
feat(stm32mp1): new way to access platform OTP
feat(stm32mp1-fdts): update NVMEM nodes
Merge changes from topic "st-nvmem" into integration
* changes:
feat(stm32mp1): manage monotonic counter
feat(stm32mp1): new way to access platform OTP
feat(stm32mp1-fdts): update NVMEM nodes
refactor(st-drivers): improve BSEC driver
feat(stm32mp1-fdts): add nvmem_layout node and OTP definitions
feat(stm32mp1): add NVMEM layout compatibility definition
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| #
375b79bb |
| 10-Sep-2019 |
Nicolas Le Bayon <nicolas.le.bayon@st.com> |
feat(stm32mp1-fdts): update NVMEM nodes
Set non-secure property on platform secure OTP nodes that non-secure
world is allowed to access through secure world services.
These are the SoC MAC address a
feat(stm32mp1-fdts): update NVMEM nodes
Set non-secure property on platform secure OTP nodes that non-secure
world is allowed to access through secure world services.
These are the SoC MAC address and the ST boards board_id OTPs.
Most of these were already done but it was missing for ED1 board.
Change-Id: Idfa6322d9d5c35285706d0b2d32ae09af38684a7
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
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| #
ff8767cb |
| 25-Sep-2020 |
Nicolas Le Bayon <nicolas.le.bayon@st.com> |
feat(stm32mp1-fdts): add nvmem_layout node and OTP definitions
A new nvmem_layout node includes nvmem platform-dependent layout
information, such as OTP NVMEM cell lists (phandle, name).
This list a
feat(stm32mp1-fdts): add nvmem_layout node and OTP definitions
A new nvmem_layout node includes nvmem platform-dependent layout
information, such as OTP NVMEM cell lists (phandle, name).
This list allows easy access to OTP offsets defined in BSEC node,
where more OTP definitions with offsets in bytes and length have
been added (replace hard-coded values).
Each board may redefine this list, especially for board_id info.
Change-Id: I910ae671b3bf3320ee6500fecc9ec335ae67bbda
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
Signed-off-by: Yann Gautier <yann.gautier@st.com>
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| #
93b153b5 |
| 23-Dec-2021 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge changes from topic "st_regulator" into integration
* changes:
feat(st-sdmmc2): manage cards power cycle
feat(stm32mp1): register fixed regulator
feat(st-drivers): introduce fixed regulat
Merge changes from topic "st_regulator" into integration
* changes:
feat(st-sdmmc2): manage cards power cycle
feat(stm32mp1): register fixed regulator
feat(st-drivers): introduce fixed regulator driver
refactor(st): update CPU and VDD voltage get
refactor(stm32mp1-fdts): update regulator description
refactor(st-pmic): use regulator framework for DDR init
feat(st-pmic): register the PMIC to regulator framework
refactor(st-pmic): split initialize_pmic()
feat(stm32mp1): add regulator framework compilation
feat(regulator): add a regulator framework
feat(stpmic1): add new services
feat(stpmic1): add USB OTG regulators
refactor(st-pmic): improve driver usage
refactor(stpmic1): set stpmic1_is_regulator_enabled() as boolean
refactor(stm32mp1): re-order drivers init
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| #
67d95409 |
| 07-Jan-2021 |
Pascal Paillet <p.paillet@st.com> |
refactor(stm32mp1-fdts): update regulator description
Update regulator description to match with pmic driver updates.
vref_ddr does not support over-current protection.
vtt_ddr is set to sink source
refactor(stm32mp1-fdts): update regulator description
Update regulator description to match with pmic driver updates.
vref_ddr does not support over-current protection.
vtt_ddr is set to sink source mode.
Change-Id: I725f35b091ca8c230994c2b5f81693ebc97bf4aa
Signed-off-by: Pascal Paillet <p.paillet@st.com>
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
show more ...
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