Merge "docs(versal): update custom SIP service" into integration

docs(versal): update custom SIP service

Correct the platform-specific custom SiP service doc
VERSAL_SIP_SVC_CUSTOM to use the common SOC_SIP_SVC_CUSTOM.

Change-Id: Iab75295432aec1329d3aa69f30897c8a

docs(versal): update custom SIP service

Correct the platform-specific custom SiP service doc
VERSAL_SIP_SVC_CUSTOM to use the common SOC_SIP_SVC_CUSTOM.

Change-Id: Iab75295432aec1329d3aa69f30897c8aaa5a7b9e
Signed-off-by: Prasad Kummari <prasad.kummari@amd.com>

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Merge changes from topic "xlnx_versal_custom_sip" into integration

* changes:
feat(versal): add hooks for mmap and early setup
refactor(zynqmp): refactor custom sip service

feat(versal): add hooks for mmap and early setup

Add early setup hooks through custom_early_setup() and provide a
mechanism to support custom memory mapping, including the extension
of the memory ma

feat(versal): add hooks for mmap and early setup

Add early setup hooks through custom_early_setup() and provide a
mechanism to support custom memory mapping, including the extension
of the memory map via custom_mmap_add(). This change may also
require alignment of the MAX_XLAT_TABLE and MAX_XLAT_TABLES macros.
These can be defined within the custom_pkg.mk makefile as follows:

MAX_MMAP_REGIONS := XY
$(eval $(call add_define,MAX_MMAP_REGIONS))
MAX_XLAT_TABLES := XZ
$(eval $(call add_define,MAX_XLAT_TABLES))

If PLATFORM_STACK_SIZE is not already defined, a default value
should be used. This allows for configurability of the stack size
across different interfaces, such as custom packages. The
custom_early_setup() function enables early low-level operations
to bring the system into a correct state. Support for a custom
SiP service is also added. A basic implementation of
custom_smc_handler() is provided by the platform, while the actual
definition is expected to be supplied by the custom package. This
feature is designed for use by external libraries, such as those
that require status checking. This code introduces a generic
framework for integrating custom logic via the
$(CUSTOM_PKG_PATH)/custom_pkg.mk makefile, including
optional support for custom SMC functionality, which is determined
by the custom package.

Change-Id: If9107b32c8c1ca4026d0a2980901e841fc6e03f7
Signed-off-by: Prasad Kummari <prasad.kummari@amd.com>

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Merge "feat(versal): deprecate build time arg VERSAL_PLATFORM" into integration

Merge changes from topic "xlnx_tfa_passthrough_plm_ipi_cmd" into integration

* changes:
docs(xilinx): update SMC documentation in TF-A
feat(xilinx): add feature check function for TF-A specific

Merge changes from topic "xlnx_tfa_passthrough_plm_ipi_cmd" into integration

* changes:
docs(xilinx): update SMC documentation in TF-A
feat(xilinx): add feature check function for TF-A specific APIs
feat(xilinx): update SiP SVC version number
feat(xilinx): update TF-A to passthrough all PLM commands
fix(xilinx): fix logic to read ipi response

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docs(xilinx): update SMC documentation in TF-A

Updated documentation for new SMC SiP calling conventions for Platform
Management specific SiP Service calls.

Signed-off-by: Jay Buddhabhatti <jay.bud

docs(xilinx): update SMC documentation in TF-A

Updated documentation for new SMC SiP calling conventions for Platform
Management specific SiP Service calls.

Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
Change-Id: Iee09d3d843c6bb3f82aad6df703542ba1eb63c6c

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feat(versal): deprecate build time arg VERSAL_PLATFORM

Update Versal platform to enable runtime detection of variants instead
of relying on the build argument VERSAL_PLATFORM.
Integrate functionalit

feat(versal): deprecate build time arg VERSAL_PLATFORM

Update Versal platform to enable runtime detection of variants instead
of relying on the build argument VERSAL_PLATFORM.
Integrate functionality for identifying the board variant during
runtime, allowing dynamic adjustment of CPU and UART clock values
accordingly.
Print the runtime board information during boot.
This advancement streamlines the build process by eliminating
dependencies on variant-specific builds, enabling the use of a single
binary for multiple variants.
Removing all the platform related constants for versal_virt,SPP,EMU as
they are not used.

Change-Id: I8c1a1d391bd1a8971addc1f56f8309a3fb75aa6d
Signed-off-by: Amey Avinash Raghatate <AmeyAvinash.Raghatate@amd.com>
Signed-off-by: Maheedhar Bollapalli <MaheedharSai.Bollapalli@amd.com>

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Merge changes from topic "xlnx_smc_doc" into integration

* changes:
docs(versal-net): update SMC convention
docs(versal): update SMC convention
docs(zynqmp): update SMC convention

docs(versal): update SMC convention

Updated documentation for SMC SiP calling conventions for IPI,
PM, and SiP Service queries.

Signed-off-by: Prasad Kummari <prasad.kummari@amd.com>
Change-Id: Ic2

docs(versal): update SMC convention

Updated documentation for SMC SiP calling conventions for IPI,
PM, and SiP Service queries.

Signed-off-by: Prasad Kummari <prasad.kummari@amd.com>
Change-Id: Ic232551bb09152124da5226673c88e1a34a384c4

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Merge changes from topic "idling-during-subsystem-restart" into integration

* changes:
fix(xilinx): add console_flush() before shutdown
fix(xilinx): fix sending sgi to linux
feat(xilinx): add

Merge changes from topic "idling-during-subsystem-restart" into integration

* changes:
fix(xilinx): add console_flush() before shutdown
fix(xilinx): fix sending sgi to linux
feat(xilinx): add new state to identify cpu power down
feat(xilinx): request cpu power down from reset
feat(xilinx): power down all cores on receiving cpu pwrdwn req
feat(xilinx): add handler for power down req sgi irq
feat(xilinx): add wrapper to handle cpu power down req
fix(versal-net): use arm common GIC handlers
fix(xilinx): rename macros to align with ARM

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feat(xilinx): add handler for power down req sgi irq

On receiving CPU power down callback, TF-A raises SGI interrupt to all active
cores to power down each active cores. Add handler for this SGI IRQ

feat(xilinx): add handler for power down req sgi irq

On receiving CPU power down callback, TF-A raises SGI interrupt to all active
cores to power down each active cores. Add handler for this SGI IRQ.

By default TF-A uses SGI 6 for CPU power down request. This can be
configurable through CPU_PWRDWN_SGI build flag.

e.g., If user wants to use SGI 7 instead of SGI 6 then provide build
flag CPU_PWRDWN_SGI=7

Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
Change-Id: Id0df32187d1de3f0af4486eb4d4930cb3ab01dbd

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Merge changes from topic "xlnx_enable_errata" into integration

* changes:
docs(versal): add ERRATA_ABI_SUPPORT build documentation
feat(versal): enable errata management feature

docs(versal): add ERRATA_ABI_SUPPORT build documentation

Add information about Versal platform for ERRATA_ABI_SUPPORT and
provide the build commands.

Signed-off-by: Prasad Kummari <prasad.kummari@a

docs(versal): add ERRATA_ABI_SUPPORT build documentation

Add information about Versal platform for ERRATA_ABI_SUPPORT and
provide the build commands.

Signed-off-by: Prasad Kummari <prasad.kummari@amd.com>
Change-Id: I8466ea446814f888ae56f5cbb7bbdc06099d54f8

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Merge changes from topic "xlnx_tsp_feat" into integration

* changes:
docs(versal-net): add TSP build documentation
docs(versal): add TSP build documentation
feat(versal-net): add tsp support

Merge changes from topic "xlnx_tsp_feat" into integration

* changes:
docs(versal-net): add TSP build documentation
docs(versal): add TSP build documentation
feat(versal-net): add tsp support
feat(versal): add tsp support
refactor(xilinx): add generic TSP makefile
chore(zynqmp): reorganize tsp code into common path
refactor(xilinx): rename platform function to generic name

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docs(versal): add TSP build documentation

Add information about Versal platform for TSP and provide
the build commands.

Change-Id: I7106ab477a881c58e1c45863bd6854d188982282
Signed-off-by: Prasad Ku

docs(versal): add TSP build documentation

Add information about Versal platform for TSP and provide
the build commands.

Change-Id: I7106ab477a881c58e1c45863bd6854d188982282
Signed-off-by: Prasad Kummari <prasad.kummari@amd.com>

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Merge "docs(versal): fix the versal platform emu name" into integration

docs(versal): fix the versal platform emu name

Fix the versal platform emu itr6 name.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Change-Id: Id9f3272c85513d8258fbbb3bd71

docs(versal): fix the versal platform emu name

Fix the versal platform emu itr6 name.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Change-Id: Id9f3272c85513d8258fbbb3bd719c032053b3ada

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Merge "feat(xilinx): add SPP/EMU platform support for versal" into integration

feat(xilinx): add SPP/EMU platform support for versal

This patch adds SPP/EMU platform support for Xilinx Versal and
also updating the documentation.

Signed-off-by: Venkatesh Yadav Abbarapu <venkat

feat(xilinx): add SPP/EMU platform support for versal

This patch adds SPP/EMU platform support for Xilinx Versal and
also updating the documentation.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Change-Id: Ibdadec4d00cd33ea32332299e7a00de31dc9d60b

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Merge "feat(plat/versal): add support for SLS mitigation" into integration

feat(plat/versal): add support for SLS mitigation

This patch adds the option HARDEN_SLS_ALL that can be used to enable
the -mharden-sls=all, which mitigates the straight-line speculation
vulnerabili

feat(plat/versal): add support for SLS mitigation

This patch adds the option HARDEN_SLS_ALL that can be used to enable
the -mharden-sls=all, which mitigates the straight-line speculation
vulnerability. Enable this by adding the option HARDEN_SLS_ALL=1,
default this will be disabled.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Change-Id: I0d498d9e96903fcb879993ad491949f6f17769b2

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Merge changes from topic "dcc_console" into integration

* changes:
plat:xilinx:versal: Add JTAG DCC support
plat:xilinx:zynqmp: Add JTAG DCC support
drivers: dcc: Support JTAG DCC console

plat:xilinx:versal: Add JTAG DCC support

As per the new multi-console framework, updating the JTAG DCC support.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Acked-by: Mic

plat:xilinx:versal: Add JTAG DCC support

As per the new multi-console framework, updating the JTAG DCC support.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Change-Id: I77994ce387caf0d695986df3d01d414a920978d0

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Merge "xilinx: versal: PLM to ATF handover" into integration