| #
7303319b |
| 08-Nov-2025 |
Chris Kay <chris.kay@arm.com> |
Merge changes from topic "NUMA_AWARE_PER_CPU" into integration
* changes: docs(maintainers): add per-cpu framework into maintainers.rst feat(per-cpu): add documentation for per-cpu framework f
Merge changes from topic "NUMA_AWARE_PER_CPU" into integration
* changes: docs(maintainers): add per-cpu framework into maintainers.rst feat(per-cpu): add documentation for per-cpu framework feat(rdv3): enable numa aware per-cpu for RD-V3-Cfg2 feat(per-cpu): migrate amu_ctx to per-cpu framework feat(per-cpu): migrate spm_core_context to per-cpu framework feat(per-cpu): migrate psci_ns_context to per-cpu framework feat(per-cpu): migrate psci_cpu_pd_nodes to per-cpu framework feat(per-cpu): migrate rmm_context to per-cpu framework feat(per-cpu): integrate per-cpu framework into BL31/BL32 feat(per-cpu): introduce framework accessors/definers feat(per-cpu): introduce linker changes for NUMA aware per-cpu framework docs(changelog): add scope for per-cpu framework
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| #
b92586ab |
| 24-May-2025 |
Sammit Joshi <sammit.joshi@arm.com> |
feat(per-cpu): add documentation for per-cpu framework
add documentation for numa aware per-cpu framework.
Signed-off-by: Rohit Mathew <rohit.mathew@arm.com> Signed-off-by: Sammit Joshi <sammit.jos
feat(per-cpu): add documentation for per-cpu framework
add documentation for numa aware per-cpu framework.
Signed-off-by: Rohit Mathew <rohit.mathew@arm.com> Signed-off-by: Sammit Joshi <sammit.joshi@arm.com> Change-Id: Ibd39adea95aa24abb588ff518547bdc1ec46b0fe
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| #
23fc05a3 |
| 10-May-2024 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "docs(context-mgmt): add documentation for context management library" into integration
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| #
4efd2193 |
| 30-Oct-2023 |
Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com> |
docs(context-mgmt): add documentation for context management library
This patch adds some documentation for the context management library. It mainly covers the design at a higher level, with more f
docs(context-mgmt): add documentation for context management library
This patch adds some documentation for the context management library. It mainly covers the design at a higher level, with more focus on the cold boot and warm boot entries as well as the operations involved during context switch. Further it also includes a section on feature enablement for individual world contexts.
Change-Id: I77005730f4df7f183f56a2c6dd04f6362e813c07 Signed-off-by: Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com>
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| #
15dfbdfc |
| 07-May-2024 |
Manish V Badarkhe <manish.badarkhe@arm.com> |
Merge changes from topic "gr/smccc-updates" into integration
* changes: refactor(smccc): refactor vendor-el3 build refactor(docs): added versioning to smccc services feat((smccc): add version
Merge changes from topic "gr/smccc-updates" into integration
* changes: refactor(smccc): refactor vendor-el3 build refactor(docs): added versioning to smccc services feat((smccc): add version FID for PMF refactor(smccc): move pmf to vendor el3 calls refactor(smccc): move debugfs to vendor el3 calls feat(smccc): add vendor-specific el3 service feat(smccc): add vendor specific el3 id
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| #
273b8983 |
| 07-Mar-2024 |
Govindraj Raja <govindraj.raja@arm.com> |
refactor(smccc): move debugfs to vendor el3 calls
Move debugfs to Vendor-Specific EL3 Monitor Service Calls. Function Identifier for Vendor-Specific EL3 Monitor Service is '7' and allocated subrange
refactor(smccc): move debugfs to vendor el3 calls
Move debugfs to Vendor-Specific EL3 Monitor Service Calls. Function Identifier for Vendor-Specific EL3 Monitor Service is '7' and allocated subranges of Function identifiers to different services are:
0x87000000-0x8700FFFF-SMC32: Vendor-Specific EL3 Monitor Service Calls 0xC7000000-0xC700FFFF-SMC64: Vendor-Specific EL3 Monitor Service Calls
Amend Debugfs FID's to use this range and id.
Add a deprecation notice to inform debugfs moved from arm-sip range to Vendor-Specific EL3 range. Debugfs support from arm-sip range will be removed and will not be available after TF-A 2.12 release.
Reference to debugfs component level documentation: https://trustedfirmware-a.readthedocs.io/en/latest/components/debugfs-design.html#overview
Change-Id: I97a50170178f361f70c95ed0049bc4e278de59d7 Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>
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| #
de6b79d8 |
| 23-Feb-2024 |
Govindraj Raja <govindraj.raja@arm.com> |
feat(smccc): add vendor-specific el3 service
Add support for vendor-specific el3 service. SMCCC 1.5 introduces support for vendor-specific EL3 monitor calls.
SMCCC Documentation reference: https://
feat(smccc): add vendor-specific el3 service
Add support for vendor-specific el3 service. SMCCC 1.5 introduces support for vendor-specific EL3 monitor calls.
SMCCC Documentation reference: https://developer.arm.com/docs/den0028/latest
Change-Id: Id8bc43842eecdb7a8a2ec7f31a631e88fe4fe0b4 Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>
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| #
71061819 |
| 16-Nov-2022 |
Manish V Badarkhe <manish.badarkhe@arm.com> |
Merge changes If90a18ee,I02e88f8c,Iea447fb5,Ie0570481,Ieeb14cfc into integration
* changes: docs: add top level section numbering docs(build): clarify getting started section docs(build): clar
Merge changes If90a18ee,I02e88f8c,Iea447fb5,Ie0570481,Ieeb14cfc into integration
* changes: docs: add top level section numbering docs(build): clarify getting started section docs(build): clarify docs building instructions fix(docs): prevent a sphinx warning fix(docs): prevent a virtual environment from failing a build
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| #
c65bf2d1 |
| 27-Oct-2022 |
Boyan Karatotev <boyan.karatotev@arm.com> |
docs: add top level section numbering
Top level sections are not numbered. Adding numbers makes referring to sections easier. For example the Maintainers page changes from "about/3.1" to simply "1.3
docs: add top level section numbering
Top level sections are not numbered. Adding numbers makes referring to sections easier. For example the Maintainers page changes from "about/3.1" to simply "1.3.1".
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com> Change-Id: If90a18ee8d6a6858d58f0687f31ea62b69399e04
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| #
77a53b8f |
| 28-Oct-2022 |
Olivier Deprez <olivier.deprez@arm.com> |
Merge changes from topic "ffa_el3_spmc" into integration
* changes: docs(spm): add threat model for el3 spmc docs(spm): add design documentation
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| #
4090ac33 |
| 20-Sep-2022 |
Shruti Gupta <shruti.gupta@arm.com> |
docs(spm): add design documentation
Add documentation how to build EL3 SPMC, briefly describes all FF-A interfaces, SP boot flow, SP Manifest, Power Management, Boot Info Protocol, Runtime model and
docs(spm): add design documentation
Add documentation how to build EL3 SPMC, briefly describes all FF-A interfaces, SP boot flow, SP Manifest, Power Management, Boot Info Protocol, Runtime model and state transition and Interrupt Handling.
Signed-off-by: Shruti Gupta <shruti.gupta@arm.com> Change-Id: I630df1d50a4621b344a09e462563eacc90109de4
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| #
717daadc |
| 05-Jul-2022 |
Soby Mathew <soby.mathew@arm.com> |
Merge changes from topic "jas/rmm-el3-ifc" into integration
* changes: docs(rmmd): document EL3-RMM Interfaces feat(rmmd): add support to create a boot manifest fix(rme): use RMM shared buffer
Merge changes from topic "jas/rmm-el3-ifc" into integration
* changes: docs(rmmd): document EL3-RMM Interfaces feat(rmmd): add support to create a boot manifest fix(rme): use RMM shared buffer for attest SMCs feat(rmmd): add support for RMM Boot interface
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| #
69447290 |
| 07-Apr-2022 |
Javier Almansa Sobrino <javier.almansasobrino@arm.com> |
docs(rmmd): document EL3-RMM Interfaces
This patch documents the RMM-EL3 Boot and runtime interfaces.
Note that for the runtime interfaces, some services are not documented in this patch and will b
docs(rmmd): document EL3-RMM Interfaces
This patch documents the RMM-EL3 Boot and runtime interfaces.
Note that for the runtime interfaces, some services are not documented in this patch and will be added on a later doc patch.
These services are:
* RMMD_GTSI_DELEGATE * RMMD_GTSI_UNDELEGATE * RMMD_RMI_REQ_COMPLETE
Signed-off-by: Javier Almansa Sobrino <javier.almansasobrino@arm.com> Change-Id: I8fcc89d91fe5a334c2f68c6bfd1fd672a8738b5c
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| #
7048400a |
| 01-Jun-2022 |
Joanna Farley <joanna.farley@arm.com> |
Merge changes from topic "od/spm-doc-update" into integration
* changes: docs(spm): refresh FF-A SPM design doc docs(spm): update FF-A manifest binding
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| #
9eea92a1 |
| 28-Apr-2022 |
Olivier Deprez <olivier.deprez@arm.com> |
docs(spm): refresh FF-A SPM design doc
- Move manifest binding doc as a dedicated SPM doc section. - Highlight introduction of an EL3 FF-A SPM solution. - Refresh TF-A build options. - Refresh PE MM
docs(spm): refresh FF-A SPM design doc
- Move manifest binding doc as a dedicated SPM doc section. - Highlight introduction of an EL3 FF-A SPM solution. - Refresh TF-A build options. - Refresh PE MMU configuration section. - Add arch extensions for security hardening section. - Minor corrections, typos fixes and rephrasing.
Signed-off-by: Olivier Deprez <olivier.deprez@arm.com> Change-Id: I2db06c140ef5871a812ce00a4398c663d5433bb4
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| #
55b2e6f0 |
| 16-Nov-2021 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes I9e6feeee,If1cd7962 into integration
* changes: docs(rme): add description of TF-A changes for RME docs(gpt): add documentation page for GPT library
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| #
6ee92598 |
| 25-Aug-2021 |
johpow01 <john.powell@arm.com> |
docs(gpt): add documentation page for GPT library
This patch adds some documentation for the GPT library as well as adds code owners for it.
Signed-off-by: John Powell <john.powell@arm.com> Change-
docs(gpt): add documentation page for GPT library
This patch adds some documentation for the GPT library as well as adds code owners for it.
Signed-off-by: John Powell <john.powell@arm.com> Change-Id: If1cd79626eadb27e1024d731b26ee2e20af74a66
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| #
e33ca7b4 |
| 29-Oct-2021 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes from topic "ck/mpmm" into integration
* changes: docs(maintainers): add Chris Kay to AMU and MPMM feat(tc): enable MPMM feat(mpmm): add support for MPMM feat(amu): enable per-c
Merge changes from topic "ck/mpmm" into integration
* changes: docs(maintainers): add Chris Kay to AMU and MPMM feat(tc): enable MPMM feat(mpmm): add support for MPMM feat(amu): enable per-core AMU auxiliary counters docs(amu): add AMU documentation refactor(amu): refactor enablement and context switching refactor(amu): detect auxiliary counters at runtime refactor(amu): detect architected counters at runtime refactor(amu): conditionally compile auxiliary counter support refactor(amu): factor out register accesses refactor(amu)!: privatize unused AMU APIs refactor(amu)!: remove `PLAT_AMU_GROUP1_COUNTERS_MASK` build(amu): introduce `amu.mk` build(fconf)!: clean up source collection feat(fdt-wrappers): add CPU enumeration utility function build(fdt-wrappers): introduce FDT wrappers makefile build(bl2): deduplicate sources build(bl1): deduplicate sources
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| #
68120783 |
| 05-May-2021 |
Chris Kay <chris.kay@arm.com> |
feat(mpmm): add support for MPMM
MPMM - the Maximum Power Mitigation Mechanism - is an optional microarchitectural feature present on some Armv9-A cores, introduced with the Cortex-X2, Cortex-A710 a
feat(mpmm): add support for MPMM
MPMM - the Maximum Power Mitigation Mechanism - is an optional microarchitectural feature present on some Armv9-A cores, introduced with the Cortex-X2, Cortex-A710 and Cortex-A510 cores.
MPMM allows the SoC firmware to detect and limit high activity events to assist in SoC processor power domain dynamic power budgeting and limit the triggering of whole-rail (i.e. clock chopping) responses to overcurrent conditions.
This feature is enabled via the `ENABLE_MPMM` build option. Configuration can be done via FCONF by enabling `ENABLE_MPMM_FCONF`, or by via the plaform-implemented `plat_mpmm_topology` function.
Change-Id: I77da82808ad4744ece8263f0bf215c5a091c3167 Signed-off-by: Chris Kay <chris.kay@arm.com>
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| #
9cf75647 |
| 17-Aug-2021 |
Chris Kay <chris.kay@arm.com> |
docs(amu): add AMU documentation
This change adds some documentation on the AMU and its purpose. This is expanded on in later patches.
Change-Id: If2834676790938d8da5ea2ceba37b674f6cc0f01 Signed-of
docs(amu): add AMU documentation
This change adds some documentation on the AMU and its purpose. This is expanded on in later patches.
Change-Id: If2834676790938d8da5ea2ceba37b674f6cc0f01 Signed-off-by: Chris Kay <chris.kay@arm.com>
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| #
1d651211 |
| 06-Oct-2021 |
Soby Mathew <soby.mathew@arm.com> |
Merge changes from topic "za/feat_rme" into integration
* changes: refactor(gpt): productize and refactor GPT library feat(rme): disable Watchdog for Arm platforms if FEAT_RME enabled docs(rme
Merge changes from topic "za/feat_rme" into integration
* changes: refactor(gpt): productize and refactor GPT library feat(rme): disable Watchdog for Arm platforms if FEAT_RME enabled docs(rme): add build and run instructions for FEAT_RME fix(plat/fvp): bump BL2 stack size fix(plat/fvp): allow changing the kernel DTB load address refactor(plat/arm): rename ARM_DTB_DRAM_NS region macros refactor(plat/fvp): update FVP platform DTS for FEAT_RME feat(plat/arm): add GPT initialization code for Arm platforms feat(plat/fvp): add memory map for FVP platform for FEAT_RME refactor(plat/arm): modify memory region attributes to account for FEAT_RME feat(plat/fvp): add RMM image support for FVP platform feat(rme): add GPT Library feat(rme): add ENABLE_RME build option and support for RMM image refactor(makefile): remove BL prefixes in build macros feat(rme): add context management changes for FEAT_RME feat(rme): add Test Realm Payload (TRP) feat(rme): add RMM dispatcher (RMMD) feat(rme): run BL2 in root world when FEAT_RME is enabled feat(rme): add xlat table library changes for FEAT_RME feat(rme): add Realm security state definition feat(rme): add register definitions and helper functions for FEAT_RME
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| #
3cfa3497 |
| 26-Aug-2021 |
Zelalem Aweke <zelalem.aweke@arm.com> |
docs(rme): add build and run instructions for FEAT_RME
This patch adds instructions on how to build and run TF-A with FEAT_RME enabled. The patch also adds code owners for FEAT_RME.
Signed-off-by:
docs(rme): add build and run instructions for FEAT_RME
This patch adds instructions on how to build and run TF-A with FEAT_RME enabled. The patch also adds code owners for FEAT_RME.
Signed-off-by: Zelalem Aweke <zelalem.aweke@arm.com> Change-Id: Id16dc52cb76b1ea56ac5c3fc38cb0794a62ac2a1
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| #
5c3bcfcd |
| 30-Apr-2021 |
Olivier Deprez <olivier.deprez@arm.com> |
Merge "docs: remove PSA wording for SPM chapters" into integration
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| #
1b17f4f1 |
| 21-Apr-2021 |
Olivier Deprez <olivier.deprez@arm.com> |
docs: remove PSA wording for SPM chapters
PSA wording is not longer associated with FF-A.
Change-Id: Id7c53b9c6c8f383543f6a32a15eb15b7749d8658 Signed-off-by: Olivier Deprez <olivier.deprez@arm.com>
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| #
833abc61 |
| 29-Jul-2020 |
joanna.farley <joanna.farley@arm.com> |
Merge "doc: secure partition manager design" into integration
|