History log of /rk3399_ARM-atf/docs/about/maintainers.rst (Results 151 – 175 of 245)
Revision Date Author Comments
# e61c00fa 26-Apr-2022 Joanna Farley <joanna.farley@arm.com>

Merge "docs(intel): add Sieu Mun and Benjamin Jit Loon as maintainers" into integration


# 5ca81820 19-Mar-2022 Sieu Mun Tang <sieu.mun.tang@intel.com>

docs(intel): add Sieu Mun and Benjamin Jit Loon as maintainers

Add Sieu Mun Tang and Benjamin Jit Loon Lim as new
Intel SocFPGA platform maintainers and remove the
rest of the Intel SocFPGA platform

docs(intel): add Sieu Mun and Benjamin Jit Loon as maintainers

Add Sieu Mun Tang and Benjamin Jit Loon Lim as new
Intel SocFPGA platform maintainers and remove the
rest of the Intel SocFPGA platform maintainers.

Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Change-Id: Ieb9a35e278d70a12351aaccab90ddc7be09dc861

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# 2ea18c7d 28-Mar-2022 Joanna Farley <joanna.farley@arm.com>

Merge changes from topics "ls1088a", "ls1088a-prepare" into integration

* changes:
docs(layerscape): add ls1088a soc and board support
feat(ls1088aqds): add ls1088aqds board support
feat(ls108

Merge changes from topics "ls1088a", "ls1088a-prepare" into integration

* changes:
docs(layerscape): add ls1088a soc and board support
feat(ls1088aqds): add ls1088aqds board support
feat(ls1088ardb): add ls1088ardb board support
feat(ls1088a): add new SoC platform ls1088a
build(changelog): add new scopes for ls1088a
feat(bl2): add support to separate no-loadable sections
refactor(layerscape): refine comparison of inerconnection
feat(layerscape): add soc helper macro definition for chassis 3
feat(nxp-gic): add some macros definition for gicv3
feat(layerscape): add CHASSIS 3 support for tbbr
feat(layerscape): define more chassis 3 hardware address
feat(nxp-crypto): add chassis 3 support
feat(nxp-dcfg): add Chassis 3 support
feat(lx2): enable DDR erratas for lx2 platforms
feat(layerscape): print DDR errata information
feat(nxp-ddr): add workaround for errata A050958
feat(layerscape): add new soc errata a010539 support
feat(layerscape): add new soc errata a009660 support
feat(nxp-ddr): add rawcard 1F support
fix(layerscape): fix build issue of mmap_add_ddr_region_dynamically
fix(nxp-tools): fix create_pbl print log
build(changelog): add new scopes for NXP driver

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# 869dd20f 28-Mar-2022 Manish Pandey <manish.pandey2@arm.com>

Merge "docs(maintainers): add the new maintainer for MediaTek SoCs" into integration


# 933bf32c 28-Mar-2022 Rex-BC Chen <rex-bc.chen@mediatek.com>

docs(maintainers): add the new maintainer for MediaTek SoCs

Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Change-Id: Ia9409127e91e55726db0856e3f13f009d3c7c866


# 6e4e294a 24-Feb-2022 Jiafei Pan <Jiafei.Pan@nxp.com>

docs(layerscape): add ls1088a soc and board support

Update document for nxp-layerscape to add ls1088a SoC and ls1088ardb,
update maintainer of ls1088a platforms.

Signed-off-by: Jiafei Pan <Jiafei.P

docs(layerscape): add ls1088a soc and board support

Update document for nxp-layerscape to add ls1088a SoC and ls1088ardb,
update maintainer of ls1088a platforms.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: Ic7fdc7b1bbf22e50646991093366a88ee523ffe3

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# 1cfe4896 07-Mar-2022 Madhukar Pappireddy <madhukar.pappireddy@arm.com>

Merge "docs(maintainers): add maintained files for MediaTek SoCs" into integration


# 44cf2b1a 04-Mar-2022 Rex-BC Chen <rex-bc.chen@mediatek.com>

docs(maintainers): add maintained files for MediaTek SoCs

Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Change-Id: I2d71b2fef2f2aee507a6e7c4b9b9d8175446a0ca


# 1b33b58b 17-Feb-2022 Madhukar Pappireddy <madhukar.pappireddy@arm.com>

Merge changes from topic "ls1046a" into integration

* changes:
docs(layerscape): add ls1046a soc and board support
feat(ls1046aqds): add board ls1046aqds support
feat(ls1046afrwy): add ls1046a

Merge changes from topic "ls1046a" into integration

* changes:
docs(layerscape): add ls1046a soc and board support
feat(ls1046aqds): add board ls1046aqds support
feat(ls1046afrwy): add ls1046afrwy board support
feat(ls1046ardb): add ls1046ardb board support
feat(ls1046a): add new SoC platform ls1046a
fix(nxp-tools): fix tool location path for byte_swape
fix(nxp-qspi): fix include path for QSPI driver
build(changelog): add new scopes for NXP layerscape platforms

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# 24872370 15-Feb-2022 Madhukar Pappireddy <madhukar.pappireddy@arm.com>

Merge changes from topic "ea/corstone1000" into integration

* changes:
feat(corstone1000): identify bank to load fip
fix(corstone1000): change base address of FIP in the flash
feat(corstone100

Merge changes from topic "ea/corstone1000" into integration

* changes:
feat(corstone1000): identify bank to load fip
fix(corstone1000): change base address of FIP in the flash
feat(corstone1000): implement platform specific psci reset
feat(corstone1000): made changes to accommodate 3MB for optee
build(corstone1000): rename diphda to corstone1000

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# a3aeb4c8 28-Jan-2022 Jiafei Pan <Jiafei.Pan@nxp.com>

docs(layerscape): add ls1046a soc and board support

Update document for nxp-layerscape to add ls1046a SoC and ls1046ardb,
ls1046afrwy board support.

Also update maintainer of ls1046a platforms.

Si

docs(layerscape): add ls1046a soc and board support

Update document for nxp-layerscape to add ls1046a SoC and ls1046ardb,
ls1046afrwy board support.

Also update maintainer of ls1046a platforms.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I522f978bc93aa8d1f1d60fa8efef392b7d854df7

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# 0260eb0d 19-Jan-2022 Vishnu Banavath <vishnu.banavath@arm.com>

build(corstone1000): rename diphda to corstone1000

diphda platform is now being renamed to corstone1000.
These changes are to replace all the instances and traces
of diphda corstone1000.

Change-Id

build(corstone1000): rename diphda to corstone1000

diphda platform is now being renamed to corstone1000.
These changes are to replace all the instances and traces
of diphda corstone1000.

Change-Id: I330f3a112d232b99b4721b6bf0236253b068dbba
Signed-off-by: Arpita S.K <Arpita.S.K@arm.com>
Signed-off-by: Vishnu Banavath <vishnu.banavath@arm.com>

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# e0a6a512 03-Feb-2022 Manish Pandey <manish.pandey2@arm.com>

Merge changes from topic "msm8916" into integration

* changes:
feat(msm8916): allow booting secondary CPU cores
feat(msm8916): setup hardware for non-secure world
feat(gic): allow overriding G

Merge changes from topic "msm8916" into integration

* changes:
feat(msm8916): allow booting secondary CPU cores
feat(msm8916): setup hardware for non-secure world
feat(gic): allow overriding GICD_PIDR2_GICV2 address
feat(msm8916): initial platform port
docs(msm8916): new port for Qualcomm Snapdragon 410

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# fa145398 01-Dec-2021 Stephan Gerhold <stephan@gerhold.net>

docs(msm8916): new port for Qualcomm Snapdragon 410

The Qualcomm Snapdragon 410 is Qualcomm's first 64-bit SoC, released
in 2014 with four ARM Cortex-A53 cores. There are differents variants
(MSM891

docs(msm8916): new port for Qualcomm Snapdragon 410

The Qualcomm Snapdragon 410 is Qualcomm's first 64-bit SoC, released
in 2014 with four ARM Cortex-A53 cores. There are differents variants
(MSM8916, APQ8016(E), ...) that are all very similar. A popular device
based on APQ8016E is the DragonBoard 410c single-board computer,
but the SoC is also used in various mid-range smartphones/tablets.

This commit adds documentation for a minimal, community-maintained port
of TF-A/BL31 for MSM8916. The actual platform port is added in the
following four separate small commits to simplify the review process.
The code is primarily based on the information from the public
Snapdragon 410E Technical Reference Manual [1], combined with a lot of
trial and error to actually make it work.

Note that this port is a pure community effort without any
commercial interests and is not related to Qualcomm in any way.
The main motivation for this port is to have a minimal, updatable
firmware since this old chip does not receive many updates anymore from
Qualcomm. It works quite well for many use cases so I am willing to
maintain it as a "code owner". I have also added Nikita Travkin as
second code owner to help with reviews.

The main limitation so far is the lack of memory protection for TF-A.
This is similar to the ports for the Raspberry Pi but in this case not
a lack of hardware support but rather a lack of documentation. However,
this does not limit the usefulness of the port when used as a minimal
PSCI implementation.

[1]: https://developer.qualcomm.com/download/sd410/snapdragon-410e-technical-reference-manual.pdf

Change-Id: I676adf86061638cfc2f3ae8615470d145e84f172
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>

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# b57d9d6f 20-Jan-2022 Manish Pandey <manish.pandey2@arm.com>

Merge changes from topic "new_ls1043a" into integration

* changes:
docs(maintainers): update nxp layerscape maintainers
docs(plat/nxp/layerscape): add ls1043a soc and board support
feat(plat/n

Merge changes from topic "new_ls1043a" into integration

* changes:
docs(maintainers): update nxp layerscape maintainers
docs(plat/nxp/layerscape): add ls1043a soc and board support
feat(plat/nxp/ls1043ardb): add ls1043ardb board support
feat(plat/nxp/ls1043a): add ls1043a soc support
refactor(plat/ls1043): remove old implementation for platform ls1043
feat(nxp/driver/dcfg): add some macro definition
fix(nxp/common/setup): increase soc name maximum length
feat(nxp/common/errata): add SoC erratum a008850
feat(nxp/driver/tzc380): add tzc380 platform driver support
feat(tzc380): add sub-region register definition
feat(nxp/common/io): add ifc nor and nand as io devices
feat(nxp/driver/ifc_nand): add IFC NAND flash driver
feat(nxp/driver/ifc_nor): add IFC nor flash driver
feat(nxp/driver/csu): add bypass bit mask definition
feat(nxp/driver/dcfg): add gic address align register definition
feat(nxp/common/rcpm): add RCPM2 registers definition
fix(nxp/common/setup): fix total dram size checking
feat(nxp/common): add CORTEX A53 helper functions

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# d9bb9779 22-Oct-2021 Jiafei Pan <Jiafei.Pan@nxp.com>

docs(maintainers): update nxp layerscape maintainers

Added myself to be NXP common code and ls1028a, ls1043a platforms
maintainer.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: Iadffc56

docs(maintainers): update nxp layerscape maintainers

Added myself to be NXP common code and ls1028a, ls1043a platforms
maintainer.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: Iadffc5600e9bb2e94b1d545b8dd1a819358cabcb

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# 5d26e27a 18-Nov-2021 Manish Pandey <manish.pandey2@arm.com>

Merge changes from topic "ck/changelog" into integration

* changes:
docs(changelog): categorize scopes
docs(commit-style): add commit style documentation
build(docs): introduce release script

Merge changes from topic "ck/changelog" into integration

* changes:
docs(changelog): categorize scopes
docs(commit-style): add commit style documentation
build(docs): introduce release script
build(docs): add support for Markdown documentation
build(hooks): add commitlint checks for trailers
build(npm): add Standard Version v9.3.2
build(npm): add additional package metadata
build(npm): add license field
build(npm): update Husky to v7.0.4
build(npm): update commitlint to v14.1.0
build(npm): update lockfile format to v2
docs(prerequisites): update to Node.js v16
build(docs): update Python dependencies
build(docs): pin Python dependencies

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# c4e8edab 09-Nov-2021 Chris Kay <chris.kay@arm.com>

build(docs): introduce release script

This change introduces a new NPM run script to automatically generate
the release changelog, as well as bump version numbers across the
code-base and create the

build(docs): introduce release script

This change introduces a new NPM run script to automatically generate
the release changelog, as well as bump version numbers across the
code-base and create the release tag.

This script runs [Standard Version] to execute this, which is a tool
designed around automating substantial parts of the release process.
This can be done by running:

npm run release -- [<standard-version args>]

Standard Version expects the project to adhere to the [Semantic
Versioning] convention which TF-A does not, so you may need to specify
the version manually, e.g.:

npm run release -- --release-as 2.6.0

Individual steps of the release process may also be skipped at-will,
which may be necessary when, for example, tweaking the changelog:

npm run release -- --skip.commit --skip.tag

Standard Version is configured by the `.versionrc.js` file, which
contains information about the Conventional Commits types and scopes
used by the project, and how they map to the changelog.

To maintain continuity with the existing changelog style - at least to
the extent possible in the move from manual to automatic creation - a
customized changelog template has been introduced, based on the
Conventional Commits template provided by Standard Version.

This template package extends the Conventional Commits template package
by introducing support for parsing the Conventional Commits scopes into
changelog sections, similarly to how they were previously organized.

[Standard Version]:
https://github.com/conventional-changelog/standard-version
[Semantic Versioning]: https://semver.org

Change-Id: I5bafa512daedc631baae951651c38c1c62046b0a
Signed-off-by: Chris Kay <chris.kay@arm.com>

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# 55b2e6f0 16-Nov-2021 Manish Pandey <manish.pandey2@arm.com>

Merge changes I9e6feeee,If1cd7962 into integration

* changes:
docs(rme): add description of TF-A changes for RME
docs(gpt): add documentation page for GPT library


# 6ee92598 25-Aug-2021 johpow01 <john.powell@arm.com>

docs(gpt): add documentation page for GPT library

This patch adds some documentation for the GPT library as well as adds
code owners for it.

Signed-off-by: John Powell <john.powell@arm.com>
Change-

docs(gpt): add documentation page for GPT library

This patch adds some documentation for the GPT library as well as adds
code owners for it.

Signed-off-by: John Powell <john.powell@arm.com>
Change-Id: If1cd79626eadb27e1024d731b26ee2e20af74a66

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# e33ca7b4 29-Oct-2021 Manish Pandey <manish.pandey2@arm.com>

Merge changes from topic "ck/mpmm" into integration

* changes:
docs(maintainers): add Chris Kay to AMU and MPMM
feat(tc): enable MPMM
feat(mpmm): add support for MPMM
feat(amu): enable per-c

Merge changes from topic "ck/mpmm" into integration

* changes:
docs(maintainers): add Chris Kay to AMU and MPMM
feat(tc): enable MPMM
feat(mpmm): add support for MPMM
feat(amu): enable per-core AMU auxiliary counters
docs(amu): add AMU documentation
refactor(amu): refactor enablement and context switching
refactor(amu): detect auxiliary counters at runtime
refactor(amu): detect architected counters at runtime
refactor(amu): conditionally compile auxiliary counter support
refactor(amu): factor out register accesses
refactor(amu)!: privatize unused AMU APIs
refactor(amu)!: remove `PLAT_AMU_GROUP1_COUNTERS_MASK`
build(amu): introduce `amu.mk`
build(fconf)!: clean up source collection
feat(fdt-wrappers): add CPU enumeration utility function
build(fdt-wrappers): introduce FDT wrappers makefile
build(bl2): deduplicate sources
build(bl1): deduplicate sources

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# b15f7e2c 14-Oct-2021 Chris Kay <chris.kay@arm.com>

docs(maintainers): add Chris Kay to AMU and MPMM

Change-Id: I8c775c8cac4fbbb2904952747a9572a71aff37b4
Signed-off-by: Chris Kay <chris.kay@arm.com>


# 1d651211 06-Oct-2021 Soby Mathew <soby.mathew@arm.com>

Merge changes from topic "za/feat_rme" into integration

* changes:
refactor(gpt): productize and refactor GPT library
feat(rme): disable Watchdog for Arm platforms if FEAT_RME enabled
docs(rme

Merge changes from topic "za/feat_rme" into integration

* changes:
refactor(gpt): productize and refactor GPT library
feat(rme): disable Watchdog for Arm platforms if FEAT_RME enabled
docs(rme): add build and run instructions for FEAT_RME
fix(plat/fvp): bump BL2 stack size
fix(plat/fvp): allow changing the kernel DTB load address
refactor(plat/arm): rename ARM_DTB_DRAM_NS region macros
refactor(plat/fvp): update FVP platform DTS for FEAT_RME
feat(plat/arm): add GPT initialization code for Arm platforms
feat(plat/fvp): add memory map for FVP platform for FEAT_RME
refactor(plat/arm): modify memory region attributes to account for FEAT_RME
feat(plat/fvp): add RMM image support for FVP platform
feat(rme): add GPT Library
feat(rme): add ENABLE_RME build option and support for RMM image
refactor(makefile): remove BL prefixes in build macros
feat(rme): add context management changes for FEAT_RME
feat(rme): add Test Realm Payload (TRP)
feat(rme): add RMM dispatcher (RMMD)
feat(rme): run BL2 in root world when FEAT_RME is enabled
feat(rme): add xlat table library changes for FEAT_RME
feat(rme): add Realm security state definition
feat(rme): add register definitions and helper functions for FEAT_RME

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# 3cfa3497 26-Aug-2021 Zelalem Aweke <zelalem.aweke@arm.com>

docs(rme): add build and run instructions for FEAT_RME

This patch adds instructions on how to build and run TF-A
with FEAT_RME enabled. The patch also adds code owners for
FEAT_RME.

Signed-off-by:

docs(rme): add build and run instructions for FEAT_RME

This patch adds instructions on how to build and run TF-A
with FEAT_RME enabled. The patch also adds code owners for
FEAT_RME.

Signed-off-by: Zelalem Aweke <zelalem.aweke@arm.com>
Change-Id: Id16dc52cb76b1ea56ac5c3fc38cb0794a62ac2a1

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# af4ed71d 22-Sep-2021 Joanna Farley <joanna.farley@arm.com>

Merge changes I48d23785,I3dd99d87 into integration

* changes:
docs(maintainers): update qti maintainer
feat(plat/qti/sc7280): support for qti sc7280 plat


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