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8c106902 |
| 16-Jul-2014 |
Soby Mathew <soby.mathew@arm.com> |
Add CPUECTLR_EL1 and Snoop Control register to crash reporting
This patch adds the CPUECTLR_EL1 register and the CCI Snoop Control register to the list of registers being reported when an unhandled
Add CPUECTLR_EL1 and Snoop Control register to crash reporting
This patch adds the CPUECTLR_EL1 register and the CCI Snoop Control register to the list of registers being reported when an unhandled exception occurs.
Change-Id: I2d997f2d6ef3d7fa1fad5efe3364dc9058f9f22c
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626ed510 |
| 25-Jun-2014 |
Soby Mathew <soby.mathew@arm.com> |
Rework the crash reporting in BL3-1 to use less stack
This patch reworks the crash reporting mechanism to further optimise the stack and code size. The reporting makes use of assembly console functi
Rework the crash reporting in BL3-1 to use less stack
This patch reworks the crash reporting mechanism to further optimise the stack and code size. The reporting makes use of assembly console functions to avoid calling C Runtime to report the CPU state. The crash buffer requirement is reduced to 64 bytes with this implementation. The crash buffer is now part of per-cpu data which makes retrieving the crash buffer trivial.
Also now panic() will use crash reporting if invoked from BL3-1.
Fixes ARM-software/tf-issues#199
Change-Id: I79d27a4524583d723483165dc40801f45e627da5
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2e35b924 |
| 23-Jun-2014 |
danh-arm <dan.handley@arm.com> |
Merge pull request #136 from athoelke/at/cpu-data
Per-cpu data cache restructuring
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5e910074 |
| 02-Jun-2014 |
Andrew Thoelke <andrew.thoelke@arm.com> |
Per-cpu data cache restructuring
This patch prepares the per-cpu pointer cache for wider use by: * renaming the structure to cpu_data and placing in new header * providing accessors for this CPU, or
Per-cpu data cache restructuring
This patch prepares the per-cpu pointer cache for wider use by: * renaming the structure to cpu_data and placing in new header * providing accessors for this CPU, or other CPUs * splitting the initialization of the TPIDR pointer from the initialization of the cpu_data content * moving the crash stack initialization to a crash stack function * setting the TPIDR pointer very early during boot
Change-Id: Icef9004ff88f8eb241d48c14be3158087d7e49a3
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dbc64b39 |
| 16-Jun-2014 |
danh-arm <dan.handley@arm.com> |
Merge pull request #133 from athoelke/at/crash-reporting-opt
Make the BL3-1 crash reporting optional
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ca1e6b63 |
| 12-Jun-2014 |
achingupta <achin.gupta@arm.com> |
Merge pull request #126 from sandrine-bailleux/sb/include-missing-hfile
Include 'platform_def.h' header file in 'crash_reporting.S'
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9c22b323 |
| 03-Jun-2014 |
Andrew Thoelke <andrew.thoelke@arm.com> |
Make the BL3-1 crash reporting optional
This patch makes the console crash dump of processor register state optional based on the CRASH_REPORTING make variable.
This defaults to only being enabled
Make the BL3-1 crash reporting optional
This patch makes the console crash dump of processor register state optional based on the CRASH_REPORTING make variable.
This defaults to only being enabled for DEBUG builds. This can be overridden by setting a different value in the platform makefile or on the make command line.
Change-Id: Icfa1b2d7ff0145cf0a85e8ad732f9cee7e7e993f
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e4d13389 |
| 27-May-2014 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Include 'platform_def.h' header file in 'crash_reporting.S'
'crash_reporting.S' needs to include 'platform_def.h' to get the definition of PLATFORM_CORE_COUNT.
Note: On FVP it was compiling because
Include 'platform_def.h' header file in 'crash_reporting.S'
'crash_reporting.S' needs to include 'platform_def.h' to get the definition of PLATFORM_CORE_COUNT.
Note: On FVP it was compiling because 'platform_def.h' gets included through 'plat/fvp/include/plat_macros.S' but we don't want to rely on that for other platforms.
Change-Id: I51e974776dd0f3bda10ad9849f5ef7b30c629833
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a43d431b |
| 07-Apr-2014 |
Soby Mathew <soby.mathew@arm.com> |
Rework BL3-1 unhandled exception handling and reporting
This patch implements the register reporting when unhandled exceptions are taken in BL3-1. Unhandled exceptions will result in a dump of regis
Rework BL3-1 unhandled exception handling and reporting
This patch implements the register reporting when unhandled exceptions are taken in BL3-1. Unhandled exceptions will result in a dump of registers to the console, before halting execution by that CPU. The Crash Stack, previously called the Exception Stack, is used for this activity. This stack is used to preserve the CPU context and runtime stack contents for debugging and analysis.
This also introduces the per_cpu_ptr_cache, referenced by tpidr_el3, to provide easy access to some of BL3-1 per-cpu data structures. Initially, this is used to provide a pointer to the Crash stack.
panic() now prints the the error file and line number in Debug mode and prints the PC value in release mode.
The Exception Stack is renamed to Crash Stack with this patch. The original intention of exception stack is no longer valid since we intend to support several valid exceptions like IRQ and FIQ in the trusted firmware context. This stack is now utilized for dumping and reporting the system state when a crash happens and hence the rename.
Fixes ARM-software/tf-issues#79 Improve reporting of unhandled exception
Change-Id: I260791dc05536b78547412d147193cdccae7811a
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