| 3da2f673 | 26-Nov-2014 |
Cedric Chaumont <cedric.chaumont@st.com> |
Align compilation flag optee_os/optee_test(teetest)
Add plat-stm: use -mfloat-abi=soft to fix VFP register register arguments error during testsuite linking. It defines GCC to generate output contai
Align compilation flag optee_os/optee_test(teetest)
Add plat-stm: use -mfloat-abi=soft to fix VFP register register arguments error during testsuite linking. It defines GCC to generate output containing library calls for floating-point operations. optee_test(teetest) is statically linked with new client/linux driver so far.
Reviewed-by: Pascal Brand <pascal.brand@linaro.org> Tested-by: Pascal Brand <pascal.brand@linaro.org> (STM platform) Signed-off-by: Cedric Chaumont <cedric.chaumont@st.com>
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| 69fcb514 | 26-Nov-2014 |
Jerome Forissier <jerome.forissier@linaro.org> |
Update documentation/build_system.md
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Joakim Bech <joakim.bech@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linar
Update documentation/build_system.md
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Joakim Bech <joakim.bech@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| d1d226a5 | 07-Nov-2014 |
Jerome Forissier <jerome.forissier@linaro.org> |
Select cryptographic algorithms at compile time
Allows to disable some cryptographic algorithms by setting make variables at build time (either from the environment, the command line or by editing c
Select cryptographic algorithms at compile time
Allows to disable some cryptographic algorithms by setting make variables at build time (either from the environment, the command line or by editing core/lib/libtomcrypt/sub.mk).
For example: $ make ... CFG_CRYPTO=n $ make ... CFG_CRYPTO_DES=n
This can reduce the size of the TEE binary as well as its memory footprint:
$ make -j9 PLATFORM=vexpress-qemu_virt DEBUG= all mem_usage $ grep RAM out/arm32-plat-vexpress/core/tee.mem_usage RAM Usage 7DF00000 - 7DF39280 size 00039280 229 KiB 58 pages $ du -h out/arm32-plat-vexpress/core/tee.bin 164K out/arm32-plat-vexpress/core/tee.bin
$ make -j9 PLATFORM=vexpress-qemu_virt DEBUG= CFG_CRYPTO=n all mem_usage $ grep RAM out/arm32-plat-vexpress/core/tee.mem_usage RAM Usage 7DF00000 - 7DF1D280 size 0001D280 117 KiB 30 pages $ du -h out/arm32-plat-vexpress/core/tee.bin 104K out/arm32-plat-vexpress/core/tee.bin
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org> Tested-by: Jerome Forissier <jerome.forissier@linaro.org> (QEMU virt, FVP) Reviewed-by: Pascal Brand <pascal.brand@linaro.org> Tested-by: Pascal Brand <pascal.brand@linaro.org> (STM platform)
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| 0a7f95b9 | 14-Nov-2014 |
Jerome Forissier <jerome.forissier@linaro.org> |
mk/checkconf.mk: add utility functions to test configuration variables
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org> |
| d8e06e12 | 24-Nov-2014 |
Pascal Brand <pascal.brand@st.com> |
MAC operations now supports NULL arguments
MAC algorithms support NULL arguments and zero length strings.
Note that the fix consists in a change of API in the internal crypto interface. This change
MAC operations now supports NULL arguments
MAC algorithms support NULL arguments and zero length strings.
Note that the fix consists in a change of API in the internal crypto interface. This change make hash_ops and mac_ops look the same in terms of update and final step
Signed-off-by: Pascal Brand <pascal.brand@st.com> Tested-by: Pascal Brand <pascal.brand@linaro.org> (STM platform) Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| dd9cb74e | 13-Nov-2014 |
etienne carriere <etienne.carriere@st.com> |
plat-stm: clean tz init and l2 init/enable
Useless config of read-only reg SCU_CONFIG.
L2 FLZW feature: must be set in core after L2 is configured and enable. TZ inits default not set core FLZ. L2
plat-stm: clean tz init and l2 init/enable
Useless config of read-only reg SCU_CONFIG.
L2 FLZW feature: must be set in core after L2 is configured and enable. TZ inits default not set core FLZ. L2 enable sets core FLZ.
Rename PL310_WAY_SIZE into PL310_LINE_SIZE.
Reviewed-on: https://gerrit.st.com/17060 Reviewed-by: Etienne CARRIERE <etienne.carriere@st.com> Tested-by: Etienne CARRIERE <etienne.carriere@st.com> Reviewed-by: Pascal BRAND <pascal.brand@st.com> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Tested-by: Pascal Brand <pascal.brand@linaro.org> (STM platform) Signed-off-by: Pascal Brand <pascal.brand@st.com>
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| fe3647cb | 13-Nov-2014 |
etienne carriere <etienne.carriere@st.com> |
plat-stm: set L2 prefetch offset to 7
Reviewed-on: https://gerrit.st.com/17052 Reviewed-by: Etienne CARRIERE <etienne.carriere@st.com> Tested-by: Etienne CARRIERE <etienne.carriere@st.com> Reviewed-
plat-stm: set L2 prefetch offset to 7
Reviewed-on: https://gerrit.st.com/17052 Reviewed-by: Etienne CARRIERE <etienne.carriere@st.com> Tested-by: Etienne CARRIERE <etienne.carriere@st.com> Reviewed-by: Pascal BRAND <pascal.brand@st.com> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Pascal Brand <pascal.brand@st.com>
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| 2d7f1812 | 12-Nov-2014 |
etienne carriere <etienne.carriere@st.com> |
plat-stm: fix TA L1 table handling
bugz: https://bugzilla.bri.st.com/show_bug.cgi?id=6613
There is only 1 mmu table effectively used to map TAs: one 1 at mapped at a given time.
SEC_TA_MMU_TTB_FLD
plat-stm: fix TA L1 table handling
bugz: https://bugzilla.bri.st.com/show_bug.cgi?id=6613
There is only 1 mmu table effectively used to map TAs: one 1 at mapped at a given time.
SEC_TA_MMU_TTB_FLD must be aligned, with an alignment constraint defined from number of 1MB section entries in the user mapping.
SEC_TA_MMU_TTB_FLD could be allocated at run time.
Cleanup linker file: remove useless CTX_MEM and optimize a bit stacks and mmu tables location.
Reviewed-on: https://gerrit.st.com/17038 Tested-by: Etienne CARRIERE <etienne.carriere@st.com> Reviewed-by: Pascal BRAND <pascal.brand@st.com> Reviewed-by: Etienne CARRIERE <etienne.carriere@st.com> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Pascal Brand <pascal.brand@st.com>
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| 3df2502b | 20-Nov-2014 |
Pascal Brand <pascal.brand@st.com> |
plat-stm: L2CC_MUTEX implementation
Signed-off-by: Pascal Brand <pascal.brand@st.com> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> |
| b5c0cdcb | 17-Nov-2014 |
Jens Wiklander <jens.wiklander@linaro.org> |
travis: Add CFG_TEE_FW_DEBUG=1 to qemu_virt
Adds CFG_TEE_FW_DEBUG=1 compilation for PLATFORM=vexpress-qemu_virt
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> |
| 074ba9b2 | 09-Oct-2014 |
Jens Wiklander <jens.wiklander@linaro.org> |
Move bget to libutils replacing dlmalloc
* Moves bget to libutils replacing dlmalloc as kernel memory allocator * Restores the code formatting of bget.{c,h} to the original state as parts of the c
Move bget to libutils replacing dlmalloc
* Moves bget to libutils replacing dlmalloc as kernel memory allocator * Restores the code formatting of bget.{c,h} to the original state as parts of the current code was unreadable * Adds malloc_add_pool() to make use of previously unused memory * Moves call to malloc_init() into platform specific code * Restores MDBG into working condition * Adds memalign function to bget.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (QEMU virt platform) Tested-by: Jerome Forissier <jerome.forissier@linaro.org> (FVP) Reviewed-by: Etienne Carriere <etienne.carriere@st.com> Tested-by: Pascal Brand <pascal.brand@linaro.org> (STM platform)
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| 50814cf6 | 18-Nov-2014 |
Pascal Brand <pascal.brand@st.com> |
Make function tee_cryp_init() generic
Signed-off-by: Pascal Brand <pascal.brand@st.com> Reviewed-by: Joakim Bech <joakim.bech@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> |
| e0042c88 | 17-Nov-2014 |
Pascal Brand <pascal.brand@st.com> |
Fixes in trace refactoring
- Deprecates ATAMSG - trace_ext.c is arm32 specific - tee_kta_trace.h and trace_ta.h are generic - Default level is now 1 (was 2)
Signed-off-by: Pascal Brand <pascal.bran
Fixes in trace refactoring
- Deprecates ATAMSG - trace_ext.c is arm32 specific - tee_kta_trace.h and trace_ta.h are generic - Default level is now 1 (was 2)
Signed-off-by: Pascal Brand <pascal.brand@st.com> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 1edd3f0a | 04-Nov-2014 |
Jens Wiklander <jens.wiklander@linaro.org> |
optee_design.md: add picture to MMU section
xlat_table.png is generated with the command: dot -Tpng xlat_table.dot > xlat_table.png
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Rev
optee_design.md: add picture to MMU section
xlat_table.png is generated with the command: dot -Tpng xlat_table.dot > xlat_table.png
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Joakim Bech <joakim.bech@linaro.org> Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
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| b796ebf3 | 13-Nov-2014 |
Jerome Forissier <jerome.forissier@linaro.org> |
TEE_MACCompareFinal(): use buf_compare_ct(), don't clear stack on exit
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org> Tested-by: Jerome Forissier <jerome.forissier@linaro.org> (QEMU v
TEE_MACCompareFinal(): use buf_compare_ct(), don't clear stack on exit
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org> Tested-by: Jerome Forissier <jerome.forissier@linaro.org> (QEMU virt platform) Reviewed-by: Pascal Brand <pascal.brand@linaro.org> Tested-by: Pascal Brand <pascal.brand@linaro.org> (STM platform) Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
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| d9b9179c | 30-Oct-2014 |
Pascal Brand <pascal.brand@st.com> |
Clean cache_l1 and cache_l2 maintenance
L1 cache maintenance is using Virtual Memory, whereas cache L2 maintenance uses Physical Memory
Signed-off-by: Pascal Brand <pascal.brand@st.com> Reviewed-by
Clean cache_l1 and cache_l2 maintenance
L1 cache maintenance is using Virtual Memory, whereas cache L2 maintenance uses Physical Memory
Signed-off-by: Pascal Brand <pascal.brand@st.com> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Tested-by: Pascal Brand <pascal.brand@linaro.org> (STM platform)
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| ef03bc1f | 12-Nov-2014 |
Pascal Brand <pascal.brand@st.com> |
Use bn_free to free big numbers
At some places of the code, some big numbers, allocated through bn_alloc_max(), were freed using free(). They are now free using bn_free()
Signed-off-by: Pascal Bran
Use bn_free to free big numbers
At some places of the code, some big numbers, allocated through bn_alloc_max(), were freed using free(). They are now free using bn_free()
Signed-off-by: Pascal Brand <pascal.brand@st.com> Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Pascal Brand <pascal.brand@linaro.org> Reviewed-by: Joakim Bech <joakim.bech@linaro.org> Tested-by: Pascal Brand <pascal.brand@linaro.org> (STM platform)
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| 571a0b1d | 04-Jul-2014 |
Joakim Bech <joakim.bech@linaro.org> |
OP-TEE design document
- Adds documentation covering platform initalization, SMC handling, TEE SMC Interface, thread handling and MMU. - Adds empty sections showing what we intend to add to the
OP-TEE design document
- Adds documentation covering platform initalization, SMC handling, TEE SMC Interface, thread handling and MMU. - Adds empty sections showing what we intend to add to the documentation. - Adds yEd (http://www.yworks.com/) files and the images generated by the tool.
Signed-off-by: Joakim Bech <joakim.bech@linaro.org> Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
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| f0917fd0 | 12-Nov-2014 |
Jerome Forissier <jerome.forissier@linaro.org> |
plat-stm: fix parallel build error
Generation of out/arm32-plat-stm/core/tz.lds may occur when the directory out/arm32-plat-stm/core does not exist yet. The command should therefore create it. Note:
plat-stm: fix parallel build error
Generation of out/arm32-plat-stm/core/tz.lds may occur when the directory out/arm32-plat-stm/core does not exist yet. The command should therefore create it. Note: plat-vexpress is correct.
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
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| 20338367 | 10-Nov-2014 |
Joakim Bech <joakim.bech@linaro.org> |
Fix buf_overlaps_area security bug
buf_overlaps_area() only returned false in previous implementation that might lead to a potential security vulnerability and instability in general since secure an
Fix buf_overlaps_area security bug
buf_overlaps_area() only returned false in previous implementation that might lead to a potential security vulnerability and instability in general since secure and non-secure memory could eventually overlap.
Signed-off-by: Joakim Bech <joakim.bech@linaro.org> Tested-by: Joakim Bech <joakim.bech@linaro.org> (QEMU) Reviewed-by: Pascal Brand <pascal.brand@linaro.org> Tested-by: Pascal Brand <pascal.brand@linaro.org> (STM platform) Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
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| 51835057 | 10-Nov-2014 |
Jerome Forissier <jerome.forissier@linaro.org> |
Fix memory leak in tee_svc_cryp_obj_copy()
The following Trusted App would lead to a memory leak in the TEE core:
TEE_ObjectHandle o1, o2; TEE_AllocateTransientObject(TEE_TYPE_RSA_KEYPAIR, 256,
Fix memory leak in tee_svc_cryp_obj_copy()
The following Trusted App would lead to a memory leak in the TEE core:
TEE_ObjectHandle o1, o2; TEE_AllocateTransientObject(TEE_TYPE_RSA_KEYPAIR, 256, &o1); TEE_GenerateKey(o1, 256, NULL, 0); TEE_AllocateTransientObject(TEE_TYPE_RSA_KEYPAIR, 256, &o2); TEE_CopyObjectAttributes(o2, o1); TEE_FreeTransientObject(o1); TEE_FreeTransientObject(o2);
The leak was introduced by commit ffe040395b13 ("Add crypto provider internal API").
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Pascal Brand <pascal.brand@linaro.org> Tested-by: Pascal Brand <pascal.brand@linaro.org> (STM platform)
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| 818f0154 | 11-Nov-2014 |
Jens Wiklander <jens.wiklander@linaro.org> |
travis: set max log level to 4
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Pascal Brand <pascal.brand@linaro.org> |
| 4de4bebc | 20-Oct-2014 |
Jens Wiklander <jens.wiklander@linaro.org> |
Merge tee_{core,uta}_trace.h into libutil
Merges tee_core_trace.h and tee_uta_trace.h into a common trace.h in libutil. Since the trace functions now resides libutil they have to rely on core and li
Merge tee_{core,uta}_trace.h into libutil
Merges tee_core_trace.h and tee_uta_trace.h into a common trace.h in libutil. Since the trace functions now resides libutil they have to rely on core and libutee to provide functions to print to the log device.
* Keeps compatible interface from tee_kta_trace.h * Adds TAMSG() and TAMSG_RAW() to log TA related events * Removes the TRACE_ALWAYS level
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (QEMU virt platform) Reviewed-by: Etienne Carriere <etienne.carriere@st.com> Reviewed-by: Pascal Brand <pascal.brand@linaro.org> Tested-by: Pascal Brand <pascal.brand@linaro.org> (STM platform)
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| 2eb765fc | 03-Oct-2014 |
Jens Wiklander <jens.wiklander@linaro.org> |
Move util.h from core into libutil
Moves util.h from core into libutil to make it available anywhere.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Pascal Brand <pascal.bra
Move util.h from core into libutil
Moves util.h from core into libutil to make it available anywhere.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Pascal Brand <pascal.brand@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@st.com>
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| 4e77495e | 03-Oct-2014 |
Jens Wiklander <jens.wiklander@linaro.org> |
Rename and move TEE_COMPILE_TIME_ASSERT
Renames TEE_COMPILE_TIME_ASSERT to COMPILE_TIME_ASSERT, the macro is also moved to assert.h to be available anywhere.
Signed-off-by: Jens Wiklander <jens.wik
Rename and move TEE_COMPILE_TIME_ASSERT
Renames TEE_COMPILE_TIME_ASSERT to COMPILE_TIME_ASSERT, the macro is also moved to assert.h to be available anywhere.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Pascal Brand <pascal.brand@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@st.com>
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