History log of /optee_os/ (Results 7826 – 7850 of 8520)
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8a86d34515-Feb-2016 Jens Wiklander <jens.wiklander@linaro.org>

optee_msg: add OPTEE_MSG_RPC_CMD_SHM_FREE

Buffers allocated with OPTEE_MSG_RPC_CMD_SHM_ALLOC must be freed
with OPTEE_MSG_RPC_CMD_SHM_FREE to help normal world driver to
route the message correctly.

optee_msg: add OPTEE_MSG_RPC_CMD_SHM_FREE

Buffers allocated with OPTEE_MSG_RPC_CMD_SHM_ALLOC must be freed
with OPTEE_MSG_RPC_CMD_SHM_FREE to help normal world driver to
route the message correctly.

Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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6c841fe921-Mar-2016 Jerome Forissier <jerome.forissier@linaro.org>

libtomcrypt: mpa_desc.c: check return status of allocations

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Pascal

libtomcrypt: mpa_desc.c: check return status of allocations

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Pascal Brand <pascal.brand@linaro.org>

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41b742fb21-Mar-2016 Jerome Forissier <jerome.forissier@linaro.org>

fs: do not call thread_rpc_free() when allocation fails

When thread_rpc_alloc_payload() fails, the cookie is not valid, so
thread_rpc_free() must not be called. This fixes a crash in xtest
7633 when

fs: do not call thread_rpc_free() when allocation fails

When thread_rpc_alloc_payload() fails, the cookie is not valid, so
thread_rpc_free() must not be called. This fixes a crash in xtest
7633 when shared memory is not large enough.

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Pascal Brand <pascal.brand@linaro.org>

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fe8394c313-Oct-2015 Jerome Forissier <jerome.forissier@linaro.org>

hikey: increase shared memory size from 1 to 2 MiB

This is needed to run the latest "generic driver" configuration.
When the shared memory pool is 1 MiB, xtest 7633 fails with a TA panic
due to memo

hikey: increase shared memory size from 1 to 2 MiB

This is needed to run the latest "generic driver" configuration.
When the shared memory pool is 1 MiB, xtest 7633 fails with a TA panic
due to memory allocation error. This commit increases the size of the
shared memory pool so that the test will pass.
Note that UEFI (EDK2) reserves the top 32 MiB of the physical address
space (0x3E000000-0x3FFFFFFF) for OP-TEE, so we still have 14 MiB unused
(0x3E000000-0x3EDFFFFF).

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Pascal Brand <pascal.brand@linaro.org>

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35c507f217-Mar-2016 Jerome Forissier <jerome.forissier@linaro.org>

mk/config.mk: hardcode CFG_OPTEE_REVISION_{MAJOR,MINOR}

There is really no guarantee that the values of CFG_OPTEE_REVISION_MAJOR
and CFG_OPTEE_REVISION_MINOR can be extracted from Git (think about
b

mk/config.mk: hardcode CFG_OPTEE_REVISION_{MAJOR,MINOR}

There is really no guarantee that the values of CFG_OPTEE_REVISION_MAJOR
and CFG_OPTEE_REVISION_MINOR can be extracted from Git (think about
building from a tarball or "git clone --depth=1"), so let's just hardcode
them into the configuration.

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Pascal Brand <pascal.brand@linaro.org>

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d329501916-Mar-2016 Pascal Brand <pascal.brand@st.com>

LTC: no definition of LTC_NO_FAST

LTC_NO_FAST resets LTC_FAST if the latter has been set.
Indeed, LTC_FAST is never set on ARM architecture,
so LTC_NO_FAST has no effect

Reviewed-by: Jerome Forissi

LTC: no definition of LTC_NO_FAST

LTC_NO_FAST resets LTC_FAST if the latter has been set.
Indeed, LTC_FAST is never set on ARM architecture,
so LTC_NO_FAST has no effect

Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Pascal Brand <pascal.brand@st.com>

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49a4b3bb16-Mar-2016 Pascal Brand <pascal.brand@st.com>

CFG_CRYPTO_SIZE_OPTIMIZATION?=y by default

Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Pascal Brand <pascal.bra

CFG_CRYPTO_SIZE_OPTIMIZATION?=y by default

Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Pascal Brand <pascal.brand@st.com>

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8a6a60a516-Mar-2016 Pascal Brand <pascal.brand@st.com>

Rename libtomcrypt_with_optimize_size in CFG_CRYPTO_SIZE_OPTIMIZATION

Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-b

Rename libtomcrypt_with_optimize_size in CFG_CRYPTO_SIZE_OPTIMIZATION

Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Pascal Brand <pascal.brand@st.com>

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f2dec49b10-Mar-2016 Jens Wiklander <jens.wiklander@linaro.org>

arm: sm: [bugfix] save/restore fiq core registers

Currently there's a security problem with the FIQ registers for armv7
targets, both with leaking information and that normal world can change
stack

arm: sm: [bugfix] save/restore fiq core registers

Currently there's a security problem with the FIQ registers for armv7
targets, both with leaking information and that normal world can change
stack pointer for FIQ mode. This patch fixes this problem.

Saves and restores FIQ core registers (spsr, sp, lr) when switching
secre/non-secure state.

Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Tested-by: Pascal Brand <pascal.brand@linaro.org> (STM)
Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (modified QEMU)
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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fa7dd5c214-Mar-2016 Jens Wiklander <jens.wiklander@linaro.org>

travis: add build target for minimal OP-TEE

Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Tested-by: Jerome Forissier <jerome.foriss

travis: add build target for minimal OP-TEE

Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Tested-by: Jerome Forissier <jerome.forissier@linaro.org> (HiKey)
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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6fbac37e05-Nov-2015 Jens Wiklander <jens.wiklander@linaro.org>

Minimal OP-TEE without user TAs

Hide all user TA related code under CFG_WITH_USER_TA. When compiled
with:
CFG_WITH_USER_TA=n
CFG_CRYPTO=n
CFG_ENC_FS=n
CFG_SE_API=n
CFG_PCSC_PASSTHRU_READER_DRV=n

Sk

Minimal OP-TEE without user TAs

Hide all user TA related code under CFG_WITH_USER_TA. When compiled
with:
CFG_WITH_USER_TA=n
CFG_CRYPTO=n
CFG_ENC_FS=n
CFG_SE_API=n
CFG_PCSC_PASSTHRU_READER_DRV=n

Skips building in static TA tests for features not enabled.

The size of OP-TEE is reduced to one third of its original size.

Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (QEMU xtest 1001)
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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adedf96111-Mar-2016 Jerome Forissier <jerome.forissier@linaro.org>

Travis: QEMU check: use travis.xml manifest to speed up repo download

travis.xml clones the Git repositories with depth 1, thereby reducing
the duration of the "repo sync" step from 4-6 minutes down

Travis: QEMU check: use travis.xml manifest to speed up repo download

travis.xml clones the Git repositories with depth 1, thereby reducing
the duration of the "repo sync" step from 4-6 minutes down to about 1
min.

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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1d283b9122-Feb-2016 Pascal Brand <pascal.brand@st.com>

arm: fix stack size

According to GP Internal API, TA_STACK_SIZE corresponds to the stack
size used by the TA code itself and does not include stack space
possibly used by the Trusted Core Framework.

arm: fix stack size

According to GP Internal API, TA_STACK_SIZE corresponds to the stack
size used by the TA code itself and does not include stack space
possibly used by the Trusted Core Framework.
Hence, stack_size which is the size of the stack to use,
must be enlarged.

Without this patch, on FVP, xtest 1012, based on ta/sims, fails because
TA_STACK_SIZE is defined as 1024, which is too low.

Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Pascal Brand <pascal.brand@st.com>

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7823a7b511-Mar-2016 Pascal Brand <pascal.brand@st.com>

Introduce CFG_CRYPTO_WITH_CE

CFG_CRYPTO_WITH_CE is inroduced in this patch, and fixes
CFG_CRYPTO=n CFG_ARM64_core=n compilation issue on HiKey and Juno.

CFG_CRYPTO_WITH_CE indicates Crypto Engine a

Introduce CFG_CRYPTO_WITH_CE

CFG_CRYPTO_WITH_CE is inroduced in this patch, and fixes
CFG_CRYPTO=n CFG_ARM64_core=n compilation issue on HiKey and Juno.

CFG_CRYPTO_WITH_CE indicates Crypto Engine acceleration can be
used. CFG_CRYPTO_xxx_CE configuration variables are automatically
set, according to other configuration variables (CFG_ARM32_core or
CFG-ARM64_core, SHA and AES available).

Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Pascal Brand <pascal.brand@st.com>

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c7ca8db109-Mar-2016 Pascal Brand <pascal.brand@st.com>

Remove unused syscalls

A number of syscalls which are now unused have been removed:
- TEE_SCN_DUMMY
- TEE_SCN_DUMMY_7ARGS
- TEE_SCN_GET_PROPERTY_OBSOLETE

This breaks binary compatibility

Reviewed-

Remove unused syscalls

A number of syscalls which are now unused have been removed:
- TEE_SCN_DUMMY
- TEE_SCN_DUMMY_7ARGS
- TEE_SCN_GET_PROPERTY_OBSOLETE

This breaks binary compatibility

Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Pascal Brand <pascal.brand@st.com>

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b8d220d209-Mar-2016 Pascal Brand <pascal.brand@st.com>

Remove TEE_ARRAY_SIZE definition

Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Pascal Brand <pascal.brand@st.com>

8a933cce26-Feb-2016 Jens Wiklander <jens.wiklander@linaro.org>

core: remove unused core_pa2va_helper()

Removes the unused deprecated function core_pa2va_helper().

Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Reviewed-by: Joakim Bech <joakim.bech@linaro.

core: remove unused core_pa2va_helper()

Removes the unused deprecated function core_pa2va_helper().

Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (QEMU, FVP)
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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43e30efd14-Jan-2016 Jens Wiklander <jens.wiklander@linaro.org>

core: deprecate old address translation functions

Deprecates the old address translation functions and removes their
wrapper macros. All calls to the deprecated functions are replaced with
calls to

core: deprecate old address translation functions

Deprecates the old address translation functions and removes their
wrapper macros. All calls to the deprecated functions are replaced with
calls to the new translation functions instead.

Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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b7a1368211-Jan-2016 Jens Wiklander <jens.wiklander@linaro.org>

core: add new address translation functions

Adds two new functions for address translations, virt_to_phys() and
phys_to_virt() that eventually will replace all other such functions.

Reviewed-by: Pa

core: add new address translation functions

Adds two new functions for address translations, virt_to_phys() and
phys_to_virt() that eventually will replace all other such functions.

Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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f99cbb3b13-Jan-2016 Jens Wiklander <jens.wiklander@linaro.org>

arm64.h add registers for address translation

Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@lina

arm64.h add registers for address translation

Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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7706b33c11-Jan-2016 Jens Wiklander <jens.wiklander@linaro.org>

arm32.h add PAR 32 and 64-bit register

Adds functions and defines for PAR 32 and 64-bit register.

Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Reviewed-by: Joakim Bech <joakim.bech@linaro.or

arm32.h add PAR 32 and 64-bit register

Adds functions and defines for PAR 32 and 64-bit register.

Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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0b94897e08-Mar-2016 Jens Wiklander <jens.wiklander@linaro.org>

fix: Add fault type to crash dump

Fixes previous f2930adaf8a10f2a6154ae21ec991ce7133fde82 "Add fault type
to crash dump" to only interpret fault_descr for data and prefetch abort
to avoid asserting

fix: Add fault type to crash dump

Fixes previous f2930adaf8a10f2a6154ae21ec991ce7133fde82 "Add fault type
to crash dump" to only interpret fault_descr for data and prefetch abort
to avoid asserting if fault_descr is 0 for LPAE.

Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (QEMU with LPAE)
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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f2930ada03-Mar-2016 Jerome Forissier <jerome.forissier@linaro.org>

Add fault type to crash dump

Currently, when a data or instruction abort occurs in a TA, the crash
dump does not clearly show the fault type (translation/permission/
alignment fault). This commit pr

Add fault type to crash dump

Currently, when a data or instruction abort occurs in a TA, the crash
dump does not clearly show the fault type (translation/permission/
alignment fault). This commit prints out the fault type for all faults.

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Pascal Brand <pascal.brand@linaro.org>

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1243cb5101-Mar-2016 Jens Wiklander <jens.wiklander@linaro.org>

qemu_armv8a: use VIRT_SECURE_MEM as secure memory

Redefine secure memory as defined by VIRT_SECURE_MEM in QEMU

Secure SRAM is used by ARM-TF as 0x0e000000..0x0f000000
Define TZDRAM_BASE to 0x0e1000

qemu_armv8a: use VIRT_SECURE_MEM as secure memory

Redefine secure memory as defined by VIRT_SECURE_MEM in QEMU

Secure SRAM is used by ARM-TF as 0x0e000000..0x0f000000
Define TZDRAM_BASE to 0x0e100000 (size 0x00f00000)

Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (QEMU armv8a)
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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85d8305101-Mar-2016 Pascal Brand <pascal.brand@st.com>

TA: clean $(link-script-dep)

Cleaning TA $(link-script-dep) is especially important when
switching from 32bits mode to 64bits mode compilation of the TAs

Reviewed-by: Jerome Forissier <jerome.foris

TA: clean $(link-script-dep)

Cleaning TA $(link-script-dep) is especially important when
switching from 32bits mode to 64bits mode compilation of the TAs

Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Pascal Brand <pascal.brand@st.com>

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