libutils: add BIT and SHIFT macros

* Adds BIT32(nr) and BIT64(nr) macros to set a bit in a 32-bit or 64-bit
unsigned integer.
* Adds SHIFT_U32(v, shift) and SHIFT_U64(v, shift) macros to shift a v

libutils: add BIT and SHIFT macros

* Adds BIT32(nr) and BIT64(nr) macros to set a bit in a 32-bit or 64-bit
unsigned integer.
* Adds SHIFT_U32(v, shift) and SHIFT_U64(v, shift) macros to shift a value
resulting in a 32-bit or 64-bit unsigned integer.

Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: arm32: fix masking exceptions on exit

Before this patch FIQ and asynchronous abort wasn't masked on
all exit paths. This patch fixes that.

Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
Te

core: arm32: fix masking exceptions on exit

Before this patch FIQ and asynchronous abort wasn't masked on
all exit paths. This patch fixes that.

Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (QEMU)
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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drivers: gpio: fix write8 function argument order

Signed-off-by: Victor Chong <victor.chong@linaro.org>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>

core: fix TEE_ALG_RSASSA_PKCS1_* signing

Signing with the algorithms TEE_ALG_RSASSA_PKCS1_* allows an optional
parameter, salt length. If the salt lengths isn't supplied the default
value should be

core: fix TEE_ALG_RSASSA_PKCS1_* signing

Signing with the algorithms TEE_ALG_RSASSA_PKCS1_* allows an optional
parameter, salt length. If the salt lengths isn't supplied the default
value should be the length of the digest.

Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (QEMU)
Suggested-by: Cedric Chaumont <cedric.chaumont@st.com>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: ltc: dsa_sign() check size of hash

Checks size of supplied message to match the size of the digest prior
to signing the message. Similar to what is done in rsassa_sign() except
that the digest

core: ltc: dsa_sign() check size of hash

Checks size of supplied message to match the size of the digest prior
to signing the message. Similar to what is done in rsassa_sign() except
that the digest size must not exceed the modulus (q) size.

Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: fix attribute size check of transient object

Fixes bad check of attribute size when populating a transient object.

Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
Reviewed-by: Jerome Foriss

core: fix attribute size check of transient object

Fixes bad check of attribute size when populating a transient object.

Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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Documentation: tee_entry() is replaced

Updates the debug documentation to use tee_entry_std() as an
example instead of tee_entry().

Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-

Documentation: tee_entry() is replaced

Updates the debug documentation to use tee_entry_std() as an
example instead of tee_entry().

Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Signed-off-by: Radhesh Krishnan Konoth <radheshkrishnank@gmail.com>

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Change some fs messages to debug

Trying to open a file that doesn't exist, or trying to write to a file
that does exist are part of normal use of a filesystem. Demote these
two messages to debug in

Change some fs messages to debug

Trying to open a file that doesn't exist, or trying to write to a file
that does exist are part of normal use of a filesystem. Demote these
two messages to debug instead of error to avoid flooding the error log
with messages that come from ordinary use.

Signed-off-by: David Brown <david.brown@linaro.org>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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Update travis for gcc5

Signed-off-by: Joakim Bech <joakim.bech@linaro.org>
Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>

core: arm: invalidate i-cache inner shareable

When invalidating i-cache and branch predictor use inner shareable
(icialluis and bpiallis) versions of the operations to make it visible
to other cores

core: arm: invalidate i-cache inner shareable

When invalidating i-cache and branch predictor use inner shareable
(icialluis and bpiallis) versions of the operations to make it visible
to other cores.

Fixes occasional problem with pager with multiple active threads.

Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (HiKey)
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

show more ...

drivers: add gpio framework and pl061 driver

Suggested-by: Haojian Zhuang <haojian.zhuang@linaro.org>
Signed-off-by: Victor Chong <victor.chong@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklande

drivers: add gpio framework and pl061 driver

Suggested-by: Haojian Zhuang <haojian.zhuang@linaro.org>
Signed-off-by: Victor Chong <victor.chong@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Pascal Brand <pascal.brand@linaro.org>

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Persistent objects: save handle information

When creating a Persistent Object (TEE_CreatePersistentObject)
using an object handle, the information and attributes related
to the handle are saved.

Th

Persistent objects: save handle information

When creating a Persistent Object (TEE_CreatePersistentObject)
using an object handle, the information and attributes related
to the handle are saved.

The information are restored when opening the object
(TEE_OpenPersistentObject)

Fixes #785

Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Pascal Brand <pascal.brand@st.com>

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core: fix fiq delivery in Aarch64

Prior to this patch reception of a FIQ while in secure user mode (secure
EL0) would be treated as if an IRQ was received instead. This resulted
in an exit to normal

core: fix fiq delivery in Aarch64

Prior to this patch reception of a FIQ while in secure user mode (secure
EL0) would be treated as if an IRQ was received instead. This resulted
in an exit to normal world and when FIQ was unmasked it would be
re-triggered but this time received as an FIQ received while in normal
world.

This patch fixes this and handles FIQ directly when received while in
secure user mode.

Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (FVP)
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: bugfix generic boot init_runtime()

Fixes confusion of virtual and physical addresses in init_runtime() in
core/arch/arm/kernel/generic_boot.c.

Tested-by: Pascal Brand <pascal.brand@linaro.org

core: bugfix generic boot init_runtime()

Fixes confusion of virtual and physical addresses in init_runtime() in
core/arch/arm/kernel/generic_boot.c.

Tested-by: Pascal Brand <pascal.brand@linaro.org> (STM)
Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Tested-by: Jerome Forissier <jerome.forissier@linaro.org> (HiKey)
Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (QEMU)
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: add core_mmu_get_type_by_pa()

Adds core_mmu_get_type_by_pa() to find memory type based on physical
address.

Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Reviewed-by: Joakim Bech <joaki

core: add core_mmu_get_type_by_pa()

Adds core_mmu_get_type_by_pa() to find memory type based on physical
address.

Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: pl310 functions take a base address

Updates PL310 functions to take a base address of the PL310 device to be
able to handle non-linear mappings.

Reviewed-by: Pascal Brand <pascal.brand@linaro

core: pl310 functions take a base address

Updates PL310 functions to take a base address of the PL310 device to be
able to handle non-linear mappings.

Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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plat-stm: translate uart base address before use

Translates physical addresses used for uart register base addresses
before use to be able to handle non-linear mapping of addresses.

Reviewed-by: Pa

plat-stm: translate uart base address before use

Translates physical addresses used for uart register base addresses
before use to be able to handle non-linear mapping of addresses.

Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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plat-imx: translate pa base addr before use

Translates physical addresses used for register base addresses before
use to be able to handle non-linear mapping of addresses.

Reviewed-by: Pascal Brand

plat-imx: translate pa base addr before use

Translates physical addresses used for register base addresses before
use to be able to handle non-linear mapping of addresses.

Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

show more ...

plat-ls: translate pa base addr before use

Translates physical addresses used for register base addresses before
use to be able to handle non-linear mapping of addresses.

Reviewed-by: Pascal Brand

plat-ls: translate pa base addr before use

Translates physical addresses used for register base addresses before
use to be able to handle non-linear mapping of addresses.

Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

show more ...

plat-mediatek: translate pa base addr before use

Translates physical addresses used for register base addresses before
use to be able to handle non-linear mapping of addresses.

Reviewed-by: Pascal

plat-mediatek: translate pa base addr before use

Translates physical addresses used for register base addresses before
use to be able to handle non-linear mapping of addresses.

Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

show more ...

plat-ti: translate pa base addr before use

Translates physical addresses used for register base addresses before
use to be able to handle non-linear mapping of addresses.

Reviewed-by: Pascal Brand

plat-ti: translate pa base addr before use

Translates physical addresses used for register base addresses before
use to be able to handle non-linear mapping of addresses.

Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

show more ...

plat-hikey: translate pa base addr before use

Translates physical addresses used for register base addresses before
use to be able to handle non-linear mapping of addresses.

Reviewed-by: Pascal Bra

plat-hikey: translate pa base addr before use

Translates physical addresses used for register base addresses before
use to be able to handle non-linear mapping of addresses.

Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

show more ...

plat-sunxi: translate pa base addr before use

Translates physical addresses used for register base addresses before
use to be able to handle non-linear mapping of addresses.

Reviewed-by: Pascal Bra

plat-sunxi: translate pa base addr before use

Translates physical addresses used for register base addresses before
use to be able to handle non-linear mapping of addresses.

Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

show more ...

plat-vexpress: translate pa base addr before use

Translates physical addresses used for register base addresses before
use to be able to handle non-linear mapping of addresses.

Reviewed-by: Pascal

plat-vexpress: translate pa base addr before use

Translates physical addresses used for register base addresses before
use to be able to handle non-linear mapping of addresses.

Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

show more ...

ltc: Fix CFG_CRYPTO=n CFG_CRYPTO_ECC=y

Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org
Signed-off-by: Pascal Brand <pascal.brand@st.com>