core: bugfix generic boot init_runtime()

Fixes confusion of virtual and physical addresses in init_runtime() in
core/arch/arm/kernel/generic_boot.c.

Tested-by: Pascal Brand <pascal.brand@linaro.org

core: bugfix generic boot init_runtime()

Fixes confusion of virtual and physical addresses in init_runtime() in
core/arch/arm/kernel/generic_boot.c.

Tested-by: Pascal Brand <pascal.brand@linaro.org> (STM)
Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Tested-by: Jerome Forissier <jerome.forissier@linaro.org> (HiKey)
Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (QEMU)
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: add core_mmu_get_type_by_pa()

Adds core_mmu_get_type_by_pa() to find memory type based on physical
address.

Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Reviewed-by: Joakim Bech <joaki

core: add core_mmu_get_type_by_pa()

Adds core_mmu_get_type_by_pa() to find memory type based on physical
address.

Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: pl310 functions take a base address

Updates PL310 functions to take a base address of the PL310 device to be
able to handle non-linear mappings.

Reviewed-by: Pascal Brand <pascal.brand@linaro

core: pl310 functions take a base address

Updates PL310 functions to take a base address of the PL310 device to be
able to handle non-linear mappings.

Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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plat-stm: translate uart base address before use

Translates physical addresses used for uart register base addresses
before use to be able to handle non-linear mapping of addresses.

Reviewed-by: Pa

plat-stm: translate uart base address before use

Translates physical addresses used for uart register base addresses
before use to be able to handle non-linear mapping of addresses.

Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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plat-imx: translate pa base addr before use

Translates physical addresses used for register base addresses before
use to be able to handle non-linear mapping of addresses.

Reviewed-by: Pascal Brand

plat-imx: translate pa base addr before use

Translates physical addresses used for register base addresses before
use to be able to handle non-linear mapping of addresses.

Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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plat-ls: translate pa base addr before use

Translates physical addresses used for register base addresses before
use to be able to handle non-linear mapping of addresses.

Reviewed-by: Pascal Brand

plat-ls: translate pa base addr before use

Translates physical addresses used for register base addresses before
use to be able to handle non-linear mapping of addresses.

Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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plat-mediatek: translate pa base addr before use

Translates physical addresses used for register base addresses before
use to be able to handle non-linear mapping of addresses.

Reviewed-by: Pascal

plat-mediatek: translate pa base addr before use

Translates physical addresses used for register base addresses before
use to be able to handle non-linear mapping of addresses.

Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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plat-ti: translate pa base addr before use

Translates physical addresses used for register base addresses before
use to be able to handle non-linear mapping of addresses.

Reviewed-by: Pascal Brand

plat-ti: translate pa base addr before use

Translates physical addresses used for register base addresses before
use to be able to handle non-linear mapping of addresses.

Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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plat-hikey: translate pa base addr before use

Translates physical addresses used for register base addresses before
use to be able to handle non-linear mapping of addresses.

Reviewed-by: Pascal Bra

plat-hikey: translate pa base addr before use

Translates physical addresses used for register base addresses before
use to be able to handle non-linear mapping of addresses.

Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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plat-sunxi: translate pa base addr before use

Translates physical addresses used for register base addresses before
use to be able to handle non-linear mapping of addresses.

Reviewed-by: Pascal Bra

plat-sunxi: translate pa base addr before use

Translates physical addresses used for register base addresses before
use to be able to handle non-linear mapping of addresses.

Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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plat-vexpress: translate pa base addr before use

Translates physical addresses used for register base addresses before
use to be able to handle non-linear mapping of addresses.

Reviewed-by: Pascal

plat-vexpress: translate pa base addr before use

Translates physical addresses used for register base addresses before
use to be able to handle non-linear mapping of addresses.

Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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ltc: Fix CFG_CRYPTO=n CFG_CRYPTO_ECC=y

Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org
Signed-off-by: Pascal Brand <pascal.brand@st.com>

travis: crypto testing

- Force CFG_ENC_FS=n so that AES and hash function are not
forced
- Test configuration without CFG_CRYPTO apart CFG_CRYPTO_ECC

Reviewed-by: Jerome Forissier <jerome.forissi

travis: crypto testing

- Force CFG_ENC_FS=n so that AES and hash function are not
forced
- Test configuration without CFG_CRYPTO apart CFG_CRYPTO_ECC

Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org
Sign up for freeSigned-off-by: Pascal Brand <pascal.brand@st.com>

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doc: pulling a pull-request

Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Pascal Brand <pascal.brand@st.com>

doc: fix end-of line

Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Pascal Brand <pascal.brand@st.com>

core: bugfix tee_svc_copy_param()

tee_svc_copy_param() was doing a phys_to_virt() as if the physical
memory was in TEE ram. This patch fixes that by doing the lookup in TA
ram instead.

Reviewed-by:

core: bugfix tee_svc_copy_param()

tee_svc_copy_param() was doing a phys_to_virt() as if the physical
memory was in TEE ram. This patch fixes that by doing the lookup in TA
ram instead.

Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Tested-by: Pascal Brand <pascal.brand@linaro.org> (STM)
Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (QEMU)
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: bugfix teecore_init_*_ram()

Fixes confusion of virtual and physical addresses in
teecore_init_ta_ram() and teecore_init_pub_ram().

Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>

core: bugfix teecore_init_*_ram()

Fixes confusion of virtual and physical addresses in
teecore_init_ta_ram() and teecore_init_pub_ram().

Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: bugfix address translation for user TA entry

Bugfixes address translation for user TA stack pointer and pointer
to parameters.

Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Revi

core: bugfix address translation for user TA entry

Bugfixes address translation for user TA stack pointer and pointer
to parameters.

Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: remove kmap interface

Removes kmap interface as the secure DDR memory is mapped already.

Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Pascal Brand <pascal.brand@li

core: remove kmap interface

Removes kmap interface as the secure DDR memory is mapped already.

Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: bugfix pcsc driver

Fixes pscs driver to translate base address of register to virtual
address before use to be able to handle non-linear mapping of memory.

Reviewed-by: Jerome Forissier <jero

core: bugfix pcsc driver

Fixes pscs driver to translate base address of register to virtual
address before use to be able to handle non-linear mapping of memory.

Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: lpae workaround for user mapping

User mapping for LPAE depends on not using the first entry in the top
translation table. This workaround makes sure that the first entry never
is used.

Review

core: lpae workaround for user mapping

User mapping for LPAE depends on not using the first entry in the top
translation table. This workaround makes sure that the first entry never
is used.

Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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plat-vexpress: bugfix mapping of console uart

Bugfixes mapping of console uart to use secure device instead of
non-secure device type.

Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Re

plat-vexpress: bugfix mapping of console uart

Bugfixes mapping of console uart to use secure device instead of
non-secure device type.

Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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plat-sunxi: refactor memory configuration

Refactors memory configuration to use the same memory configuration
scheme as all the other platforms.

Reviewed-by: Jerome Forissier <jerome.forissier@lina

plat-sunxi: refactor memory configuration

Refactors memory configuration to use the same memory configuration
scheme as all the other platforms.

Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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Import libpng 1.6.21

Imports libpng 1.6.21 from git://git.code.sf.net/p/libpng/code,
tag ibpng-1.6.21-master-signed

This library is built as a user-mode lib only and is needed to be able
to support

Import libpng 1.6.21

Imports libpng 1.6.21 from git://git.code.sf.net/p/libpng/code,
tag ibpng-1.6.21-master-signed

This library is built as a user-mode lib only and is needed to be able
to support png images used in Trusted UI.

Internal test files and other unused files are removed.

Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (QEMU)
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: secure storage: dual filesystems support

Adds support for multiple filesystems by keeping a pointer to
tee_file_operations in the tee_pobj and tee_storage_enum structures.

Two identifiers are

core: secure storage: dual filesystems support

Adds support for multiple filesystems by keeping a pointer to
tee_file_operations in the tee_pobj and tee_storage_enum structures.

Two identifiers are added to the API to be used as the storage_id
parameter, so that TAs may dynamically choose the filesystem:
- TEE_STORAGE_PRIVATE_REE (requires CFG_REE_FS=y)
- TEE_STORAGE_PRIVATE_RPMB (requires CFG_RPMB_FS=y)
The value TEE_STORAGE_PRIVATE will select the REE FS if available,
otherwise RPMB. At least one FS has to be enabled at build time. Only
the REE filesystem is enabled by default.

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Pascal Brand <pascal.brand@linaro.org>

show more ...