| 04ec0d2d | 10-Apr-2017 |
Etienne Carriere <etienne.carriere@linaro.org> |
core: fix non-LPAE mapping against unmapped areas
Core defines some virtual memory than should not be default mapped. Yet core_mmu_v7.c loads a non null descriptor in MMU tables for such memories: a
core: fix non-LPAE mapping against unmapped areas
Core defines some virtual memory than should not be default mapped. Yet core_mmu_v7.c loads a non null descriptor in MMU tables for such memories: attributes are null (which makes the page effectively not mapped) but a meaningless non null physical page address is loaded. This change
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| ee203c1c | 10-Apr-2017 |
Etienne Carriere <etienne.carriere@linaro.org> |
core: move place where TEE_RAM mapping region size is forced
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> |
| 9efffc34 | 10-Apr-2017 |
Etienne Carriere <etienne.carriere@linaro.org> |
core: move mmap trace into a specific routine
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> |
| 6fd2f72a | 10-Apr-2017 |
Etienne Carriere <etienne.carriere@linaro.org> |
core: fix memory mapping overlapping sequence
Before this patch, the overlapping memory ranges where detected only if the lower physical range was registered before the higher overlapping physical r
core: fix memory mapping overlapping sequence
Before this patch, the overlapping memory ranges where detected only if the lower physical range was registered before the higher overlapping physical range.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| bd5f930a | 10-Apr-2017 |
Etienne Carriere <etienne.carriere@linaro.org> |
core: fix plat-stm iomem mapping
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> |
| 303753fa | 10-Apr-2017 |
Etienne Carriere <etienne.carriere@linaro.org> |
core: remove useless rounding for registered io memory
This change removes useless rounding on registered io memory for the platforms maintained by Linaro.
Also remove registering of GIC iomem on p
core: remove useless rounding for registered io memory
This change removes useless rounding on registered io memory for the platforms maintained by Linaro.
Also remove registering of GIC iomem on plat-mediatek as the platform does not use the GIC resources.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 59fffc71 | 12-Apr-2017 |
Etienne Carriere <etienne.carriere@linaro.org> |
core: deprecate DEVICEx_TYPE/_PA_BASE/_SIZE
Macros DEVICEx_TYPE, DEVICEx_PA_BASE and DEVICEx__SIZE used to help platform to register their address range mapping requirements. These are now deprecate
core: deprecate DEVICEx_TYPE/_PA_BASE/_SIZE
Macros DEVICEx_TYPE, DEVICEx_PA_BASE and DEVICEx__SIZE used to help platform to register their address range mapping requirements. These are now deprecated since platform should use the more flexible register_phys_mem() macro.
This change removes all occurrences of DEVICEx_TYPE/_PA_BASE/_SIZE and use the register_phys_mem() instead.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 73595e4c | 12-Apr-2017 |
Etienne Carriere <etienne.carriere@linaro.org> |
core: fix register_XXX_mem() against physical address
Use __COUNTER__ instead of the registered physical address to generate the label of the structure defined by the macros __register_phys_mem() an
core: fix register_XXX_mem() against physical address
Use __COUNTER__ instead of the registered physical address to generate the label of the structure defined by the macros __register_phys_mem() and __register_sdp_mem().
Before this change, when argument "addr" is used, one cannot use these macros providing an address that is the result of a local operation.
I.e This implementation was not possible: __register_phys_mem(<any-id>, ROUNDUP(<addr>, <value>), <size>); and one needed to use a temporary macro for the address computation: #define MY_BASE_ADDRESS ROUNDUP(<addr>, <value>) __register_phys_mem(<any-id>, MY_BASE_ADDRESS, <size>);
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 13301e12 | 06-Apr-2017 |
Jens Wiklander <jens.wiklander@linaro.org> |
mk/subdir.mk: clear gen-srcs when initializing
When initializing in mk/subdir.mk to process another sub.mk clear gen-srcs also to avoid leftovers from previous sub.mk.
Reviewed-by: Etienne Carriere
mk/subdir.mk: clear gen-srcs when initializing
When initializing in mk/subdir.mk to process another sub.mk clear gen-srcs also to avoid leftovers from previous sub.mk.
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Tested-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| d5fe340f | 21-Mar-2017 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: FS: remove redundant fields from struct tee_svc_storage_head
Removes the unused/redundant fields magic, head_size, ds_size from struct tee_svc_storage_head. meta_size is renamed to attr_size t
core: FS: remove redundant fields from struct tee_svc_storage_head
Removes the unused/redundant fields magic, head_size, ds_size from struct tee_svc_storage_head. meta_size is renamed to attr_size to better reflect the usage.
The size of the data stream is calculated from the total size of the file minus attr_size. This makes the header static after it's initialized.
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (QEMU) Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 73ea1cde | 21-Mar-2017 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: FS: let FOP->create() initialize the new file
Moves the code from syscall_storage_obj_create() that does several calls via the FOP interface into FOP->create() instead. With this all updates c
core: FS: let FOP->create() initialize the new file
Moves the code from syscall_storage_obj_create() that does several calls via the FOP interface into FOP->create() instead. With this all updates can be performed while the mutex is held. This makes the create operation easier to optimize as each call via the FOP interface is atomic.
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 69306abd | 15-Feb-2017 |
Volodymyr Babchuk <vlad.babchuk@gmail.com> |
tee_mm: add locking while working with pool->entry
This fixes race condition in linked list handling.
Signed-off-by: Volodymyr Babchuk <vlad.babchuk@gmail.com> Reviewed-by: Jens Wiklander <jens.wik
tee_mm: add locking while working with pool->entry
This fixes race condition in linked list handling.
Signed-off-by: Volodymyr Babchuk <vlad.babchuk@gmail.com> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
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| 40ea51de | 15-Feb-2017 |
Volodymyr Babchuk <vlad.babchuk@gmail.com> |
spinlock: add cpu_spin_lock_xsave()/xrestore() functions
These are functions like spin_lock_irqsave() functions in linux kernel. They should replace xxx_lock() functions in different modules.
Signe
spinlock: add cpu_spin_lock_xsave()/xrestore() functions
These are functions like spin_lock_irqsave() functions in linux kernel. They should replace xxx_lock() functions in different modules.
Signed-off-by: Volodymyr Babchuk <vlad.babchuk@gmail.com> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
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| 702609a7 | 17-Mar-2017 |
Jerome Forissier <jerome.forissier@linaro.org> |
Update CHANGELOG.md for 2.4.0
Signed-off-by: Joakim Bech <joakim.bech@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Tested-by: Peng Fan <peng.fan@nxp.com> (imx6ulevk) Tested-by
Update CHANGELOG.md for 2.4.0
Signed-off-by: Joakim Bech <joakim.bech@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Tested-by: Peng Fan <peng.fan@nxp.com> (imx6ulevk) Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (Juno) Tested-by: Etienne Carriere <etienne.carriere@linaro.org> (b2260, GP) Tested-by: Jerome Forissier <jerome.forissier@linaro.org> (HiKey) Tested-by: Jerome Forissier <jerome.forissier@linaro.org> (D02) Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (QEMU v7) Tested-by: Joakim Bech <joakim.bech@linaro.org> (MTK8173) Tested-by: Joakim Bech <joakim.bech@linaro.org> (QEMU v8) Tested-by: Sumit Garg <sumit.garg@nxp.com> (ls1021atwr - Single core) Tested-by: Sören Brinkmann <soren.brinkmann@xilinx.com> (zynqmp) Tested-by: Volodymyr Babchuk <vlad.babchuk@gmail.com> (RCAR H3) Tested-by: Igor Opaniuk <igor.opaniuk@linaro.org> (RPi3) Tested-by: Andrew F. Davis <afd@ti.com> (TI-DRA7xx)
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| 771ba399 | 07-Apr-2017 |
Etienne Carriere <etienne.carriere@st.com> |
core: increase size of the exception stack in AArch32 mode
'stack_abt' is too small when pager is enabled and needs to be increased. 'stack_abt' is used for aborts (prefetch/data/undef) and native/f
core: increase size of the exception stack in AArch32 mode
'stack_abt' is too small when pager is enabled and needs to be increased. 'stack_abt' is used for aborts (prefetch/data/undef) and native/foreign interruptions exceptions.
Tests on ARMv7 targets show that between 1000 and 1500 bytes of these stacks are consumed at runtime. Tests considered configurations with trace/debug/LPAE/VFP enabled and disabled. Tests were based on running OP-TEE with the xtest non-regression suite.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com> Tested-by: Etienne Carriere <etienne.carriere@st.com> (qemu_virt/b2260) Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 1149e39f | 04-Apr-2017 |
Volodymyr Babchuk <vlad.babchuk@gmail.com> |
core_mmu: round VAs to region size
Entries in memory map are sorted by address, not by region size. So, if entries have region size 2M, 4k, 2M, ... then all maps after second one will be misaligned.
core_mmu: round VAs to region size
Entries in memory map are sorted by address, not by region size. So, if entries have region size 2M, 4k, 2M, ... then all maps after second one will be misaligned. Thus, we need to explicitly round virtual addresses.
Signed-off-by: Volodymyr Babchuk <vlad.babchuk@gmail.com> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Tested-by: Etienne Carriere <etienne.carriere@linaro.org> (qemu_virt)
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| 794b6437 | 04-Apr-2017 |
Volodymyr Babchuk <vlad.babchuk@gmail.com> |
drivers: scif: enable TX during initialization
Newer version of TF disables TX and RX modules of SCIF before jumping to OP-TEE. We need to enable TX back.
Signed-off-by: Volodymyr Babchuk <vlad.bab
drivers: scif: enable TX during initialization
Newer version of TF disables TX and RX modules of SCIF before jumping to OP-TEE. We need to enable TX back.
Signed-off-by: Volodymyr Babchuk <vlad.babchuk@gmail.com> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
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| 47ff9bf0 | 04-Apr-2017 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: fix compile error with CFG_WITH_USER_TA=n
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Fixes: 040bc0f04138 ("core: add test case for hash-tree") Signed-off-by: Jens Wiklander <j
core: fix compile error with CFG_WITH_USER_TA=n
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Fixes: 040bc0f04138 ("core: add test case for hash-tree") Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 55fc50e8 | 24-Mar-2017 |
Joakim Bech <joakim.bech@linaro.org> |
docs: create porting_guidelines.md
Signed-off-by: Joakim Bech <joakim.bech@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> |
| 040bc0f0 | 03-Apr-2017 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: add test case for hash-tree
Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (QEMU) Signed-off-by: Jens Wiklander <jens.wiklander@
core: add test case for hash-tree
Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (QEMU) Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| e2adafec | 03-Apr-2017 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: FS: htree: fix undo update
Updates of the hash-tree can be undone by closing the hash-tree before tee_fs_htree_sync_to_storage() is called.
Before this patch the hash-tree was left in a half
core: FS: htree: fix undo update
Updates of the hash-tree can be undone by closing the hash-tree before tee_fs_htree_sync_to_storage() is called.
Before this patch the hash-tree was left in a half updated state if tee_fs_htree_close() was called before tee_fs_htree_sync_to_storage().
Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 64fa6c0a | 03-Apr-2017 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: FS: htree: add rpc final callbacks
Adds rpc final callbacks to struct tee_fs_htree_storage to make the it possible to isolate the hash tree implementation for test.
Reviewed-by: Etienne Carri
core: FS: htree: add rpc final callbacks
Adds rpc final callbacks to struct tee_fs_htree_storage to make the it possible to isolate the hash tree implementation for test.
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 3d039707 | 03-Apr-2017 |
Etienne Carriere <etienne.carriere@linaro.org> |
core: fix typo in pager mapping setup
This change fixes a typo in the core mapping setup when pager is enabled. Looking back in OP-TEE history shows this typo has been there since quite a while howe
core: fix typo in pager mapping setup
This change fixes a typo in the core mapping setup when pager is enabled. Looking back in OP-TEE history shows this typo has been there since quite a while however various build tests based on old code showed the previous buggy implementation luckily gave valid settings. Yet, it looks far better once fixed.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 0cb71d15 | 03-Apr-2017 |
Etienne Carriere <etienne.carriere@st.com> |
core: move plat-stm consoles to generic console framework
Signed-off-by: Etienne Carriere <etienne.carriere@st.com> Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> |
| 39e661bc | 03-Apr-2017 |
Etienne Carriere <etienne.carriere@st.com> |
core: move stih UART driver to the drivers/ directory
Signed-off-by: Etienne Carriere <etienne.carriere@st.com> Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> |