core: add vm_remap()

Adds vm_remap() to allow changing virtual address of an already
established mapping

Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Signed-off-by: Jens Wiklander <j

core: add vm_remap()

Adds vm_remap() to allow changing virtual address of an already
established mapping

Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: split TEE_MATTR_* defines

Splits the TEE_MATTR_* defines into two groups, TEE_MATTR_* and VM_FLAG_*.
TEE_MATTR_* is restored to only handle mappings attributes and permissions.
The new group V

core: split TEE_MATTR_* defines

Splits the TEE_MATTR_* defines into two groups, TEE_MATTR_* and VM_FLAG_*.
TEE_MATTR_* is restored to only handle mappings attributes and permissions.
The new group VM_FLAG_* is added to tag regions with purpose and such.

As a consequence user_ta_map(), vm_map_pad() and vm_map() takes one more
argument, the flags field.

struct vm_region also gains a flags field, but since only the lower bits
are used in the flags and attr fields they are each stored as uint16_t
instead.

Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: simplify umap_add_region()

Simplifies umap_add_region() and select_va_in_range() by using dummy
regions for start and end of range.

Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>

core: simplify umap_add_region()

Simplifies umap_add_region() and select_va_in_range() by using dummy
regions for start and end of range.

Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: vm_map_pad(): remove TEE_MATTR_PERMANENT test

Removes the unneeded TEE_MATTR_PERMANENT test for a paged mobj before
calling tee_pager_add_uta_area().

Acked-by: Jerome Forissier <jerome.foriss

core: vm_map_pad(): remove TEE_MATTR_PERMANENT test

Removes the unneeded TEE_MATTR_PERMANENT test for a paged mobj before
calling tee_pager_add_uta_area().

Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: change vm_set_prot() to only accept prot bits

Changes vm_set_prot() to only accept prot bits as defined by
TEE_MATTR_PROT_MASK.

Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Sig

core: change vm_set_prot() to only accept prot bits

Changes vm_set_prot() to only accept prot bits as defined by
TEE_MATTR_PROT_MASK.

Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: only pass prot bits to tee_pager_add_uta_area()

Fixes vm_map_pad() to only pass the prot bits (TEE_MATTR_PROT_MASK) to
tee_pager_add_uta_area().

Fixes: 2616b1036291 ("core: add prot arg to te

core: only pass prot bits to tee_pager_add_uta_area()

Fixes vm_map_pad() to only pass the prot bits (TEE_MATTR_PROT_MASK) to
tee_pager_add_uta_area().

Fixes: 2616b1036291 ("core: add prot arg to tee_pager_add_uta_area()")
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: remove unused TEE_MATTR_LOCKED

Removes the now unused TEE_MATTR_LOCKED macro.

Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.

core: remove unused TEE_MATTR_LOCKED

Removes the now unused TEE_MATTR_LOCKED macro.

Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: remove obsolete TEE_MMU_UMAP_* defines

Removes the now obsolete TEE_MMU_UMAP_* defines.

Fixes: 211417d3a487 ("core: more flexible ta mapping")
Reviewed-by: Jerome Forissier <jerome.forissier@

core: remove obsolete TEE_MMU_UMAP_* defines

Removes the now obsolete TEE_MMU_UMAP_* defines.

Fixes: 211417d3a487 ("core: more flexible ta mapping")
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: imx: add mx6sxsabresd platform flavor

Add mx6sxsabresd platform flavor to mx6sx.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>

core: imx: add mx6solo platform flavors

Add mx6solosabresd and mx6solosabreauto platform flavors to mx6s.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.co

core: imx: add mx6solo platform flavors

Add mx6solosabresd and mx6solosabreauto platform flavors to mx6s.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>

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core: imx: add mx6qsabreauto platform flavor

Add mx6qsabreauto platform flavor to mx6q.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>

core: imx: add mx6dlsabreauto platform flavor

Add mx6dlsabreauto platform flavor to mx6dl.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>

core: imx: add mx6ul9x9evk platform flavor

Add mx6ul9x9evk platform flavor to mx6ul.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>

core: imx: add imx6qp board support

Add imx6qp board support.
Add two imx6qp platform flavors:
* imx6qpsabresd
* imx6qpsabreauto

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Reviewed-by:

core: imx: add imx6qp board support

Add imx6qp board support.
Add two imx6qp platform flavors:
* imx6qpsabresd
* imx6qpsabreauto

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>

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core: imx: update PL310 settings

Move PL310 settings for mx6q, 6dl, 6solo to a dedicated file in plat-imx
config folder.
Update PL310 settings.

Signed-off-by: Silvano di Ninno <silvano.dininno@nxp.

core: imx: update PL310 settings

Move PL310 settings for mx6q, 6dl, 6solo to a dedicated file in plat-imx
config folder.
Update PL310 settings.

Signed-off-by: Silvano di Ninno <silvano.dininno@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>

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core: imx: move plat_cpu_reset_late() function

Remove platform specific imx6 file.
Move plat_cpu_reset_late() function to main file.

Signed-off-by: Silvano di Ninno <silvano.dininno@nxp.com>
Review

core: imx: move plat_cpu_reset_late() function

Remove platform specific imx6 file.
Move plat_cpu_reset_late() function to main file.

Signed-off-by: Silvano di Ninno <silvano.dininno@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>

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core: imx: add SCU module

Move SCU initialization to a separate file. Update it as a driver
module.

Signed-off-by: Cedric Neveux <cedric.neveux@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>

core: imx: add CSU module

Centralize CSU settings in one file. Update it as a driver module.

Signed-off-by: Cedric Neveux <cedric.neveux@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>

core: imx: disable CAAM for imx6ull

The imx6ull does not feature the CAAM.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>

core: imx: update CAAM initialization

Change CAAM initialization to a driver model.
Add CAAM base address check.
Move imx_caam.c to drivers folder.

Signed-off-by: Silvano di Ninno <silvano.dininno@

core: imx: update CAAM initialization

Change CAAM initialization to a driver model.
Add CAAM base address check.
Move imx_caam.c to drivers folder.

Signed-off-by: Silvano di Ninno <silvano.dininno@nxp.com>
Signed-off-by: Clement Faure <clement.faure@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>

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ta_bin_to_c.py: mark as python3 script

This commit marks the script as a python3 script and update
hex string conversion accordingly.

Moving to python3 requires a change in hex string conversion.
I

ta_bin_to_c.py: mark as python3 script

This commit marks the script as a python3 script and update
hex string conversion accordingly.

Moving to python3 requires a change in hex string conversion.
It causes by `zlib.compress()` behaving differently in python2
and python3. It returns a string in python2, and it returns
a bytes object in python3.

With python3 `zlib.compress()` behavior, we can use hex() to
convert bytes[i] of type int into a hex string.

Signed-off-by: Pipat Methavanitpong <pipat.methavanitpong@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Rouven Czerwinski <r.czerwinski@pengutronix.de>

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ldelf: accurate non-legacy TA check

Prior to this patch ldelf relied on e_entry in the ELF header to point
anywhere but at the lowest possible executable address to tell that it's
not a legacy TA. T

ldelf: accurate non-legacy TA check

Prior to this patch ldelf relied on e_entry in the ELF header to point
anywhere but at the lowest possible executable address to tell that it's
not a legacy TA. This isn't enough since all TAs can use this entry
address depending on compiler and linker. The only reliable indicator
that the TA is not a legacy TA is that the depr_entry field of the TA
header is UINT64_MAX. Unfortunately this means assuming that the ELF is
not a legacy TA at load time and that the process needs to be restarted
in case it turns out that it was a legacy TA.

With this patch we have reliable detection of non-legacy TAs, but with
increased load time for legacy TAs since the main ELF needs to be loaded
and verified twice due to the TA store interface.

Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: mmu: Update TCR_EL1 register when new physical address added

Suppose in init stage all physical memory registered is in 0-4G,
the IPS bits (bit34-32) is set 0. Later a physical address 0x10000

core: mmu: Update TCR_EL1 register when new physical address added

Suppose in init stage all physical memory registered is in 0-4G,
the IPS bits (bit34-32) is set 0. Later a physical address 0x100000000
is dynamically mapping with core_mmu_add_mapping, since 0x100000000
is higher than 4G, the IPS bits of TCR_EL1 register should be updated
to 0x1. Otherwise the below panic occurs:

E/TC:00 check_pa_matches_va:1805 va 0x82a00000 maps 0x100000000, expect 0x0

As currently TCR_EL1 register is only set in init stage, this patch
also updates the register in core_mmu_add_mapping.

Signed-off-by: Fangsuo Wu <fangsuowu@asrmicro.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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tee_ree_fs: create dirfile only when it's not found

Currently there's no check of return value of tee_fs_dirfile_open,
it's reasonable to do this when dir file truely doesn't exist.
However, if tee_

tee_ree_fs: create dirfile only when it's not found

Currently there's no check of return value of tee_fs_dirfile_open,
it's reasonable to do this when dir file truely doesn't exist.
However, if tee_fs_dirfile_open fails with other reason, calling
tee_fs_dirfile_open(true..) will overlap the old dir file, thus
file access in the future will fail.

Signed-off-by: Fangsuo Wu <fangsuowu@asrmicro.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: remove useless .section directives

A few assembler files contain ".section .text.<something>" but these
sections do not appear to be used anywhere. In addition, the functions
defined in the fi

core: remove useless .section directives

A few assembler files contain ".section .text.<something>" but these
sections do not appear to be used anywhere. In addition, the functions
defined in the files are always put in their own section anyway,
(.text.<function_name>), because of the -ffunction-sections flag.
Therefore, let's remove the useless directives.

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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