| 1b992ed7 | 31-Mar-2020 |
Etienne Carriere <etienne.carriere@st.com> |
plat-stm32mp1: clock: fix mcu/axi parent clock
Correct MCU clock parent selector: MCU subsystem clock is derived from clock PLL3_P, not PLL3.
Correct AXI clock parent selector: AXI subsystem clock
plat-stm32mp1: clock: fix mcu/axi parent clock
Correct MCU clock parent selector: MCU subsystem clock is derived from clock PLL3_P, not PLL3.
Correct AXI clock parent selector: AXI subsystem clock is derived from clock PLL2_P, not PLL2.
This change also renames MCU clock and AXI clock resources to prevent confusion.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com> Acked-by: Jerome Forissier <jerome@forissier.org>
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| 06bdcfe6 | 17-Dec-2019 |
Etienne Carriere <etienne.carriere@st.com> |
plat-stm32mp1: clock: remove oscillators and PLLs from shared resources
In stm32mp1 SoCs, oscillators, PLL1 and PLL2 are not resources allocated at runtime upon platform configuration in OP-TEE. The
plat-stm32mp1: clock: remove oscillators and PLLs from shared resources
In stm32mp1 SoCs, oscillators, PLL1 and PLL2 are not resources allocated at runtime upon platform configuration in OP-TEE. These are always considered under secure world control. This change removes them from the list of the shared resources.
Update function stm32mp_register_clock_parents_secure() accordingly.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com> Acked-by: Jerome Forissier <jerome@forissier.org>
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| 28f25d8d | 31-Mar-2020 |
Etienne Carriere <etienne.carriere@st.com> |
drivers/stm32_rng: register device as secure or non-secure
FDT data defines through the status/secure-status property whether RNG device is assigned to the secure world or to the non-secure world. T
drivers/stm32_rng: register device as secure or non-secure
FDT data defines through the status/secure-status property whether RNG device is assigned to the secure world or to the non-secure world. This change makes the device driver to register the peripheral assignation at boot time.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com> Acked-by: Rouven Czerwinski <r.czerwinski@pengutronix.de>
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| 32ce15ec | 31-Mar-2020 |
Etienne Carriere <etienne.carriere@st.com> |
drivers/stm32_etzpc: fix tzma configuration
Correct TZMAs configuration restore sequence at PM resume.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com> Acked-by: Rouven Czerwinski <r.czerw
drivers/stm32_etzpc: fix tzma configuration
Correct TZMAs configuration restore sequence at PM resume.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com> Acked-by: Rouven Czerwinski <r.czerwinski@pengutronix.de>
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| 85daf48c | 25-Mar-2020 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: check writeable in tee_svc_copy_param()
Check that the callee_params are writeable too in tee_svc_copy_param() as they will be updated in tee_svc_update_out_param() in case one of the paramete
core: check writeable in tee_svc_copy_param()
Check that the callee_params are writeable too in tee_svc_copy_param() as they will be updated in tee_svc_update_out_param() in case one of the parameters is an "out" parameter. To keep it simple always require callee_params to be writeable.
Reviewed-by: Joakim Bech <joakim.bech@linaro.org> Reported-by: Bastien Simondi <bsimondi@netflix.com> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 8a867bc8 | 30-Mar-2020 |
Rouven Czerwinski <r.czerwinski@pengutronix.de> |
shippable: build one imx platform with CFG_RPMB_FS
This should catch compile issues with the RPMB ready check.
Signed-off-by: Rouven Czerwinski <r.czerwinski@pengutronix.de> Acked-by: Jerome Foriss
shippable: build one imx platform with CFG_RPMB_FS
This should catch compile issues with the RPMB ready check.
Signed-off-by: Rouven Czerwinski <r.czerwinski@pengutronix.de> Acked-by: Jerome Forissier <jerome@forissier.org>
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| 2379e260 | 30-Mar-2020 |
Rouven Czerwinski <r.czerwinski@pengutronix.de> |
core: imx: fix function for rpmb ready check
This was not caught by me during the rebase and not caught by CI because we don't build any imx platform with CFG_RPMB_FS=y.
Reported-by: Jorge Ramirez-
core: imx: fix function for rpmb ready check
This was not caught by me during the rebase and not caught by CI because we don't build any imx platform with CFG_RPMB_FS=y.
Reported-by: Jorge Ramirez-Ortiz <jorge@foundries.io> Signed-off-by: Rouven Czerwinski <r.czerwinski@pengutronix.de> Acked-by: Jerome Forissier <jerome@forissier.org>
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| 6e4f8f17 | 12-Mar-2020 |
Etienne Carriere <etienne.carriere@linaro.org> |
ta: pkcs11: session commands support
Add and remove session from session list owned by the client session. Generate client session IDs using handle.c (produced indices like starting from 1).
entry_
ta: pkcs11: session commands support
Add and remove session from session list owned by the client session. Generate client session IDs using handle.c (produced indices like starting from 1).
entry_ck_open_session(): uses set_session_state() to default new session instances.
entry_ck_close_session() and entry_ck_close_all_sessions() use close_ck_session() to factorize session resource release.
entry_ck_session_info() reads session state as when called.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Rouven Czerwinski <r.czerwinski@pengutronix.de>
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| e084583e | 12-Mar-2020 |
Etienne Carriere <etienne.carriere@linaro.org> |
ta: pkcs11: register a client instance for each opened TEE session
Each TEE session open toward the TA creates a client reference. It can be used by command handlers to identify client. Client refer
ta: pkcs11: register a client instance for each opened TEE session
Each TEE session open toward the TA creates a client reference. It can be used by command handlers to identify client. Client reference is passed between TA and client library using the TEE session argument in the GPD TEE Client API. Value used is the client instance address in the TA (as a void *) and is abstracted with an opaque ID by OP-TEE Core between being exposed to client.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Rouven Czerwinski <r.czerwinski@pengutronix.de>
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| 22ada947 | 12-Mar-2020 |
Etienne Carriere <etienne.carriere@linaro.org> |
ta: pkcs11: handle database for various client references
Dump core/kernel/handle.c into PKCS11 TA source tree with some changes: - Remove ptr_destructor() support, - Adapt the TEE Internal APIs (I.
ta: pkcs11: handle database for various client references
Dump core/kernel/handle.c into PKCS11 TA source tree with some changes: - Remove ptr_destructor() support, - Adapt the TEE Internal APIs (I.e. TEE_MemMove() instead of memcpy()), - Produce 32bit IDs starting from 1, 0 is reserved as undefined reference.
Most handles return by the TA to the client are 32bit unsigned values as per TA API. handle.c will manage these IDs.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Rouven Czerwinski <r.czerwinski@pengutronix.de>
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| d21ec5f4 | 12-Mar-2020 |
Etienne Carriere <etienne.carriere@linaro.org> |
ta: pkcs11: add mechanism info and session command to helpers
Add mechanism info and session management command IDs in debug helpers of the PKCS11 TA.
Signed-off-by: Etienne Carriere <etienne.carri
ta: pkcs11: add mechanism info and session command to helpers
Add mechanism info and session management command IDs in debug helpers of the PKCS11 TA.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Rouven Czerwinski <r.czerwinski@pengutronix.de>
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| aaa6cf9d | 11-Mar-2020 |
Etienne Carriere <etienne.carriere@linaro.org> |
ta: pkcs11: define TA commands related to session management
Define commands PKCS11_CMD_CLOSE_SESSION, PKCS11_CMD_CLOSE_SESSION, PKCS11_CMD_CLOSE_SESSION and PKCS11_CMD_CLOSE_SESSION and related res
ta: pkcs11: define TA commands related to session management
Define commands PKCS11_CMD_CLOSE_SESSION, PKCS11_CMD_CLOSE_SESSION, PKCS11_CMD_CLOSE_SESSION and PKCS11_CMD_CLOSE_SESSION and related resources in the PKCS11 TA API.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Rouven Czerwinski <r.czerwinski@pengutronix.de>
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| db498484 | 26-Mar-2020 |
Jens Wiklander <jens.wiklander@linaro.org> |
rpmb: fix call to plat_rpmb_key_is_ready()
In tee_rpmb_write_and_verify_key() a call was recently added to check if the RPMB key was ready to be retrieved. But the function wasn't called in the new
rpmb: fix call to plat_rpmb_key_is_ready()
In tee_rpmb_write_and_verify_key() a call was recently added to check if the RPMB key was ready to be retrieved. But the function wasn't called in the new if statement, instead was just the address of the function tested to be non-NULL. So with this patch add the missing () to make it a function call.
Fixes: b1042535dc3e ("rpmb: function to block rpmb write per platform") Reviewed-by: Rouven Czerwinski <r.czerwinski@pengutronix.de> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 992096f8 | 17-Dec-2019 |
Etienne Carriere <etienne.carriere@st.com> |
plat-stm32mp1: change reset functions to get a timeout argument
Stm32mp1 reset function APIs now get a timeout argument and return an error if reset domain has not effectively reset when timeout has
plat-stm32mp1: change reset functions to get a timeout argument
Stm32mp1 reset function APIs now get a timeout argument and return an error if reset domain has not effectively reset when timeout has expired. A null timeout means the driver loads target reset state and return without waiting request domain reset state is reached.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 1d3ebedb | 17-Feb-2020 |
Etienne Carriere <etienne.carriere@linaro.org> |
ta: pkcs11: command to get mechanism info
Implement command PKCS11_CMD_MECHANISM_INFO for client to get information on a specific mechanism embedded in a token.
Signed-off-by: Etienne Carriere <eti
ta: pkcs11: command to get mechanism info
Implement command PKCS11_CMD_MECHANISM_INFO for client to get information on a specific mechanism embedded in a token.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Rouven Czerwinski <r.czerwinski@pengutronix.de> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 6f74919d | 04-Feb-2020 |
Etienne Carriere <etienne.carriere@linaro.org> |
ta: pkcs11: command to get mechanisms embedded in a token
Implement command PKCS11_CMD_MECHANISM_IDS for client to get IDs of the mechanisms embedded in a token
Signed-off-by: Etienne Carriere <eti
ta: pkcs11: command to get mechanisms embedded in a token
Implement command PKCS11_CMD_MECHANISM_IDS for client to get IDs of the mechanisms embedded in a token
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Rouven Czerwinski <r.czerwinski@pengutronix.de> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 8849c126 | 18-Feb-2020 |
Etienne Carriere <etienne.carriere@linaro.org> |
ta: pkcs11: support for mechanism embedded in a token
Implement token_capabilities.c to centralize the mechanisms supported by a token. As PKCS11 TA can implemented several token, each token may pro
ta: pkcs11: support for mechanism embedded in a token
Implement token_capabilities.c to centralize the mechanisms supported by a token. As PKCS11 TA can implemented several token, each token may provide support for a restricted list of mechanisms and processing over these mechanisms.
Array pkcs11_modes[] is used to strictly define the processing that are allowed for a mechanism as per PKCS#11 specification.
Conversion of a mechanism ID into a debug friendly string is implemented in token_capabilities.c rather than pkcs11_helpers.c as for the other string helpers since the source file already defines the list of the valid mechanism IDs, hence an indirection from id2str_mechanism() to mechanism_string_id().
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Rouven Czerwinski <r.czerwinski@pengutronix.de> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 91753548 | 17-Feb-2020 |
Etienne Carriere <etienne.carriere@linaro.org> |
ta: pkcs11: define mechanism info resources in ta api
Define mechanism info structure returned by the TA on command PKCS11_CMD_MECHANISM_INFO related to client API function C_GetMechanismInfo().
Th
ta: pkcs11: define mechanism info resources in ta api
Define mechanism info structure returned by the TA on command PKCS11_CMD_MECHANISM_INFO related to client API function C_GetMechanismInfo().
This change also define mechanism identifier for AES ECB in the TA API even if this mechanism is not yet supported by the TA. This change is needed to serve as an example of a mechanism for which a client can invoke the PKCS11 TA to get information from.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Rouven Czerwinski <r.czerwinski@pengutronix.de> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 60659a86 | 17-Mar-2020 |
Etienne Carriere <etienne.carriere@linaro.org> |
ta: pkcs11: factorize persistent file name
get_db_file_name() and get_pin_file_name() factorize TEE object file IDs.
open_db_file() and open_pin_file() factorize opening of TA persistent database o
ta: pkcs11: factorize persistent file name
get_db_file_name() and get_pin_file_name() factorize TEE object file IDs.
open_db_file() and open_pin_file() factorize opening of TA persistent database object and PIN cipher key objects.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 4c365925 | 02-Dec-2019 |
Etienne Carriere <etienne.carriere@st.com> |
plat-stm32mp1: get shared reset controller state
stm32mp_nsec_can_access_reset() tells whether a reset controller is assigned to the secure world only, or when it can be manipulated by the non-secur
plat-stm32mp1: get shared reset controller state
stm32mp_nsec_can_access_reset() tells whether a reset controller is assigned to the secure world only, or when it can be manipulated by the non-secure world.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| cad32ade | 17-Dec-2019 |
Etienne Carriere <etienne.carriere@st.com> |
plat-stm32mp1: define memory dma to shared resource
This change defines memory DMA as a shared resource. Despite Secure and non-secure have have specific access to memory DMA, the reset control is e
plat-stm32mp1: define memory dma to shared resource
This change defines memory DMA as a shared resource. Despite Secure and non-secure have have specific access to memory DMA, the reset control is exclusive to the secure world.
With memory DMAs defined as the shared resource, the secure world will be able to open access to the resource if it is not used by the secure side.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 78f462f6 | 23-Mar-2020 |
Sumit Garg <sumit.garg@linaro.org> |
core: add TEE_LOGIN_REE_KERNEL login method
Add private login method for REE kernel clients to invoke TAs. It allows a TA to distinguish among normal world clients whether its a REE kernel client or
core: add TEE_LOGIN_REE_KERNEL login method
Add private login method for REE kernel clients to invoke TAs. It allows a TA to distinguish among normal world clients whether its a REE kernel client or a REE user-space client.
Signed-off-by: Sumit Garg <sumit.garg@linaro.org> Reviewed-by: Jerome Forissier <jerome@forissier.org>
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| 740676d0 | 20-Mar-2020 |
Fangsuo Wu <fangsuowu@asrmicro.com> |
drivers: gic: allow set pending a non-secure SGI
Remove assertion in GIC driver function gic_it_set_pending() preventing Core from setting as pending a non-secure SGI.
Reviewed-by: Etienne Carriere
drivers: gic: allow set pending a non-secure SGI
Remove assertion in GIC driver function gic_it_set_pending() preventing Core from setting as pending a non-secure SGI.
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Signed-off-by: Fangsuo Wu <fangsuowu@asrmicro.com>
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| 7c82da3b | 17-Dec-2019 |
Etienne Carriere <etienne.carriere@st.com> |
drivers/stm32_etzpc: initialize etzpc driver early
Changes initcall level for STM32 ETZPC driver so that in initializes early, at service_init level. The driver does not depends on other SoC drivers
drivers/stm32_etzpc: initialize etzpc driver early
Changes initcall level for STM32 ETZPC driver so that in initializes early, at service_init level. The driver does not depends on other SoC drivers and can be initialize early. This change allows other driver_init level initialization sequence to use ETZPC resources.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com> Acked-by: Jerome Forissier <jerome@forissier.org>
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| dfb57b8b | 07-Aug-2019 |
Cedric Neveux <cedric.neveux@nxp.com> |
drivers: caam: implement NXP CAAM driver - Cipher
Add the NXP CAAM drivers: - Cipher (AES/DES/DES3)
Signed-off-by: Cedric Neveux <cedric.neveux@nxp.com> Signed-off-by: Clement Faure <clement.faur
drivers: caam: implement NXP CAAM driver - Cipher
Add the NXP CAAM drivers: - Cipher (AES/DES/DES3)
Signed-off-by: Cedric Neveux <cedric.neveux@nxp.com> Signed-off-by: Clement Faure <clement.faure@nxp.com> Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
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