ta: pkcs11: remove local helper function supported_mechanism_key_size()

Remove local helper function supported_mechanism_key_size() that is
superseded by newly introduced mechanism_supported_key_siz

ta: pkcs11: remove local helper function supported_mechanism_key_size()

Remove local helper function supported_mechanism_key_size() that is
superseded by newly introduced mechanism_supported_key_sizes() that
does the jobs and is up to date.

Fixes: 512cbf1d30 ("ta: pkcs11: adds support for symmetric AES cipher modes")
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Acked-by: Vesa Jääskeläinen <vesa.jaaskelainen@vaisala.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Rouven Czerwinski <r.czerwinski@pengutronix.de>

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ta: pkcs11: minor fixes

Minor ID reordering in enum pkcs11_mechanism_id.

Fix inline comments referring to PKCS11_OK instead of PKCS11_CKR_OK.

Add 0x prefix in error trace in init_persistent_db().

ta: pkcs11: minor fixes

Minor ID reordering in enum pkcs11_mechanism_id.

Fix inline comments referring to PKCS11_OK instead of PKCS11_CKR_OK.

Add 0x prefix in error trace in init_persistent_db().

Use serialargs_get_session_from_handle() instead of the 2 step calls
to serialargs_get() and pkcs11_handle2session().

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Acked-by: Vesa Jääskeläinen <vesa.jaaskelainen@vaisala.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Rouven Czerwinski <r.czerwinski@pengutronix.de>

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core: mm: fix region lookup in param_mem_to_user_va()

The test whether a memory parameter is located in a region may fail
because of a typo in the comparison. The region size must be
added to the st

core: mm: fix region lookup in param_mem_to_user_va()

The test whether a memory parameter is located in a region may fail
because of a typo in the comparison. The region size must be
added to the start address, not subtracted.

Fixes: 2667e1359e51 ("core: fix offset calculation in param_mem_to_user_va()")
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Wolfgang Ocker <weo@reccoware.de>

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Add support for Renesas RZ/N1 platform

Add support for RZ/N1 platform from Renasas (PLATFORM=rzn1):
- Cortex-A7 based dual core processor.

This platform supports TrustZone based IO register access

Add support for Renesas RZ/N1 platform

Add support for RZ/N1 platform from Renasas (PLATFORM=rzn1):
- Cortex-A7 based dual core processor.

This platform supports TrustZone based IO register access control, so
add corresponding OEM service based implementation.

Link: https://www.renesas.com/us/en/products/microcontrollers-microprocessors/rz/rzn/rzn1d.html
Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
Acked-by: Jerome Forissier <jerome@forissier.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>

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drivers: ns16550: Allow customizable serial IO config

Add io_width and reg_shift configurable parameters to struct ns16550_data
in order to support 32 bit register read/write.

Signed-off-by: Sumit

drivers: ns16550: Allow customizable serial IO config

Add io_width and reg_shift configurable parameters to struct ns16550_data
in order to support 32 bit register read/write.

Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
Reviewed-by: Jerome Forissier <jerome@forissier.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>

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core: Allow non-secure context restore in thumb mode

Allow initial exit from secure monitor mode to non-secure context
in thumb mode in case next stage boot-loader is expected to execute
in thumb mo

core: Allow non-secure context restore in thumb mode

Allow initial exit from secure monitor mode to non-secure context
in thumb mode in case next stage boot-loader is expected to execute
in thumb mode.

Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
Reviewed-by: Jerome Forissier <jerome@forissier.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>

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vexpress-qemu_v8a: set CFG_ARM64_core to 'y' by default

Enables CFG_ARM64_core by default for PLATFORM=vexpress-qemu_v8a. This
platform is mostly used in full 64-bit mode, especially since until now

vexpress-qemu_v8a: set CFG_ARM64_core to 'y' by default

Enables CFG_ARM64_core by default for PLATFORM=vexpress-qemu_v8a. This
platform is mostly used in full 64-bit mode, especially since until now
the build.git Makefiles do not support anything else [1].

Link: [1] https://github.com/OP-TEE/build/blob/3.10.0/qemu_v8.mk#L9
Signed-off-by: Jerome Forissier <jerome@forissier.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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ta: pkcs11: adds support for symmetric AES cipher modes

Adds support for the AES modes ECB, CBC, CTR and CTS.

Much infrastructure is added to handle mechanisms.

Reviewed-by: Vesa Jääskeläinen <ves

ta: pkcs11: adds support for symmetric AES cipher modes

Adds support for the AES modes ECB, CBC, CTR and CTS.

Much infrastructure is added to handle mechanisms.

Reviewed-by: Vesa Jääskeläinen <vesa.jaaskelainen@vaisala.com>
Co-developed-by: Etienne Carriere <etienne.carriere@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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ta: pkcs11: define TA command for encryption/decryption

Adds commands
- PKCS11_CMD_ENCRYPT_INIT
- PKCS11_CMD_DECRYPT_INIT
- PKCS11_CMD_ENCRYPT_UPDATE
- PKCS11_CMD_DECRYPT_UPDATE
- PKCS11_CMD_ENCRYPT

ta: pkcs11: define TA command for encryption/decryption

Adds commands
- PKCS11_CMD_ENCRYPT_INIT
- PKCS11_CMD_DECRYPT_INIT
- PKCS11_CMD_ENCRYPT_UPDATE
- PKCS11_CMD_DECRYPT_UPDATE
- PKCS11_CMD_ENCRYPT_FINAL
- PKCS11_CMD_ENCRYPT_FINAL
- PKCS11_CMD_ENCRYPT_ONESHOT
- PKCS11_CMD_DECRYPT_ONESHOT
in enum pkcs11_ta_cmd.

Reviewed-by: Vesa Jääskeläinen <vesa.jaaskelainen@vaisala.com>
Co-developed-by: Etienne Carriere <etienne.carriere@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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ta: pkcs11: define TA mechanisms for AES cipher modes

Adds the mechanisms
- PKCS11_CKM_AES_KEY_GEN
- PKCS11_CKM_AES_CBC
- PKCS11_CKM_AES_CTR
- PKCS11_CKM_AES_CTS
- PKCS11_CKM_AES_CBC_PAD
- PKCS11_CK

ta: pkcs11: define TA mechanisms for AES cipher modes

Adds the mechanisms
- PKCS11_CKM_AES_KEY_GEN
- PKCS11_CKM_AES_CBC
- PKCS11_CKM_AES_CTR
- PKCS11_CKM_AES_CTS
- PKCS11_CKM_AES_CBC_PAD
- PKCS11_CKM_AES_ECB_ENCRYPT_DATA
- PKCS11_CKM_AES_CBC_ENCRYPT_DATA
in enum pkcs11_mechanism_id.

Reviewed-by: Vesa Jääskeläinen <vesa.jaaskelainen@vaisala.com>
Co-developed-by: Etienne Carriere <etienne.carriere@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: do not trace syscall_log()

Tracing the log syscall is of very little value since it will generate
some output to the console anyways. Worse, it pollutes the TA output in
case of a panic or an

core: do not trace syscall_log()

Tracing the log syscall is of very little value since it will generate
some output to the console anyways. Worse, it pollutes the TA output in
case of a panic or an abort. For example:

o regression_4005.1 AE case 0 algo 0x40000710 line 2819
F/TC:?? 0 trace_syscall:132 syscall #27 (syscall_cryp_obj_alloc)
F/TC:?? 0 trace_syscall:132 syscall #15 (syscall_cryp_state_alloc)
F/TC:?? 0 trace_syscall:132 syscall #27 (syscall_cryp_obj_alloc)
F/TC:?? 0 trace_syscall:132 syscall #24 (syscall_cryp_obj_get_info)
F/TC:?? 0 trace_syscall:132 syscall #30 (syscall_cryp_obj_populate)
F/TC:?? 0 trace_syscall:132 syscall #24 (syscall_cryp_obj_get_info)
F/TC:?? 0 trace_syscall:132 syscall #24 (syscall_cryp_obj_get_info)
F/TC:?? 0 trace_syscall:132 syscall #29 (syscall_cryp_obj_reset)
F/TC:?? 0 trace_syscall:132 syscall #24 (syscall_cryp_obj_get_info)
F/TC:?? 0 trace_syscall:132 syscall #24 (syscall_cryp_obj_get_info)
F/TC:?? 0 trace_syscall:132 syscall #31 (syscall_cryp_obj_copy)
F/TC:?? 0 trace_syscall:132 syscall #24 (syscall_cryp_obj_get_info)
F/TC:?? 0 trace_syscall:132 syscall #28 (syscall_cryp_obj_close)
F/TC:?? 0 trace_syscall:132 syscall #34 (syscall_authenc_init)
F/TC:?? 0 trace_syscall:132 syscall #2 (syscall_panic)
E/TC:?? 0
E/TC:?? 0 TA panicked with code 0xffff0006
F/TC:?? 0 trace_syscall:132 syscall #1 (syscall_log)
E/LD: Status of TA cb3e5ba0-adf1-11e0-998b-0002a5d5c51b
F/TC:?? 0 trace_syscall:132 syscall #1 (syscall_log)
E/LD: arch: aarch64
F/TC:?? 0 trace_syscall:132 syscall #1 (syscall_log)
E/LD: region 0: va 0x40004000 pa 0x100062d000 size 0x002000 flags rw-s (ldelf)
F/TC:?? 0 trace_syscall:132 syscall #1 (syscall_log)
E/LD: region 1: va 0x40006000 pa 0x100062f000 size 0x00d000 flags r-xs (ldelf)
...

Therefore, skip the trace if the syscall number it TEE_SCN_LOG.

Signed-off-by: Jerome Forissier <jerome@forissier.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: add tee_pobj_create_final()

Adds tee_pobj_create_final() which finalized a create operation. Until
tee_pobj_create_final() has been called the struct pobj cannot be shared
with any other objec

core: add tee_pobj_create_final()

Adds tee_pobj_create_final() which finalized a create operation. Until
tee_pobj_create_final() has been called the struct pobj cannot be shared
with any other object.

Reviewed-by: Jerome Forissier <jerome@forissier.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: syscall_storage_next_enum() use live pobj

Instead of using a fake pobj in syscall_storage_next_enum() retrieve the
shared pobj instead in order to get the flags of an already opened
object.

T

core: syscall_storage_next_enum() use live pobj

Instead of using a fake pobj in syscall_storage_next_enum() retrieve the
shared pobj instead in order to get the flags of an already opened
object.

TEE_POBJ_USAGE_ENUM is supplied to tee_pobj_get() to avoid checking for
conflicts with how the pobj is already used.

Reviewed-by: Jerome Forissier <jerome@forissier.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: tee_pobj_get() takes an enum tee_pobj_usage

Changes tee_pobj_get() to take an enum tee_pobj_usage usage instead of a
bool temporary.

Reviewed-by: Jerome Forissier <jerome@forissier.org>
Signe

core: tee_pobj_get() takes an enum tee_pobj_usage

Changes tee_pobj_get() to take an enum tee_pobj_usage usage instead of a
bool temporary.

Reviewed-by: Jerome Forissier <jerome@forissier.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: remove struct tee_obj::flags

struct tee_obj keeps a TEE_ObjectInfo which has a flags field with the
same meaning as the flags field in struct tee_obj. To avoid the two
fields getting out of sy

core: remove struct tee_obj::flags

struct tee_obj keeps a TEE_ObjectInfo which has a flags field with the
same meaning as the flags field in struct tee_obj. To avoid the two
fields getting out of sync remove struct tee_obj::flags and only use
TEE_ObjectInfo::handleFlags.

Additional checks are added in syscall_storage_obj_open() and
syscall_storage_obj_create() to make sure that no undefined flags are
added to TEE_ObjectInfo::handleFlags.

Reviewed-by: Jerome Forissier <jerome@forissier.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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libutee: fix TEE_BigIntDiv(): dest_q or dest_r may be NULL

Fixes TEE_BigIntDiv() to allow NULL values for dest_q and dest_r as
required by the GlobalPlatform spec.

Reviewed-by: Jerome Forissier <je

libutee: fix TEE_BigIntDiv(): dest_q or dest_r may be NULL

Fixes TEE_BigIntDiv() to allow NULL values for dest_q and dest_r as
required by the GlobalPlatform spec.

Reviewed-by: Jerome Forissier <jerome@forissier.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: syscall_storage_obj_create(): check that the attributes object is initialized

Adds a check in syscall_storage_obj_create() to see that the attributes
object is initialized.

Reviewed-by: Jerom

core: syscall_storage_obj_create(): check that the attributes object is initialized

Adds a check in syscall_storage_obj_create() to see that the attributes
object is initialized.

Reviewed-by: Jerome Forissier <jerome@forissier.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: fix offset calculation in param_mem_to_user_va()

In param_mem_to_user_va() the offset of a memory parameter is used to
check if a particular struct vm_region will cover that parameter.
struct

core: fix offset calculation in param_mem_to_user_va()

In param_mem_to_user_va() the offset of a memory parameter is used to
check if a particular struct vm_region will cover that parameter.
struct vm_region always uses offsets from the beginning of the first
physical page while a memory parameter contains only the offset from the
beginning of a MOBJ. Consequently the two offset cannot be compared
directly.

Until this patch the two offset where compared directly so fix it by
adding the phys_offs of the MOBJ to the offset of the memory parameter.

Note that this doesn't change the computed virtual address, it only
fails to find a matching struct vm_region under certain circumstances.

Acked-by: Jerome Forissier <jerome@forissier.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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ldelf: arm64: support R_AARCH64_TLSDESC relocations

When compiling the __thread test in optee_test (xtest 1029), GCC 8.3
emits R_AARCH64_TLS_TPREL relocations while GCC 6 and 7 generate
R_AARCH64_TL

ldelf: arm64: support R_AARCH64_TLSDESC relocations

When compiling the __thread test in optee_test (xtest 1029), GCC 8.3
emits R_AARCH64_TLS_TPREL relocations while GCC 6 and 7 generate
R_AARCH64_TLSDESC instead. The latter are quite easy to implement once
the former are done so add the required code to ldelf. This also
enables the C++ tests (xtest 1031) to pass with the older compilers.

Signed-off-by: Jerome Forissier <jerome@forissier.org>
Tested-by: Jerome Forissier <jerome@forissier.org> (QEMUv8, GCC 6.2/7.2)
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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Update CHANGELOG for 3.10.0

Update CHANGELOG for 3.10.0 and collect Tested-by tags.

Signed-off-by: Jerome Forissier <jerome@forissier.org>
Tested-by: Igor Opaniuk <igor.opaniuk@gmail.com> (Poplar)

Update CHANGELOG for 3.10.0

Update CHANGELOG for 3.10.0 and collect Tested-by tags.

Signed-off-by: Jerome Forissier <jerome@forissier.org>
Tested-by: Igor Opaniuk <igor.opaniuk@gmail.com> (Poplar)
Tested-by: Clement Faure <clement.faure@nxp.com> (mx6dlsabreauto)
Tested-by: Clement Faure <clement.faure@nxp.com> (mx6dlsabresd)
Tested-by: Clement Faure <clement.faure@nxp.com> (mx6qpsabreauto)
Tested-by: Clement Faure <clement.faure@nxp.com> (mx6ulevk)
Tested-by: Clement Faure <clement.faure@nxp.com> (mx6ullevk)
Tested-by: Clement Faure <clement.faure@nxp.com> (mx6ulzevk)
Tested-by: Clement Faure <clement.faure@nxp.com> (mx6sllevk)
Tested-by: Clement Faure <clement.faure@nxp.com> (mx7dsabresd)
Tested-by: Clement Faure <clement.faure@nxp.com> (mx7ulpevk)
Tested-by: Clement Faure <clement.faure@nxp.com> (mx8mmevk)
Tested-by: Clement Faure <clement.faure@nxp.com> (mx8mnevk)
Tested-by: Clement Faure <clement.faure@nxp.com> (mx8mqevk)
Tested-by: Clement Faure <clement.faure@nxp.com> (mx8qmmek)
Tested-by: Clement Faure <clement.faure@nxp.com> (mx8qxpmek)
Tested-by: Rouven Czerwinski <r.czerwinski@pengutronix.de> (mx6ulccbv2)
Tested-by: Jerome Forissier <jerome@forissier.org> (QEMU)
Tested-by: Jerome Forissier <jerome@forissier.org> (QEMUv8)
Tested-by: Jerome Forissier <jerome@forissier.org> (HiKey, GP)
Tested-by: Jerome Forissier <jerome@forissier.org> (HiKey960, GP)
Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (Juno)
Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (FVP)
Tested-by: Etienne Carriere <etienne.carriere@linaro.org> (stm32mp1, GP)
Tested-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org> (bpi0)
Tested-by: Volodymyr Babchuk <volodymyr_babchuk@epam.com> (Rcar H3)
Tested-by: Volodymyr Babchuk <volodymyr_babchuk@epam.com> (Rcar H3/virtualization)
Tested-by: Sumit Garg <sumit.garg@linaro.org> (Developerbox)

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core: Fix the entry on the match table for TPM support.

TF-A Measured Boot driver expects a tpm_event_log node on the
DTB with the compatible field set to "arm,tpm_event_log", so
fix the match table

core: Fix the entry on the match table for TPM support.

TF-A Measured Boot driver expects a tpm_event_log node on the
DTB with the compatible field set to "arm,tpm_event_log", so
fix the match table entry for the TPM support to match the one
used by TF-A.

Signed-off-by: Javier Almansa Sobrino <javier.almansasobrino@arm.com>
Acked-by: Jerome Forissier <jerome@forissier.org>

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core: mmu: arm64: fix get_va_width()

Fixes get_va_width() when CFG_LPAE_ADDR_SPACE_SIZE != (1ull << 32).

Signed-off-by: Jerome Forissier <jerome@forissier.org>
Reviewed-by: Jens Wiklander <jens.wik

core: mmu: arm64: fix get_va_width()

Fixes get_va_width() when CFG_LPAE_ADDR_SPACE_SIZE != (1ull << 32).

Signed-off-by: Jerome Forissier <jerome@forissier.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: arm: rpc i2c: fix, REE processed bytes

Fix number of bytes processed by the REE that is returned in p[3] as
defined in the API, not in p[2].

Fixes: 30c53a724263 ("core: arm: rpc i2c trampolin

core: arm: rpc i2c: fix, REE processed bytes

Fix number of bytes processed by the REE that is returned in p[3] as
defined in the API, not in p[2].

Fixes: 30c53a724263 ("core: arm: rpc i2c trampoline driver")
Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>

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core: add user parameter thread_rpc_shm_cache_alloc()

Adds a user parameter to thread_rpc_shm_cache_alloc() to make sure that
different callers of thread_rpc_shm_cache_alloc() doesn't interfere with

core: add user parameter thread_rpc_shm_cache_alloc()

Adds a user parameter to thread_rpc_shm_cache_alloc() to make sure that
different callers of thread_rpc_shm_cache_alloc() doesn't interfere with
each other. The FS allocation could perhaps be intertwined with I2C
allocations if crypto operations are done over I2C.

Fixes: 9bee8f2a5af7 ("core: add generic rpc shared memory buffer caching")
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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libutils: embed AEABI personality routines upon CFG_UNWIND

Fix a TA build issue found when CFG_UNWIND=n. This issue produces a
build error trace like the below:

.../toolchains/aarch32/bin/arm-linux

libutils: embed AEABI personality routines upon CFG_UNWIND

Fix a TA build issue found when CFG_UNWIND=n. This issue produces a
build error trace like the below:

.../toolchains/aarch32/bin/arm-linux-gnueabihf-ld.bfd: .../toolchains/aarch32/bin/../lib/gcc/arm-linux-gnueabihf/8.3.0/libgcc_eh.a(unwind-arm.o): in function `__aeabi_unwind_cpp_pr0':
/tmp/dgboter/bbs/rhev-vm8--rhe6x86_64/buildbot/rhe6x86_64--arm-linux-gnueabihf/build/src/gcc/libgcc/config/arm/unwind-arm.c:494: multiple definition of `__aeabi_unwind_cpp_pr0'; .../optee_os/out/arm/export-ta_arm32/lib/libutils.a(aeabi_unwind.o): .../optee_os/lib/libutils/ext/arch/arm/aeabi_unwind.c:9: first defined here
.../optee_os/out/arm/export-ta_arm32/mk/link.mk:109: recipe for target 'out/5b9e0e40-2636-11e1-ad9e-0002a5d5c51b.elf' failed

I don't understand why toolchain support for __aeabi_unwind_cpp_pr0()
conflicts with the libutils implementation only when CFG_UNWIND=n. Yet
the current change works around the issue.

Fixes: https://github.com/OP-TEE/optee_test/issues/440
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Jerome Forissier <jerome@forissier.org>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>

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