| 8f51d0a4 | 16-Oct-2020 |
Stefan Schmidt <snst@meek.de> |
core: rpmb: check return value of encrypt_block()
Added error handling if call of function encrypt_block() fails in tee_rpmb_req_pack().
Signed-off-by: Stefan Schmidt <snst@meek.de> Reviewed-by: Je
core: rpmb: check return value of encrypt_block()
Added error handling if call of function encrypt_block() fails in tee_rpmb_req_pack().
Signed-off-by: Stefan Schmidt <snst@meek.de> Reviewed-by: Jerome Forissier <jerome@forissier.org> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
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| f50962e3 | 16-Oct-2020 |
Volodymyr Babchuk <volodymyr_babchuk@epam.com> |
ta_dev_kit.mk: make sure that libutils is linked second time
libgcc depends on __getauxval symbol from libuils. As, generally libutils is linked before libgcc, we will get "unresolved symbol" error.
ta_dev_kit.mk: make sure that libutils is linked second time
libgcc depends on __getauxval symbol from libuils. As, generally libutils is linked before libgcc, we will get "unresolved symbol" error. To resolve this dependency we need to link libutils second time - after libgcc.
Signed-off-by: Volodymyr Babchuk <volodymyr_babchuk@epam.com> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Jerome Forissier <jerome@forissier.org>
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| 73196b58 | 13-Oct-2020 |
Volodymyr Babchuk <volodymyr_babchuk@epam.com> |
link.mk: implement support for libnames-after-libgcc variable
Newer versions of libgcc depend on external __getauxval() symbol, which is now provided by libutils. But libgcc is linked after libutils
link.mk: implement support for libnames-after-libgcc variable
Newer versions of libgcc depend on external __getauxval() symbol, which is now provided by libutils. But libgcc is linked after libutils, so linker can't resolve that symbol. We can't include libgcc into linking group with libtutils, because libgcc provides symbols that conflict with libutil's ones, like __aeabi_idiv with friends for instance.
So, to resolve libgcc dependency on libutils we need to link with libutils second time. To make things more generic, we will introduce $(libnames-after-libgcc) variable for libraries that should be linked after libgcc.
Signed-off-by: Volodymyr Babchuk <volodymyr_babchuk@epam.com> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Jerome Forissier <jerome@forissier.org>
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| 36e784f6 | 13-Oct-2020 |
Volodymyr Babchuk <volodymyr_babchuk@epam.com> |
libutils: provide empty __getauxval() implementation
Never version of libgcc are built with LSE implementation in mind. To determine if LSE is available on platform it calls __getauxval(), so in som
libutils: provide empty __getauxval() implementation
Never version of libgcc are built with LSE implementation in mind. To determine if LSE is available on platform it calls __getauxval(), so in some cases we can get undefined reference to __getauxval() error.
Prominent case is libgcc_eh.a library, which is used by C++ TAs. Exception handler depends on atomic operations, so it tries to call init_have_lse_atomics() first. This function in turn calls __getauxval(), which causes linking error.
In the future we can make __getauxval() to return actual platform capabilities.
Signed-off-by: Volodymyr Babchuk <volodymyr_babchuk@epam.com> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Jerome Forissier <jerome@forissier.org>
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| ed30b6c7 | 15-Oct-2020 |
Jens Wiklander <jens.wiklander@linaro.org> |
early_ta: use scattered array helpers
Simplifies the core linker script by replacing the hard coded .rodata.early_ta section with use of SCATTERED_ARRAY_DEFINE_PG_ITEM() instead.
Reviewed-by: Jerom
early_ta: use scattered array helpers
Simplifies the core linker script by replacing the hard coded .rodata.early_ta section with use of SCATTERED_ARRAY_DEFINE_PG_ITEM() instead.
Reviewed-by: Jerome Forissier <jerome@forissier.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| c4def2a8 | 30-Sep-2020 |
Jerome Forissier <jerome@forissier.org> |
Update CHANGELOG for 3.11.0
Update CHANGELOG for 3.11.0 and collect Tested-by tags.
Signed-off-by: Jerome Forissier <jerome@forissier.org> Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (Jun
Update CHANGELOG for 3.11.0
Update CHANGELOG for 3.11.0 and collect Tested-by tags.
Signed-off-by: Jerome Forissier <jerome@forissier.org> Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (Juno) Tested-by: Jerome Forissier <jerome@forissier.org> (QEMU) Tested-by: Jerome Forissier <jerome@forissier.org> (QEMUv8) Tested-by: Jerome Forissier <jerome@forissier.org> (HiKey960) Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (Hikey GP v1.1) Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (FVP) Tested-by: Igor Opaniuk <igor.opaniuk@gmail.com> (Poplar) Tested-by: Ricardo Salveti <ricardo@foundries.io> (ZynqMP) Tested-by: Volodymyr Babchuk <volodymyr_babchuk@epam.com> (Rcar H3) Tested-by: Volodymyr Babchuk <volodymyr_babchuk@epam.com> (Rcar H3/virtualization) Tested-by: Rouven Czerwinski <r.czerwinski@pengutronix.de> (ccimx6ulsbcpro) Tested-by: Rouven Czerwinski <r.czerwinski@pengutronix.de> (STM32MP157DK2) Tested-by: Clement Faure <clement.faure@nxp.com> (mx6dlsabreauto) Tested-by: Clement Faure <clement.faure@nxp.com> (mx6dlsabresd) Tested-by: Clement Faure <clement.faure@nxp.com> (mx6qpsabreauto) Tested-by: Clement Faure <clement.faure@nxp.com> (mx6ulevk) Tested-by: Clement Faure <clement.faure@nxp.com> (mx6ullevk) Tested-by: Clement Faure <clement.faure@nxp.com> (mx6ulzevk) Tested-by: Clement Faure <clement.faure@nxp.com> (mx6sllevk) Tested-by: Clement Faure <clement.faure@nxp.com> (mx7dsabresd) Tested-by: Clement Faure <clement.faure@nxp.com> (mx7ulpevk) Tested-by: Clement Faure <clement.faure@nxp.com> (mx8mmevk) Tested-by: Clement Faure <clement.faure@nxp.com> (mx8mnevk) Tested-by: Clement Faure <clement.faure@nxp.com> (mx8mqevk) Tested-by: Clement Faure <clement.faure@nxp.com> (mx8qmmek) Tested-by: Clement Faure <clement.faure@nxp.com> (mx8qxpmek) Tested-by: Etienne Carriere <etienne.carriere@linaro.org> (stm32mp1)
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| c43d7569 | 13-Oct-2020 |
Ricardo Salveti <ricardo@foundries.io> |
plat: zynqmp: use generic_ram_layout for defining dram layout
Switch to the generic generic_ram_layout header file for defining the default dram layout. This allow allows the user to easily customiz
plat: zynqmp: use generic_ram_layout for defining dram layout
Switch to the generic generic_ram_layout header file for defining the default dram layout. This allow allows the user to easily customize the default dram base and size via CFG_TZDRAM_START/CFG_TZDRAM_SIZE.
Default values are still the same as previously set by platform_config.
Signed-off-by: Ricardo Salveti <ricardo@foundries.io> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| ae85b831 | 13-Oct-2020 |
Volodymyr Babchuk <volodymyr_babchuk@epam.com> |
scripts: support both pycryptodome and pycryptodomex
Current actual Python library for cryptography is being distributed in two flavors: pycroptodome and pycroptodomex. They are basically the same l
scripts: support both pycryptodome and pycryptodomex
Current actual Python library for cryptography is being distributed in two flavors: pycroptodome and pycroptodomex. They are basically the same library, but with different import names:
- pycryptodome provides 'Crypto' module and indented to directly replace old pycrypto library
- pycryptodomex provides 'Cryptodome' module and is intended for old distributions, where pycrypto is still present
Most of the modern Linux distributions provide both of the libraries, so there is no difference which one is to use. But some of them (like Yocto/Poky) provide only one.
This patches makes scripts agnostic to a crypto library flavor being used by trying to import Cryptodome first and then Crypto if first import fails.
Signed-off-by: Volodymyr Babchuk <volodymyr_babchuk@epam.com> Reviewed-by: Jerome Forissier <jerome@forissier.org>
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| 0ab3b1fe | 13-Oct-2020 |
Ricardo Salveti <ricardo@foundries.io> |
MAINTAINERS: maintain plat-zynqmp
Update MAINTAINERS with myself as reviewer for Xilinx Zynq UltraScale+ MPSOC (plat-zynqmp).
Signed-off-by: Ricardo Salveti <ricardo@foundries.io> Acked-by: Jerome
MAINTAINERS: maintain plat-zynqmp
Update MAINTAINERS with myself as reviewer for Xilinx Zynq UltraScale+ MPSOC (plat-zynqmp).
Signed-off-by: Ricardo Salveti <ricardo@foundries.io> Acked-by: Jerome Forissier <jerome@forissier.org>
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| ae2b65fc | 08-Oct-2020 |
Ricardo Salveti <ricardo@foundries.io> |
plat: zynqmp: force disable core ALSR
Disable core ASLR for two reasons: 1. There is no source for ALSR seed, as ATF does not provide a DTB to OP-TEE. Hardware RNG is also not currently supported
plat: zynqmp: force disable core ALSR
Disable core ASLR for two reasons: 1. There is no source for ALSR seed, as ATF does not provide a DTB to OP-TEE. Hardware RNG is also not currently supported. 2. OP-TEE does not boot with enabled CFG_CORE_ASLR.
Further investigation is needed to see why enabled ASLR causes OP-TEE to not boot properly.
Signed-off-by: Ricardo Salveti <ricardo@foundries.io> Acked-by: Jerome Forissier <jerome@forissier.org>
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| 3b11b1d2 | 12-Oct-2020 |
Jerome Forissier <jerome@forissier.org> |
core: rpmb: fix off-by-one in block index check
The max block index check in tee_rpmb_req_pack() is incorrect and would fail when trying to access the last block of the partition.
Signed-off-by: Je
core: rpmb: fix off-by-one in block index check
The max block index check in tee_rpmb_req_pack() is incorrect and would fail when trying to access the last block of the partition.
Signed-off-by: Jerome Forissier <jerome@forissier.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
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| 60c96f68 | 12-Oct-2020 |
Etienne Carriere <etienne.carriere@linaro.org> |
drivers: scmi-msg: refine local header files
Change scmi-msg drivers to define/declare protocol resources in protocol specific local file instead of from local common.h file.
Signed-off-by: Etienne
drivers: scmi-msg: refine local header files
Change scmi-msg drivers to define/declare protocol resources in protocol specific local file instead of from local common.h file.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Jerome Forissier <jerome@forissier.org>
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| ba134bd0 | 12-Oct-2020 |
Etienne Carriere <etienne.carriere@linaro.org> |
drivers: scmi-msg: fix indentation
Fix minor indentation issue in voltage_domain.h.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Jerome Forissier <jerome@forissier.org> |
| c007fb39 | 09-Oct-2020 |
Etienne Carriere <etienne.carriere@linaro.org> |
drivers: scmi-msg: Set SCMI version to 3
Update SCMI version to 3 as supported voltage domain protocol is introduced in the version 3 of the specification.
Fixes: 006d89b8f49f ("drivers: scmi-msg:
drivers: scmi-msg: Set SCMI version to 3
Update SCMI version to 3 as supported voltage domain protocol is introduced in the version 3 of the specification.
Fixes: 006d89b8f49f ("drivers: scmi-msg: add SCMI Voltage Domain protocol") Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Jerome Forissier <jerome@forissier.org>
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| 334810f9 | 08-Oct-2020 |
Etienne Carriere <etienne.carriere@linaro.org> |
plat-stm32mp1: scmi: expose PWR regulators
Expose SoC PWR regulators as SCMI voltage domains to the non-secure world. They are exposed to SCMI agent scmi0 that exposes SoC resources used by non-secu
plat-stm32mp1: scmi: expose PWR regulators
Expose SoC PWR regulators as SCMI voltage domains to the non-secure world. They are exposed to SCMI agent scmi0 that exposes SoC resources used by non-secure world but controlled by secure world since RCC TZ hardening configuration.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| c22983c9 | 08-Oct-2020 |
Etienne Carriere <etienne.carriere@linaro.org> |
plat-stm32mp1: scmi: prepare platform SCMI voltage regulators
Define generic resources for stm32mp1 platform to support voltage regulators exposed to SCMI agents through the voltage domain protocol.
plat-stm32mp1: scmi: prepare platform SCMI voltage regulators
Define generic resources for stm32mp1 platform to support voltage regulators exposed to SCMI agents through the voltage domain protocol.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| b787ecb7 | 08-Oct-2020 |
Etienne Carriere <etienne.carriere@linaro.org> |
plat-stm32mp1: introduce PWR regulators
Introduce a voltage regulator driver for the voltage controllers driven through PWR interface of stm32mp1 SoCs.
Signed-off-by: Etienne Carriere <etienne.carr
plat-stm32mp1: introduce PWR regulators
Introduce a voltage regulator driver for the voltage controllers driven through PWR interface of stm32mp1 SoCs.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| f56662f7 | 12-Oct-2020 |
Jerome Forissier <jerome@forissier.org> |
MAINTAINERS: plat-ti, plat-k3: remove Andrew's address
Andrew's email address is bouncing, remove it.
Signed-off-by: Jerome Forissier <jerome@forissier.org> Acked-by: Joakim Bech <joakim.bech@linar
MAINTAINERS: plat-ti, plat-k3: remove Andrew's address
Andrew's email address is bouncing, remove it.
Signed-off-by: Jerome Forissier <jerome@forissier.org> Acked-by: Joakim Bech <joakim.bech@linaro.org>
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| 6a68b221 | 12-Oct-2020 |
Sughosh Ganu <sughosh.ganu@linaro.org> |
core: ffa: Fix the FF-A version returned to Secure Partition
The current Firmware Framework(FF-A) specification defines the major version of 0x1 and minor version of 0x0. Return these values when re
core: ffa: Fix the FF-A version returned to Secure Partition
The current Firmware Framework(FF-A) specification defines the major version of 0x1 and minor version of 0x0. Return these values when requested through the FFA_VERSION call instead of returning the FFA_VERSION function id
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org> Acked-by: Jerome Forissier <jerome@forissier.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 009a14d6 | 09-Oct-2020 |
Jerome Forissier <jerome@forissier.org> |
Update revision for release tag 3.11.0-rc1
Signed-off-by: Jerome Forissier <jerome@forissier.org> |
| 6b050394 | 08-Oct-2020 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: refactor locking during PTA init
tee_ta_init_pseudo_ta_session() locks tee_ta_mutex only when needed. This makes this function similar to sec_part_init_session() and tee_ta_init_user_ta_sessio
core: refactor locking during PTA init
tee_ta_init_pseudo_ta_session() locks tee_ta_mutex only when needed. This makes this function similar to sec_part_init_session() and tee_ta_init_user_ta_session() in usage.
Reviewed-by: Jerome Forissier <jerome@forissier.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 6b5921cc | 08-Oct-2020 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: refactor locking during StMM load
sec_part_init_session() locks tee_ta_mutex only when needed. This avoids a window where deadlock can occur in case pgt_alloc() goes to sleep.
Reviewed-by: Je
core: refactor locking during StMM load
sec_part_init_session() locks tee_ta_mutex only when needed. This avoids a window where deadlock can occur in case pgt_alloc() goes to sleep.
Reviewed-by: Jerome Forissier <jerome@forissier.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| f0ab1c64 | 07-Oct-2020 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: refactor locking during user TA load
tee_ta_init_user_ta_session() unlocks tee_ta_mutex while loading ldelf and the user TA. This avoids a window where deadlock can occur in case pgt_alloc() g
core: refactor locking during user TA load
tee_ta_init_user_ta_session() unlocks tee_ta_mutex while loading ldelf and the user TA. This avoids a window where deadlock can occur in case pgt_alloc() goes to sleep.
A new condition variable, tee_ta_init_cv, is added to signal that a TA has changed state while initializing.
tee_ta_init_session_with_context waits for a TA context be fully initialized before assigning it to another session.
This also simplifies tee_ta_try_set_busy() since it now doesn't have to handle the case where it has to wait for a TA context to be fully initialized.
Reviewed-by: Jerome Forissier <jerome@forissier.org> Suggested-by: Opensource <opensource@sequiturlabs.com> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 806a85fa | 07-Oct-2020 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: add CFG_CORE_MAX_SYSCALL_RECURSION
Adds CFG_CORE_MAX_SYSCALL_RECURSION to define the limit for the number of levels TAs may call each other. If this number is too high we may run over the thre
core: add CFG_CORE_MAX_SYSCALL_RECURSION
Adds CFG_CORE_MAX_SYSCALL_RECURSION to define the limit for the number of levels TAs may call each other. If this number is too high we may run over the thread stack in OP-TEE Core.
Reviewed-by: Jerome Forissier <jerome@forissier.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 589a4941 | 09-Oct-2020 |
Jerome Forissier <jerome@forissier.org> |
core: use vaddr_t instead of uint32_t for object IDs
Some function incorrectly use uint32_t for object identifiers: tee_obj_get(), tee_svc_cryp_get_state() and tee_svc_storage_get_enum(). Those obje
core: use vaddr_t instead of uint32_t for object IDs
Some function incorrectly use uint32_t for object identifiers: tee_obj_get(), tee_svc_cryp_get_state() and tee_svc_storage_get_enum(). Those object IDs are actually virtual addresses so they need to be of type vaddr_t.
Link: https://github.com/OP-TEE/optee_os/issues/4035#issuecomment-680037072 Signed-off-by: Jerome Forissier <jerome@forissier.org>
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