| c04a96a4 | 13-May-2021 |
lubing <lubing@eswin.com> |
core: Fix memory leaks in sm2 of Mbedtls lib
When enable mbedtls in optee-os , xtest run twice will be fail. Memory leakage exists in three functions. 1. grp and mpi in sm2_mbedtls_pke_encrypt 2. gr
core: Fix memory leaks in sm2 of Mbedtls lib
When enable mbedtls in optee-os , xtest run twice will be fail. Memory leakage exists in three functions. 1. grp and mpi in sm2_mbedtls_pke_encrypt 2. grp in sm2_mbedtls_dsa_sign 3. grp in sm2_mbedtls_dsa_verify
Fixes: c84eee6397bb ("core: add support for SM2 using MBed TLS") Reviewed-by: Jerome Forissier <jerome@forissier.org> Signed-off-by: lubing <lubing@eswin.com>
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| 2b632aed | 12-May-2021 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: fix thread_alloc_and_run() argument passing
Fix thread_alloc_and_run() to pass all its arguments to __thread_alloc_and_run(). This is needed with FF-A since the offset of the struct optee_msg_
core: fix thread_alloc_and_run() argument passing
Fix thread_alloc_and_run() to pass all its arguments to __thread_alloc_and_run(). This is needed with FF-A since the offset of the struct optee_msg_arg is passed in w6 from normal world. The Linux kernel driver currently passes offset=0 so it's not seen while testing, but that may change with future optimizations in the kernel driver.
Reviewed-by: Jerome Forissier <jerome@forissier.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| a76221df | 07-May-2021 |
Clement Faure <clement.faure@nxp.com> |
ci: azure: build mx8mpevk
Add the i.MX8MP platform to the build list.
Signed-off-by: Clement Faure <clement.faure@nxp.com> Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jens Wi
ci: azure: build mx8mpevk
Add the i.MX8MP platform to the build list.
Signed-off-by: Clement Faure <clement.faure@nxp.com> Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 26f52232 | 06-May-2021 |
Clement Faure <clement.faure@nxp.com> |
drivers: caam: add support for mx8mp platforms
Add support for mx8mp in the CAAM HAL.
Signed-off-by: Clement Faure <clement.faure@nxp.com> Acked-by: Etienne Carriere <etienne.carriere@linaro.org> A
drivers: caam: add support for mx8mp platforms
Add support for mx8mp in the CAAM HAL.
Signed-off-by: Clement Faure <clement.faure@nxp.com> Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 6df63c07 | 06-May-2021 |
Clement Faure <clement.faure@nxp.com> |
core: imx: add support for i.MX 8MP EVK
Add support for mx8mp platforms
Signed-off-by: Clement Faure <clement.faure@nxp.com> Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jens
core: imx: add support for i.MX 8MP EVK
Add support for mx8mp platforms
Signed-off-by: Clement Faure <clement.faure@nxp.com> Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| f85678c1 | 26-Apr-2021 |
Igor Opaniuk <igor.opaniuk@foundries.io> |
imx: pm: add support for reset2 function
Add support for SYSTEM_RESET2, which asserts WDOG-generated reset signal WDOG_RESET_B_DEB (internal reset).
For additional details check WDOGx_WCR fields de
imx: pm: add support for reset2 function
Add support for SYSTEM_RESET2, which asserts WDOG-generated reset signal WDOG_RESET_B_DEB (internal reset).
For additional details check WDOGx_WCR fields description in iMX Applications Processor Reference Manual.
Acked-by: Clement Faure <clement.faure@nxp.com> Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io>
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| 9daed40c | 26-Apr-2021 |
Igor Opaniuk <igor.opaniuk@foundries.io> |
core: arm: sm: upgrade to PSCI 1.1
Add support for new functions, introduced in PSCI v1.1 spec [1] (all are optional): * SYSTEM_RESET2 - extends existing SYSTEM_RESET. It provides
core: arm: sm: upgrade to PSCI 1.1
Add support for new functions, introduced in PSCI v1.1 spec [1] (all are optional): * SYSTEM_RESET2 - extends existing SYSTEM_RESET. It provides architectural reset definitions and vendor-specific resets. * MEM_PROTECT - provides protection against cold reboot attacks, by ensuring that memory is overwritten before it is handed over to an operating system loader. * MEM_PROTECT_CHECK_RANGE - used to check whether a memory range is protected by MEM_PROTECT.
[1] https://developer.arm.com/documentation/den0022/latest/
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io>
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| a83bf6de | 28-Apr-2021 |
Igor Opaniuk <igor.opaniuk@foundries.io> |
core: arm: sm: replace function ids with hex values
Replace PSCI function id defines with full hex values, so it's easier to validate existing values/add new one from PSCI spec updates.
Reviewed-by
core: arm: sm: replace function ids with hex values
Replace PSCI function id defines with full hex values, so it's easier to validate existing values/add new one from PSCI spec updates.
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io>
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| 3cc421f7 | 10-May-2021 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: fix thread_disable_prealloc_rpc_cache()
Fixes thread_disable_prealloc_rpc_cache() to also NULL rpc_mobj when freeing the shared memory object. Failing to do so might cause it rpc_mobj pointer
core: fix thread_disable_prealloc_rpc_cache()
Fixes thread_disable_prealloc_rpc_cache() to also NULL rpc_mobj when freeing the shared memory object. Failing to do so might cause it rpc_mobj pointer to be used after free.
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jerome Forissier <jerome@forissier.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| eeb0511d | 05-May-2021 |
Jens Wiklander <jens.wiklander@linaro.org> |
drivers: gic_it_enable(): remove assert that itr is disabled
Prior to this patch there was an assert in gic_it_enable() that non-SGI interrupts where disabled before this function would enable that
drivers: gic_it_enable(): remove assert that itr is disabled
Prior to this patch there was an assert in gic_it_enable() that non-SGI interrupts where disabled before this function would enable that interrupt. This forces the caller to keep track of the state of the interrupt in question and may also require additional locking to avoid races around this assert. Enabling an interrupt twice is unnecessary, but quite harmless. So remove the assert to simplify things for the caller where possible.
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jerome Forissier <jerome@forissier.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| b5fed9f7 | 03-May-2021 |
Jens Wiklander <jens.wiklander@linaro.org> |
libutils: sys/queue.h: add SLIST_FOREACH_SAFE()
Import macro SLIST_FOREACH_SAFE from FreeBSD.
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jerome Forissier <jerome@forissie
libutils: sys/queue.h: add SLIST_FOREACH_SAFE()
Import macro SLIST_FOREACH_SAFE from FreeBSD.
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jerome Forissier <jerome@forissier.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| a07b8a39 | 06-May-2021 |
Jerome Forissier <jerome@forissier.org> |
ci: travis: create symlink /usr/share/codespell/dictionary.txt
checkpatch.pl expects to find the codespell dictionary in /usr/share/codespell/dictionary.txt, but the codespell package in Ubuntu 20.0
ci: travis: create symlink /usr/share/codespell/dictionary.txt
checkpatch.pl expects to find the codespell dictionary in /usr/share/codespell/dictionary.txt, but the codespell package in Ubuntu 20.04 has moved to a different path [1]. Take care of this by creating a symlink.
Link: [1] https://packages.ubuntu.com/focal/all/codespell/filelist Fixes: 784103ed82de ("ci: travis: select Ubuntu 20.04") Signed-off-by: Jerome Forissier <jerome@forissier.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 784103ed | 06-May-2021 |
Jerome Forissier <jerome@forissier.org> |
ci: travis: select Ubuntu 20.04
The default build environment for Travis CI is currently Linux Ubuntu Xenial (16.04). This is quite an old release (21 April 2016). The latest release supported by Tr
ci: travis: select Ubuntu 20.04
The default build environment for Travis CI is currently Linux Ubuntu Xenial (16.04). This is quite an old release (21 April 2016). The latest release supported by Travis CI is Focal (20.04), released on 23 April 2020. This commit updates to 20.04 by selecting "dist: focal" instead of keeping the default. The reason is to obtain a more up-to-date codespell dictionary. For example, it was found that checkpatch detects the spelling mistake 'becase' on 20.04 but not on 16.04.
Signed-off-by: Jerome Forissier <jerome@forissier.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 4a6784ca | 30-Apr-2021 |
Jens Wiklander <jens.wiklander@linaro.org> |
core/arch/arm/include/*.h: use U() for unsigned constants
Updates with the U() macro as described in the recently updated coding guidelines.
Acked-by: Ruchika Gupta <ruchika.gupta@linaro.org> Acked
core/arch/arm/include/*.h: use U() for unsigned constants
Updates with the U() macro as described in the recently updated coding guidelines.
Acked-by: Ruchika Gupta <ruchika.gupta@linaro.org> Acked-by: Jerome Forissier <jerome@forissier.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 135f53fe | 04-May-2021 |
Jens Wiklander <jens.wiklander@linaro.org> |
core/arch/arm/include/*.h: se BIT() and SHIFT_U32() macros
Uses the more safe BIT() and SHIFT_U32() macros instead of direct shifting of 1 or some other constant integer.
Acked-by: Ruchika Gupta <r
core/arch/arm/include/*.h: se BIT() and SHIFT_U32() macros
Uses the more safe BIT() and SHIFT_U32() macros instead of direct shifting of 1 or some other constant integer.
Acked-by: Ruchika Gupta <ruchika.gupta@linaro.org> Acked-by: Jerome Forissier <jerome@forissier.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| a808f49e | 30-Apr-2021 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: core_mmu.[ch]: use U() for unsigned constants
Updates with the U() macro as described in the recently updated coding guidelines.
Acked-by: Ruchika Gupta <ruchika.gupta@linaro.org> Acked-by: J
core: core_mmu.[ch]: use U() for unsigned constants
Updates with the U() macro as described in the recently updated coding guidelines.
Acked-by: Ruchika Gupta <ruchika.gupta@linaro.org> Acked-by: Jerome Forissier <jerome@forissier.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| b4bfc9a9 | 30-Apr-2021 |
Jens Wiklander <jens.wiklander@linaro.org> |
core/include/*/*.h: use U() for unsigned constants
Updates with the U() macro as described in the recently updated coding guidelines.
Acked-by: Ruchika Gupta <ruchika.gupta@linaro.org> Acked-by: Je
core/include/*/*.h: use U() for unsigned constants
Updates with the U() macro as described in the recently updated coding guidelines.
Acked-by: Ruchika Gupta <ruchika.gupta@linaro.org> Acked-by: Jerome Forissier <jerome@forissier.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 2735636f | 04-May-2021 |
Jens Wiklander <jens.wiklander@linaro.org> |
core/include/drivers/*.h: use BIT() and SHIFT_U32() macros
Uses the more safe BIT() and SHIFT_U32() macros instead of direct shifting of 1 or some other constant integer.
Acked-by: Ruchika Gupta <r
core/include/drivers/*.h: use BIT() and SHIFT_U32() macros
Uses the more safe BIT() and SHIFT_U32() macros instead of direct shifting of 1 or some other constant integer.
Acked-by: Ruchika Gupta <ruchika.gupta@linaro.org> Acked-by: Jerome Forissier <jerome@forissier.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 57f197ec | 30-Apr-2021 |
Jens Wiklander <jens.wiklander@linaro.org> |
core/include/*.h: use U() for unsigned constants
Updates with the U() macro as described in the recently updated coding guidelines.
Acked-by: Ruchika Gupta <ruchika.gupta@linaro.org> Acked-by: Jero
core/include/*.h: use U() for unsigned constants
Updates with the U() macro as described in the recently updated coding guidelines.
Acked-by: Ruchika Gupta <ruchika.gupta@linaro.org> Acked-by: Jerome Forissier <jerome@forissier.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 138b56c3 | 07-Apr-2021 |
Clement Faure <clement.faure@nxp.com> |
core: ls: enable CAAM DSA
Enable CAAM DSA algorithm for all LS platforms.
Signed-off-by: Clement Faure <clement.faure@nxp.com> Acked-by: Jerome Forissier <jerome@forissier.org> |
| b5c0bc9d | 07-Apr-2021 |
Clement Faure <clement.faure@nxp.com> |
core: imx: enable CAAM DSA
Enable CAAM DSA algorithm for all i.MX platforms.
Signed-off-by: Clement Faure <clement.faure@nxp.com> Acked-by: Jerome Forissier <jerome@forissier.org> |
| 4b383f73 | 07-Apr-2021 |
Clement Faure <clement.faure@nxp.com> |
drivers: caam: implement NXP CAAM Driver - DSA
Add DSA CAAM drivers.
Signed-off-by: Cedric Neveux <cedric.neveux@nxp.com> Signed-off-by: Clement Faure <clement.faure@nxp.com> Acked-by: Jerome Foris
drivers: caam: implement NXP CAAM Driver - DSA
Add DSA CAAM drivers.
Signed-off-by: Cedric Neveux <cedric.neveux@nxp.com> Signed-off-by: Clement Faure <clement.faure@nxp.com> Acked-by: Jerome Forissier <jerome@forissier.org>
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| 8bdff4a4 | 07-Apr-2021 |
Clement Faure <clement.faure@nxp.com> |
drivers: caam: append RSA to CAAM prime driver
Rename caam_prime.c to caam_prime_rsa.c Rename struct prime_data {} to struct prime_data_rsa {} Rename caam_prime_gen() to caam_prime_rsa_gen()
The re
drivers: caam: append RSA to CAAM prime driver
Rename caam_prime.c to caam_prime_rsa.c Rename struct prime_data {} to struct prime_data_rsa {} Rename caam_prime_gen() to caam_prime_rsa_gen()
The reason why specifying the RSA algorithm for the current CAAM prime implementation is to prepare the merge for DSA algorithm that will feature a different prime generation implementation.
Signed-off-by: Clement Faure <clement.faure@nxp.com> Reviewed-by: Jerome Forissier <jerome@forissier.org>
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| 62590f08 | 10-Mar-2020 |
Cedric Neveux <cedric.neveux@nxp.com> |
drivers: crypto: implement crypto device driver - DSA
Add a generic cryptographic DSA driver interface connecting TEE Crypto generic APIs to HW driver interface
Signed-off-by: Cedric Neveux <cedric
drivers: crypto: implement crypto device driver - DSA
Add a generic cryptographic DSA driver interface connecting TEE Crypto generic APIs to HW driver interface
Signed-off-by: Cedric Neveux <cedric.neveux@nxp.com> Signed-off-by: Clement Faure <clement.faure@nxp.com> Acked-by: Jerome Forissier <jerome@forissier.org>
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| d5ad7ccf | 10-Jan-2021 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: rename struct tee_pager_area to vm_paged_region
Renames struct tee_pager_area to struct vm_paged_region and moves it next to the declaration of struct vm_region. Since areas are now called pag
core: rename struct tee_pager_area to vm_paged_region
Renames struct tee_pager_area to struct vm_paged_region and moves it next to the declaration of struct vm_region. Since areas are now called paged regions or regions also rename functions, variables and struct members accordingly.
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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