History log of /optee_os/ (Results 3251 – 3275 of 8578)
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737ed93212-May-2022 Etienne Carriere <etienne.carriere@linaro.org>

drivers: scmi-msg: fix protocol list querying

Corrects the function reporting the SCMI protocols supported by the
platform to not assume 8 protocol IDs at most can be returned. Indeed
the number of

drivers: scmi-msg: fix protocol list querying

Corrects the function reporting the SCMI protocols supported by the
platform to not assume 8 protocol IDs at most can be returned. Indeed
the number of protocol IDs returned depends on the SCMI output buffer
size.

Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>

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f93760c412-May-2022 Etienne Carriere <etienne.carriere@linaro.org>

drivers: scmi-msg: fix protocol list response size

Corrects the size of the SCMI response payload when querying the list
of the supported protocol. This response payload size depends on the
number o

drivers: scmi-msg: fix protocol list response size

Corrects the size of the SCMI response payload when querying the list
of the supported protocol. This response payload size depends on the
number of protocols enumerated by the response.

Reported-by: Nicolas Frattaroli <frattaroli.nicolas@gmail.com>
Link: https://lore.kernel.org/lkml/1698297.NAKyZzlH2u@archbook
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>

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4a38270029-Apr-2022 Etienne Carriere <etienne.carriere@linaro.org>

drivers: scmi-msg: move entry functions to generic entry

Moves SCMI channel management entry helper functions from smt.c to
generic source file entry.c. This change will ease integration of
other SC

drivers: scmi-msg: move entry functions to generic entry

Moves SCMI channel management entry helper functions from smt.c to
generic source file entry.c. This change will ease integration of
other SCMI shared memory message passing protocol.

Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>

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28e5132629-Apr-2022 Etienne Carriere <etienne.carriere@linaro.org>

mk: config.mk: describe and initialize CFG_SCMI_MSG_*_ENTRY switches

Describe and set a default value to existing CFG_SCMI_MSG_*_ENTRY
configuration switches that allow to optimize memory which is d

mk: config.mk: describe and initialize CFG_SCMI_MSG_*_ENTRY switches

Describe and set a default value to existing CFG_SCMI_MSG_*_ENTRY
configuration switches that allow to optimize memory which is desired
when enabling pager and interrupt or fastcall SMC entry for SCMI
channels.

Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>

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598c63d310-May-2022 Etienne Carriere <etienne.carriere@linaro.org>

drivers: scmi-msg: rename chan to channel

Renames local variables chan to channel in smt.c.

Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@li

drivers: scmi-msg: rename chan to channel

Renames local variables chan to channel in smt.c.

Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>

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ae07e7ef29-Apr-2022 Etienne Carriere <etienne.carriere@linaro.org>

drivers: scmi-msg: handle invalid channels

Changes implementation channel_to_smt_hdr() of SMT message management
in scmi-msg driver to support being called with invalid channel ID
to relax implement

drivers: scmi-msg: handle invalid channels

Changes implementation channel_to_smt_hdr() of SMT message management
in scmi-msg driver to support being called with invalid channel ID
to relax implementation. On contrary, scmi_smt_init_agent_channel()
is expected to be called only for valid SMT channels.

By the way, with this change, scmi_entry_smt() read SMT header status
from shared memory after channel in successfully claimed, not before.
The change does not affect the communication and makes the implementation
more consistent. For consistency, I also rename local variables chan to
channel to be more explicit.

Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>

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0c43202e25-Apr-2022 Etienne Carriere <etienne.carriere@linaro.org>

drivers: scmi-msg: correct inline description

Fixes inline description comment of plat_scmi_clock_rates_array()
and scmi_smt_init_agent_channel().

Acked-by: Jens Wiklander <jens.wiklander@linaro.or

drivers: scmi-msg: correct inline description

Fixes inline description comment of plat_scmi_clock_rates_array()
and scmi_smt_init_agent_channel().

Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>

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90252e2a29-Apr-2022 Etienne Carriere <etienne.carriere@linaro.org>

drivers: scmi-msg: clock adapts to output buffer size

Changes SCMI clocks implementation to not assume the SCMI output
message buffer is of a given size. Implementation still expects the
output shar

drivers: scmi-msg: clock adapts to output buffer size

Changes SCMI clocks implementation to not assume the SCMI output
message buffer is of a given size. Implementation still expects the
output shared memory is at least large enough to hold the SCMI status
information that is 32bit wide.

Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>

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57f6c5d229-Apr-2022 Etienne Carriere <etienne.carriere@linaro.org>

drivers: scmi-msg: voltage domain adapts to output buffer size

Changes SCMI voltage domain implementation to not assume the SCMI output
message buffer is of a given size. Implementation still expect

drivers: scmi-msg: voltage domain adapts to output buffer size

Changes SCMI voltage domain implementation to not assume the SCMI output
message buffer is of a given size. Implementation still expects the
output shared memory is at least large enough to hold the SCMI status
information that is 32bit wide.

Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>

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7b49ff3325-Apr-2022 Etienne Carriere <etienne.carriere@linaro.org>

drivers: scmi-msg: relax constraint on output buffer size

Changes scmi_write_response() implementation to not assert the output
buffer size against target payload but return a protocol error instead

drivers: scmi-msg: relax constraint on output buffer size

Changes scmi_write_response() implementation to not assert the output
buffer size against target payload but return a protocol error instead
since we expect shared memory size where agreed on before communication.

Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>

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d0b1e03725-Apr-2022 Etienne Carriere <etienne.carriere@linaro.org>

drivers: scmi-msg: remove unused macro LEVELS_ARRAY_SIZE_MAX_2

Removes macro LEVELS_ARRAY_SIZE_MAX_2 in scmi-msg voltage-domain.c
source file.

Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
S

drivers: scmi-msg: remove unused macro LEVELS_ARRAY_SIZE_MAX_2

Removes macro LEVELS_ARRAY_SIZE_MAX_2 in scmi-msg voltage-domain.c
source file.

Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>

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d9b0a06d25-Apr-2022 Etienne Carriere <etienne.carriere@linaro.org>

drivers: scmi-msg: rename secure buffer size macros

Renames macro SCMI_PLAYLOAD_MAX to SCMI_SEC_PAYLOAD_SIZE and
SCMI_PLAYLOAD_U32_MAX to SCMI_PAYLOAD_U32_SIZE to fix typo in macro name
(play to pay

drivers: scmi-msg: rename secure buffer size macros

Renames macro SCMI_PLAYLOAD_MAX to SCMI_SEC_PAYLOAD_SIZE and
SCMI_PLAYLOAD_U32_MAX to SCMI_PAYLOAD_U32_SIZE to fix typo in macro name
(play to pay) and make it clear that SCMI_SEC_PAYLOAD_SIZE is the size
of the secure buffer used to store a secure copy of the input SCMI
message payload, that is expected small.

Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>

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5c34a98225-Apr-2022 Etienne Carriere <etienne.carriere@linaro.org>

drivers: scmi-msg: rename channel entry lock functions

Renames scmi_channel_set_busy() and scmi_channel_release_busy()
to scmi_msg_claim_channel() and scmi_msg_release_channel(). This
change also mo

drivers: scmi-msg: rename channel entry lock functions

Renames scmi_channel_set_busy() and scmi_channel_release_busy()
to scmi_msg_claim_channel() and scmi_msg_release_channel(). This
change also moves the implementation from smt.c to entry.c in
the scmi-msg driver for alternate mailbox memory protocol support.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>

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3bfa418b13-May-2022 Jerome Forissier <jerome.forissier@linaro.org>

build: introduce CFG_OPTEE_REVISION_EXTRA

Adds CFG_OPTEE_REVISION_EXTRA (default: empty) which can be used to
append a custom string to the revision string shown in the boot banner.
A typical use ca

build: introduce CFG_OPTEE_REVISION_EXTRA

Adds CFG_OPTEE_REVISION_EXTRA (default: empty) which can be used to
append a custom string to the revision string shown in the boot banner.
A typical use case is build environments such as Yocto/OpenEmbedded
which check out a particular version of the optee_os repository and may
add patches on top. In this case the revision string is something like:

3.17.0-dev (gcc version ...

which doesn't give any information on what modifications are added and
therefore makes it difficult to know for sure if a deployed binary is
indeed the expected one (even more so when the build date is fixed via
SOURCE_DATE_EPOCH for reproducible builds).
CFG_OPTEE_REVISION_EXTRA allows to append a specific build identifier.
For example:

$ make CFG_OPTEE_REVISION_EXTRA=-mybuild_1234

would give:

3.17.0-dev-mybuild_1234

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>

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4e6eecf630-Mar-2022 Jens Wiklander <jens.wiklander@linaro.org>

core: decrease register size for gicv2

The mapped size for GIC distributor and cpu registers is currently
defined to the size used for GICv3. GICv2 doesn't need such large sizes,
in fact some platfo

core: decrease register size for gicv2

The mapped size for GIC distributor and cpu registers is currently
defined to the size used for GICv3. GICv2 doesn't need such large sizes,
in fact some platforms has the distributor and cpu registers next to
each other in the physical memory map. This causes an overlap that can
be confusing. Fix this by selecting a smaller size when a GICv2 is used
instead.

It should be noted GICC_DIR is at offset 0x1000 in the cpu interface so
this register will not be accessible, but this should not be a problem
since OP-TEE doesn't use that register.

Reviewed-by: Vishnu Banavath <vishnu.banavath@arm.com>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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60091ebf11-May-2022 Clement Faure <clement.faure@nxp.com>

core: imx: link: generate entry_point_address.txt for uTee image

For some platforms like mx7ulpevk, the `UL` attribute for CFG_DRAM_BASE
is necessary to avoid the following error:

$ PLATFORM=imx-mx

core: imx: link: generate entry_point_address.txt for uTee image

For some platforms like mx7ulpevk, the `UL` attribute for CFG_DRAM_BASE
is necessary to avoid the following error:

$ PLATFORM=imx-mx7ulpevk make uTee
core/mm/mobj.c: In function ‘mobj_init’:
./out/arm-plat-imx/include/generated/conf.h:222:64: warning: integer overflow in expression of type ‘int’ results in ‘-1644167168’ [-Woverflow]
222 | #define CFG_TZDRAM_START (0x60000000 - 0x01e00000 - 0x00200000 + 0x40000000)
| ^

However, this `UL` attribute prevents the shell from properly computing
the CFG_TZDRAM_START value :

$ PLATFORM=imx-mx7ulpevk make uTee
bash: (UL(0x60000000) - 0x01e00000 - 0x00200000 + 0x40000000): missing `)' (error token is "(0x60000000) - 0x01e00000 - 0x00200000 + 0x40000000)")

To address both issues, remove the `UL` attribute from CFG_TZDRAM_START
with Makefile string substitution.

Fixes: 0f8347dcafe ("core: imx: generate uImage for imx6 and imx7 platforms")
Signed-off-by: Clement Faure <clement.faure@nxp.com>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>

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8f82771b28-Oct-2021 Franck LENORMAND <franck.lenormand@nxp.com>

drivers: caam: fix cache operation on SGT table

The cache operation of the SGT table in caam_sgt_derive() was wrong and
it did not take into account the CAAM "burst" defined by the value
CFG_CAAM_SG

drivers: caam: fix cache operation on SGT table

The cache operation of the SGT table in caam_sgt_derive() was wrong and
it did not take into account the CAAM "burst" defined by the value
CFG_CAAM_SGT_ALIGN.
The cache operation of the SGT table in caam_sgt_cache_op() is done
correctly however.

This patch adds caam_sgt_entries_cache_clean() to do this operation and
avoid implementation errors.

Signed-off-by: Franck LENORMAND <franck.lenormand@nxp.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

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8df917f905-May-2022 Sahil Malhotra <sahil.malhotra@nxp.com>

core: plat-ls: correct CAAM JR interrupt numbers

CAAM JR interrupt numbers for some of platforms were configured
wrong, corrected it.

Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com>
Acked-by

core: plat-ls: correct CAAM JR interrupt numbers

CAAM JR interrupt numbers for some of platforms were configured
wrong, corrected it.

Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

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2e1b85fe04-Apr-2022 Ruchika Gupta <ruchika.gupta@linaro.org>

tpm2: Add TPM2 as PCR provider to TCG eventlog parsing framework

TCG eventlog parsing framework parses the eventlog and extends the
PCR's. For this, it needs a provider for PCR's. Register TPM2 as
a

tpm2: Add TPM2 as PCR provider to TCG eventlog parsing framework

TCG eventlog parsing framework parses the eventlog and extends the
PCR's. For this, it needs a provider for PCR's. Register TPM2 as
a provider to this framework.

Signed-off-by: Ruchika Gupta <ruchika.gupta@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>

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b8da5d8c04-Apr-2022 Ruchika Gupta <ruchika.gupta@linaro.org>

core: Add support to parse TPM eventlog and extend PCRs

Support for OP-TEE to parse the TPM eventlog. The eventlog format
is based on TCG specification [1], so we call this TCG framework.

To parse

core: Add support to parse TPM eventlog and extend PCRs

Support for OP-TEE to parse the TPM eventlog. The eventlog format
is based on TCG specification [1], so we call this TCG framework.

To parse the eventlog and extend PCR's device is needed which
supports PCR's. This device can be TPM or any other HSM which
supports PCR like registers. Such a device can register itself
as a TCG provider for PCR information and ability to extend the
PCR's.

[1] TCG PC Client Platform Firmware Profile Specification
link: https://trustedcomputinggroup.org/resource/pc-client-specific-platform-firmware-profile-specification/

Signed-off-by: Ruchika Gupta <ruchika.gupta@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>

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776670df30-Mar-2022 Ruchika Gupta <ruchika.gupta@linaro.org>

tpm2: Add commands to GetCapability, Read/Extend PCR

Add support for TPM2_PCR_{Read/Extend} and TPM2_GetCapability.
TPM uses PCR for integrity collections. Add support to
read and extend PCR's. For

tpm2: Add commands to GetCapability, Read/Extend PCR

Add support for TPM2_PCR_{Read/Extend} and TPM2_GetCapability.
TPM uses PCR for integrity collections. Add support to
read and extend PCR's. For PCR's some generic information like
number of banks, number of PCR's, supported and active algorithms etc.
is required which can be obtained from TPM using TPM2_GetCapability
command. This information is required at lot of places, so save the
basic capability information with tpm2_chip.

Signed-off-by: Ruchika Gupta <ruchika.gupta@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>

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875fdae206-May-2022 Sohaib ul Hassan <sohaib.ul.hassan@unikie.com>

core: libtomcrypt: Fix compilation issue with CFG_CRYPTO_ECC=n

Disabling ECC crypto does not disable the libtomcrypt ECC
related declarations, so CFG_CRYPTO_ECC=n gives a compilation error.

Signed-

core: libtomcrypt: Fix compilation issue with CFG_CRYPTO_ECC=n

Disabling ECC crypto does not disable the libtomcrypt ECC
related declarations, so CFG_CRYPTO_ECC=n gives a compilation error.

Signed-off-by: Sohaib ul Hassan <sohaib.ul.hassan@unikie.com>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>

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001524d406-May-2022 Jerome Forissier <jerome.forissier@linaro.org>

build: allow multiple occurrences of the same directory in subdirs-y

This change enables adding the same directory several times to subdirs-y
in sub.mk without causing warnings. This means we can no

build: allow multiple occurrences of the same directory in subdirs-y

This change enables adding the same directory several times to subdirs-y
in sub.mk without causing warnings. This means we can now use patterns
such as:

subdirs-$(CFG_FOO) += foobar
subdirs-$(CFG_BAR) += foobar

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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ede83d7202-May-2022 Jerome Forissier <jerome.forissier@linaro.org>

libutee: fix value of TEE_ECC_CURVE_SM2

The GlobalPlatform TEE Interbal Core API specification v1.3 has the
following text:

In TEE Internal Core API v1.2 and v1.2.1, TEE_ECC_CURVE_25519 and
TEE_E

libutee: fix value of TEE_ECC_CURVE_SM2

The GlobalPlatform TEE Interbal Core API specification v1.3 has the
following text:

In TEE Internal Core API v1.2 and v1.2.1, TEE_ECC_CURVE_25519 and
TEE_ECC_CURVE_SM2 were incorrectly assigned the same identifier.

Indeed, both were 0x00000300. In v1.3, TEE_ECC_CURVE_SM2 is now
0x00000400. Update the code accordingly.

This is an API and ABI change, but note that this value is used only
in TEE_IsAlgorithmSupported(). Therefore, only TAs that dynamically
check for algorithm support at runtime may be impacted. This change
was tested on QEMUv8 by running "old" TAs (built without this commit)
with a "newer" OP-TEE OS (including this commit), that is:
- 'make run' and run 'xtest'
- apply this change
- 'make arm-tf && make run-only' and run 'xtest' again. No errors.

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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e15d035e03-Mar-2022 Manorit Chawdhry <m-chawdhry@ti.com>

plat-k3: Initialize Secure Storage with DKEK

K3 HS devices have a randomly generated 256 bit key written into the
efuses in TI Factory. This key is called a Key Encryption Key (KEK) and
is unique to

plat-k3: Initialize Secure Storage with DKEK

K3 HS devices have a randomly generated 256 bit key written into the
efuses in TI Factory. This key is called a Key Encryption Key (KEK) and
is unique to each device.

KEK is fed in hardware into the AES engine inside DMSC/SMS. The efuses
carrying the KEK are marked as read and write protected. As a result,
KEK is only accessible via the AES engine in DMSC/SMS.

System Firmware provides API to obtain a key derived from KEK(DKEK) for
encryption/decryption which is accessible through TI-SCI protocol.

The DKEK will be used in K3 SOCs to initialize HUK for Secure Storage.

Adds TI_SCI_MSG_SA2UL_GET_DKEK in TISCI protocol to extract the DKEK from
K3 SOCs and initialize HUK.

Further details can be found in the TISCI documentation:
https://software-dl.ti.com/tisci/esd/latest/index.html

Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
Acked-by: Andrew Davis <afd@ti.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

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